公开(公告)号：US20150287916A1

公开(公告)日：2015-10-08

申请号：US14244486

申请日：2014-04-03

Applicant: Micron Technology, Inc.

Inventor： Kyle B. Campbell ,  Irina Vasilyeva ,  Farrell M. Good ,  Vishwanath Bhat ,  Kyuchul Chong

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1233 ,  H01L21/76832 ,  H01L21/76834 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1675

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Abstract translation: 一种形成半导体结构的方法。 该方法包括在衬底上的至少一部分堆叠结构上形成衬垫的保护部分。 保护部分包括配制成粘附到堆叠结构的材料。 衬垫的保形部分形成在衬垫的保护部分或衬垫的保护部分上以及堆叠结构的暴露的材料上。 保护部分和保形部分中的至少一个不包括铝。 公开了形成半导体结构的附加方法，半导体结构包括包括保护部分和保形部分的衬垫。

公开(公告)号：US20150137254A1

公开(公告)日：2015-05-21

申请号：US14607733

申请日：2015-01-28

Applicant: Micron Technology, Inc.

Inventor： F. Daniel Gealy ,  Vishwanath Bhat ,  Cancheepuram V. Srividya ,  M. Noel Rocklein

IPC: H01L29/51 ,  H01L49/02

CPC classification number: H01L21/022 ,  C23C16/45529 ,  H01L21/02148 ,  H01L21/02194 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/31641 ,  H01L21/31645 ,  H01L28/40 ,  H01L28/56 ,  H01L29/517 ,  H01L29/78

Abstract: Graded dielectric layers and methods of fabricating such dielectric layers provide dielectrics in a variety of electronic structures for use in a wide range of electronic devices and systems. In an embodiment, a dielectric layer is graded with respect to a doping profile across the dielectric layer. In an embodiment, a dielectric layer is graded with respect to a crystalline structure profile across the dielectric layer. In an embodiment, a dielectric layer is formed by atomic layer deposition incorporating sequencing techniques to generate a doped dielectric material.

Abstract translation: 梯度介电层和制造这种电介质层的方法在各种电子结构中提供电介质以用于广泛的电子设备和系统。 在一个实施例中，电介质层相对于跨介电层的掺杂分布而分级。 在一个实施例中，电介质层相对于介电层上的晶体结构分布呈梯度分布。 在一个实施例中，通过包含测序技术的原子层沉积形成电介质层以产生掺杂的电介质材料。

公开(公告)号：US20130260529A1

公开(公告)日：2013-10-03

申请号：US13903267

申请日：2013-05-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Tsai-Yu Huang ,  Vishwanath Bhat ,  Vassil Antonov ,  Chun-I Hsieh ,  Chris Carlson

IPC: H01L49/02

CPC classification number: H01L27/10855 ,  H01G4/20 ,  H01L21/02186 ,  H01L21/02192 ,  H01L21/02244 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/90

Abstract: Methods of forming a capacitor including forming at least one aperture in a support material, forming a titanium nitride material within the at least one aperture, forming a ruthenium material within the at least one aperture over the titanium nitride material, and forming a first conductive material over the ruthenium material within the at least one aperture. The support material may then be removed and the titanium nitride material may be oxidized to form a titanium dioxide material. A second conductive material may then be formed over an outer surface of the titanium dioxide material.

Abstract translation: 形成电容器的方法包括在支撑材料中形成至少一个孔，在所述至少一个孔内形成氮化钛材料，在所述氮化钛材料的所述至少一个孔内形成钌材料，以及形成第一导电材料 在该至少一个孔内的钌材料上。 然后可以移除支撑材料，并且氮化钛材料可被氧化以形成二氧化钛材料。 然后可以在二氧化钛材料的外表面上形成第二导电材料。

公开(公告)号：US20200274060A1

公开(公告)日：2020-08-27

申请号：US16870137

申请日：2020-05-08

Applicant: Micron Technology, Inc.

Inventor： Kyle B. Campbell ,  Irina Vasilyeva ,  Farrell M. Good ,  Vishwanath Bhat ,  Kyuchul Chong

IPC: H01L45/00 ,  H01L27/24

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

公开(公告)号：US10249819B2

公开(公告)日：2019-04-02

申请号：US14244486

申请日：2014-04-03

Applicant: Micron Technology, Inc.

Inventor： Kyle B. Campbell ,  Irina Vasilyeva ,  Farrell M. Good ,  Vishwanath Bhat ,  Kyuchul Chong

IPC: H01L45/00 ,  H01L27/24 ,  H01L21/768

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

公开(公告)号：US10008381B2

公开(公告)日：2018-06-26

申请号：US14929070

申请日：2015-10-30

Applicant: Micron Technology, Inc.

Inventor： Nik Mirin ,  Tsai-Yu Huang ,  Vishwanath Bhat ,  Chris M. Carlson ,  Vassil N. Antonov

IPC: H01L21/02 ,  C23C16/40 ,  C23C16/455 ,  H01G4/08 ,  H01G4/12 ,  H01G4/33 ,  H01L27/108 ,  H01L49/02 ,  C01G23/04 ,  H01L23/373 ,  H05K1/02 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/367

CPC classification number: H01L21/02186 ,  C01G23/04 ,  C23C16/405 ,  C23C16/45534 ,  H01G4/085 ,  H01G4/1227 ,  H01G4/33 ,  H01L21/02233 ,  H01L21/02244 ,  H01L21/28556 ,  H01L21/32051 ,  H01L23/367 ,  H01L23/3735 ,  H01L23/3736 ,  H01L27/10808 ,  H01L27/1085 ,  H01L27/10852 ,  H01L28/40 ,  H01L28/60 ,  H01L2924/0002 ,  H05K1/0203 ,  Y02P20/129 ,  Y10T428/24802 ,  Y10T428/24975 ,  H01L2924/00

Abstract: Some embodiments include methods of forming rutile-type titanium oxide. A monolayer of titanium nitride may be formed. The monolayer of titanium nitride may then be oxidized at a temperature less than or equal to about 550° C. to convert it into a monolayer of rutile-type titanium oxide. Some embodiments include methods of forming capacitors that have rutile-type titanium oxide dielectric, and that have at least one electrode comprising titanium nitride. Some embodiments include thermally conductive stacks that contain titanium nitride and rutile-type titanium oxide, and some embodiments include methods of forming such stacks.

公开(公告)号：US20180123036A1

公开(公告)日：2018-05-03

申请号：US15857873

申请日：2017-12-29

Applicant: Micron Technology, Inc.

Inventor： Kyle B. Campbell ,  Irina Vasilyeva ,  Farrell M. Good ,  Vishwanath Bhat ,  Kyuchul Chong

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1233 ,  H01L21/76832 ,  H01L21/76834 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1675

Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

公开(公告)号：US09466660B2

公开(公告)日：2016-10-11

申请号：US14055620

申请日：2013-10-16

Applicant: Micron Technology, Inc.

Inventor： Matthew N. Rocklein ,  Kotha Sai Madhukar Reddy ,  Vassil Antonov ,  Vishwanath Bhat

IPC: H01L29/12 ,  H01L49/02

CPC classification number: H01L28/60 ,  H01L28/40

Abstract: A semiconductor structure may include a first electrode over a substrate, a high-K dielectric material over the first electrode, and a second electrode over the high-K dielectric material, wherein at least one of the first electrode and the second electrode may include a material selected from the group consisting of a molybdenum nitride (MoaNb) material, a molybdenum oxynitride (MoOxNy) material, a molybdenum oxide (MoOx) material, and a molybdenum-based alloy material comprising molybdenum and nitrogen.

Abstract translation: 半导体结构可以包括在衬底上的第一电极，在第一电极上方的高K电介质材料和在高K电介质材料上的第二电极，其中第一电极和第二电极中的至少一个可以包括 选自氮化钼（MoaNb）材料，氮氧化钼（MoOxNy）材料，氧化钼（MoOx））材料和包含钼和氮的钼基合金材料的材料。

公开(公告)号：US20160056038A1

公开(公告)日：2016-02-25

申请号：US14929070

申请日：2015-10-30

Applicant: Micron Technology, Inc.

Inventor： Nik Mirin ,  Tsai-Yu Huang ,  Vishwanath Bhat ,  Chris M. Carlson ,  Vassil N. Antonov

IPC: H01L21/02 ,  H01L23/367 ,  H01L49/02 ,  H01L21/3205 ,  H01L27/108 ,  H01L23/373 ,  H01L21/285

CPC classification number: H01L21/02186 ,  C01G23/04 ,  C23C16/405 ,  C23C16/45534 ,  H01G4/085 ,  H01G4/1227 ,  H01G4/33 ,  H01L21/02233 ,  H01L21/02244 ,  H01L21/28556 ,  H01L21/32051 ,  H01L23/367 ,  H01L23/3735 ,  H01L23/3736 ,  H01L27/10808 ,  H01L27/1085 ,  H01L27/10852 ,  H01L28/40 ,  H01L28/60 ,  H01L2924/0002 ,  H05K1/0203 ,  Y10T428/24802 ,  Y10T428/24975 ,  H01L2924/00

Abstract: Some embodiments include methods of forming rutile-type titanium oxide. A monolayer of titanium nitride may be formed. The monolayer of titanium nitride may then be oxidized at a temperature less than or equal to about 550° C. to convert it into a monolayer of rutile-type titanium oxide. Some embodiments include methods of forming capacitors that have rutile-type titanium oxide dielectric, and that have at least one electrode comprising titanium nitride. Some embodiments include thermally conductive stacks that contain titanium nitride and rutile-type titanium oxide, and some embodiments include methods of forming such stacks.

Abstract translation: 一些实施方案包括形成金红石型氧化钛的方法。 可以形成单层的氮化钛。 氮化钛单层然后可以在小于或等于约550℃的温度下被氧化，以将其转化为金红石型氧化钛的单层。 一些实施方案包括形成具有金红石型氧化钛电介质的电容器并且具有至少一个包含氮化钛的电极的方法。 一些实施方案包括含有氮化钛和金红石型氧化钛的导热叠层，并且一些实施方案包括形成这种叠层的方法。

公开(公告)号：US09236427B2

公开(公告)日：2016-01-12

申请号：US14501423

申请日：2014-09-30

Applicant: Micron Technology, Inc.

Inventor： Joseph Neil Greeley ,  Duane M. Goodner ,  Vishwanath Bhat ,  Vassil N. Antonov ,  Prashant Raghu

IPC: H01L27/108 ,  H01L29/94 ,  H01L49/02 ,  B82Y30/00

CPC classification number: H01L28/75 ,  B82Y30/00 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/65 ,  H01L28/90 ,  Y10S977/932 ,  Y10T428/265

Abstract: Some embodiments include a method of forming a capacitor. An opening is formed through a silicon-containing mass to a base, and sidewalls of the opening are lined with protective material. A first capacitor electrode is formed within the opening and has sidewalls along the protective material. At least some of the silicon-containing mass is removed with an etch. The protective material protects the first capacitor electrode from being removed by the etch. A second capacitor electrode is formed along the sidewalls of the first capacitor electrode, and is spaced from the first capacitor electrode by capacitor dielectric. Some embodiments include multi-material structures having one or more of aluminum nitride, molybdenum nitride, niobium nitride, niobium oxide, silicon dioxide, tantalum nitride and tantalum oxide. Some embodiments include semiconductor constructions.

Abstract translation: 一些实施例包括形成电容器的方法。 通过含硅物质向基底形成开口，并且开口的侧壁衬有保护材料。 第一电容器电极形成在开口内并具有保护材料的侧壁。 用蚀刻去除至少一些含硅物质。 保护材料保护第一电容器电极不被蚀刻除去。 沿着第一电容器电极的侧壁形成第二电容器电极，并且通过电容器电介质与第一电容器电极间隔开。 一些实施例包括具有氮化铝，氮化钼，氮化铌，氧化铌，二氧化硅，氮化钽和氧化钽中的一种或多种的多材料结构。 一些实施例包括半导体结构。