公开(公告)号：US20210119053A1

公开(公告)日：2021-04-22

申请号：US16970567

申请日：2019-02-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Katsuaki TOCHIBAYASHI ,  Satoru OKAMOTO

IPC: H01L29/786 ,  H01L29/51 ,  H01L29/22

Abstract: A semiconductor device having a high on-state current is provided. The semiconductor device includes a first insulator; a first oxide over the first insulator; a first conductor and a second conductor that are apart from each other over the first oxide; a second insulator covering the first insulator, the first oxide, the first conductor, and the second conductor; a third insulator over the second insulator; a fourth insulator in contact with a first conductor, a side surface of the second conductor, a side surface of the second insulator, and a side surface of the third insulator; a fifth insulator that is over the first oxide and on an inner side of the fourth insulator; a third conductor on an inner side of the fifth insulator; and a sixth insulator that is in contact with a top surface of the fourth insulator and over the third insulator, the fifth insulator, and the third conductor. The fourth insulator is divided to be apart from each other over the first oxide.

公开(公告)号：US20210082920A1

公开(公告)日：2021-03-18

申请号：US16961976

申请日：2019-01-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke NONAKA ,  Noritaka ISHIHARA ,  Tomoki HIRAMATSU ,  Ryunosuke HONDA ,  Tomoyo KAMOGAWA ,  Ryota HODO ,  Katsuaki TOCHIBAYASHI ,  Shunpei YAMAZAKI

IPC: H01L27/108 ,  H01L21/02 ,  H01L27/1156 ,  H01L29/786

Abstract: A semiconductor device having high operation frequency is provided. The semiconductor device includes a transistor including a first conductive layer, a first insulating layer, a second insulating layer, a first oxide, a second oxide, a third oxide, a third insulating layer, and a second conductive layer that are stacked in this order, and a fourth insulating layer. The first conductive layer and the second conductive layer include a region overlapping with the second oxide. In a channel width direction of the transistor, a level of the bottom surface of the second oxide is from more than or equal to −5 nm to less than 0 nm when a level of a region of the bottom surface of the second conductive layer which does not overlap with the second oxide is regarded as a reference.

公开(公告)号：US20200243514A1

公开(公告)日：2020-07-30

申请号：US16695385

申请日：2019-11-26

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Tatsuya ONUKI ,  Katsuaki TOCHIBAYASHI

IPC: H01L27/06 ,  H01L29/786 ,  H01L29/45

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a first conductor and a second insulator over a first insulator; a third insulator over the first conductor and the second insulator; a fourth insulator over the third insulator; a first oxide over the fourth insulator; a second oxide and a third oxide over the first oxide; a second conductor in contact with a top surface of the third insulator, a side surface of the fourth insulator, a side surface of the first oxide, a side surface of the second oxide, and a top surface of the second oxide; a third conductor in contact with the top surface of the third insulator, a side surface of the fourth insulator, a side surface of the first oxide, a side surface of the third oxide, and a top surface of the third oxide; a fourth oxide over the first oxide; a fifth insulator over the fourth oxide; and a fourth conductor over the fifth insulator. The capacitor includes a fifth conductor over the first insulator, the third insulator over the fifth conductor, and the second conductor over the third insulator.

公开(公告)号：US20180151742A1

公开(公告)日：2018-05-31

申请号：US15576445

申请日：2016-05-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu KURATA ,  Shinya SASAGAWA ,  Katsuaki TOCHIBAYASHI ,  Satoru OKAMOTO ,  Akihisa SHIMOMURA

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/105 ,  H01L27/12 ,  H01L27/092 ,  H01L27/146 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  G06K19/07 ,  G06F9/32

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  G06F9/327 ,  G06K19/0723 ,  H01L21/28 ,  H01L21/8234 ,  H01L21/823412 ,  H01L21/8238 ,  H01L21/823807 ,  H01L21/8258 ,  H01L23/3114 ,  H01L23/49861 ,  H01L24/48 ,  H01L27/06 ,  H01L27/0688 ,  H01L27/08 ,  H01L27/088 ,  H01L27/092 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/108 ,  H01L27/115 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/146 ,  H01L27/14616 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14645 ,  H01L27/14665 ,  H01L27/3262 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78609 ,  H01L29/78648 ,  H01L29/788 ,  H01L29/792 ,  H01L51/50 ,  H01L2224/48227 ,  H05B33/14

Abstract: A minute transistor is provided. Alternatively, a transistor with low parasitic capacitance is provided. Alternatively, a transistor having high frequency characteristics is provided. Alternatively, a novel transistor is provided.A transistor including a semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator is manufactured by forming a hard mask layer including a fourth conductor over the second insulator, a third insulator over the fourth conductor, forming an opening portion in the second insulator with the hard mask layer as the mask, eliminating the hard mask layer by forming the opening portion, and forming the first insulator and the first conductor in the opening portion.

公开(公告)号：US20180026140A1

公开(公告)日：2018-01-25

申请号：US15704093

申请日：2017-09-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yoshinobu ASAMI ,  Yutaka OKAZAKI ,  Motomu KURATA ,  Katsuaki TOCHIBAYASHI ,  Shinya SASAGAWA ,  Kensuke YOSHIZUMI ,  Hideomi SUZAWA

IPC: H01L29/786 ,  H01L21/477 ,  H01L21/4757 ,  H01L29/66 ,  H01L33/00 ,  H01L21/47

CPC classification number: H01L29/7869 ,  H01L21/47 ,  H01L21/4757 ,  H01L21/477 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78648 ,  H01L33/00

Abstract: A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including the transistor is provided. The semiconductor device includes a first insulator, an oxide semiconductor over the first insulator, a first conductor and a second conductor that are in contact with the oxide semiconductor, a second insulator that is over the first and second conductors and has an opening reaching the oxide semiconductor, a third insulator over the oxide semiconductor and the second insulator, and a fourth conductor over the third insulator. The first conductor includes a first region and a second region. The second conductor includes a third region and a fourth region. The second region faces the third region with the first conductor and the first insulator interposed therebetween. The second region is thinner than the first region. The third region is thinner than the fourth region.

公开(公告)号：US20160329434A1

公开(公告)日：2016-11-10

申请号：US15144123

申请日：2016-05-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Daigo ITO ,  Takahisa ISHIYAMA ,  Katsuaki TOCHIBAYASHI ,  Kazuya HANAOKA

IPC: H01L29/786 ,  G11C13/00 ,  G06F1/06 ,  H01L29/66

CPC classification number: H01L29/78693 ,  H01L21/67207 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/14621 ,  H01L27/14632 ,  H01L27/1464 ,  H01L29/045 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: The semiconductor device includes a first insulating layer; a first oxide insulating layer over the first insulating layer; an oxide semiconductor layer over the first oxide insulating layer; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a second oxide insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a gate insulating layer over the second oxide insulating layer; a gate electrode layer over the gate insulating layer; a second insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer; and a third insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, and the second insulating layer.

Abstract translation: 半导体器件包括第一绝缘层; 第一绝缘层上的第一氧化物绝缘层; 在所述第一氧化物绝缘层上的氧化物半导体层; 氧化物半导体层上的源电极层和漏电极层; 氧化物半导体层上的第二氧化物绝缘层，源电极层和漏电极层; 在所述第二氧化物绝缘层上的栅极绝缘层; 栅绝缘层上的栅电极层; 第一绝缘层上的第二绝缘层，源极电极层，漏极电极层，第二氧化物绝缘层，栅极绝缘层和栅极电极层; 以及第一绝缘层上的第三绝缘层，源极电极层，漏极电极层和第二绝缘层。

公开(公告)号：US20160284855A1

公开(公告)日：2016-09-29

申请号：US15075775

申请日：2016-03-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Terumasa IKEYAMA ,  Katsuaki TOCHIBAYASHI

IPC: H01L29/786 ,  H01L29/04 ,  H01L21/385 ,  H01L29/66 ,  H01L29/49

CPC classification number: H01L29/7869 ,  H01L21/385 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606

Abstract: A highly reliable semiconductor device including a transistor using an oxide semiconductor is provided. In a semiconductor device including a bottom-gate transistor including an oxide semiconductor layer, a first insulating layer is formed in contact with the oxide semiconductor layer, and an oxygen doping treatment is performed thereon, whereby the first insulating layer is made to contain oxygen in excess of the stoichiometric composition. The formation of the second insulating layer over the first insulating layer enables excess oxygen included in the first insulating layer to be supplied efficiently to the oxide semiconductor layer. Accordingly, the highly reliable semiconductor device with stable electric characteristics can be provided.

公开(公告)号：US20150249146A1

公开(公告)日：2015-09-03

申请号：US14712245

申请日：2015-05-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Katsuaki TOCHIBAYASHI ,  Satoshi HIGANO ,  Shunpei YAMAZAKI

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L29/22 ,  H01L29/7869

Abstract: A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. In a semiconductor device including a bottom-gate transistor in which an insulating layer functioning as a channel protective film is provided over an oxide semiconductor film, elements contained in an etching gas can be prevented from remaining as impurities on a surface of the oxide semiconductor film by performing impurity-removing process after formation of an insulating layer provided over and in contact with the oxide semiconductor film and/or formation of source and drain electrode layers. The impurity concentration in the surface of the oxide semiconductor film is lower than or equal to 5×1018 atoms/cm3, preferably lower than or equal to 1×1018 atoms/cm3.

Abstract translation: 提供了一种高度可靠的半导体器件和半导体器件的制造方法。 在包含作为沟道保护膜的绝缘层设置在氧化物半导体膜上的底栅晶体管的半导体器件中，可以防止包含在蚀刻气体中的元素作为杂质残留在氧化物半导体膜的表面上 通过在形成设置在氧化物半导体膜上并与氧化物半导体膜接触并且/或形成源极和漏极电极层的绝缘层之后进行杂质去除处理。 氧化物半导体膜表面的杂质浓度低于或等于5×1018原子/ cm3，优选为1×1018原子/ cm3以下。

公开(公告)号：US20130187153A1

公开(公告)日：2013-07-25

申请号：US13746751

申请日：2013-01-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Terumasa IKEYAMA ,  Katsuaki TOCHIBAYASHI

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/385 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606

Abstract: A highly reliable semiconductor device including a transistor using an oxide semiconductor is provided. In a semiconductor device including a bottom-gate transistor including an oxide semiconductor layer, a first insulating layer is formed in contact with the oxide semiconductor layer, and an oxygen doping treatment is performed thereon, whereby the first insulating layer is made to contain oxygen in excess of the stoichiometric composition. The formation of the second insulating layer over the first insulating layer enables excess oxygen included in the first insulating layer to be supplied efficiently to the oxide semiconductor layer. Accordingly, the highly reliable semiconductor device with stable electric characteristics can be provided.

Abstract translation: 提供了包括使用氧化物半导体的晶体管的高度可靠的半导体器件。 在包括具有氧化物半导体层的底栅晶体管的半导体器件中，形成与氧化物半导体层接触的第一绝缘层，并在其上进行氧掺杂处理，由此使第一绝缘层含有氧 过量的化学计量组成。 在第一绝缘层上形成第二绝缘层使得能够有效地向氧化物半导体层提供包括在第一绝缘层中的过量的氧。 因此，可以提供具有稳定电特性的高度可靠的半导体器件。

公开(公告)号：US20230044086A1

公开(公告)日：2023-02-09

申请号：US17964203

申请日：2022-10-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Toshinari SASAKI ,  Katsuaki TOCHIBAYASHI ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L27/146

Abstract: A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.