公开(公告)号：US09929556B2

公开(公告)日：2018-03-27

申请号：US14753103

申请日：2015-06-29

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Vanni Poletto ,  Manuel Gaertner ,  Sergio Lecce ,  Giovanni Luca Torrisi

IPC: H02H3/05 ,  H02H7/085 ,  H02H7/09 ,  H03K19/007 ,  H02H7/08

CPC classification number: H02H3/05 ,  H02H7/0844 ,  H02H7/0851 ,  H02H7/0852 ,  H02H7/09 ,  H03K19/007

Abstract: A fail-safe device may be coupled to a main device for actuating a switch responsive to a failure. The fail-safe device may include a fail-safe circuit, and an isolation trench surrounding the fail-safe circuit and isolating the fail-safe circuit from the main device. The fail-safe device may include an internal power supply connection, an internal reference voltage connection, a self-biased drive block configured to drive the at least one switch, and a receiver configured to receive failure signals from the main device.

公开(公告)号：US20170227586A1

公开(公告)日：2017-08-10

申请号：US15261126

申请日：2016-09-09

Applicant: STMicroelectronics S.r.l.

Inventor： Vanni Poletto ,  Nicola Rogledi

IPC: G01R27/14 ,  H03M3/00

CPC classification number: G01R27/14 ,  H03M3/458

Abstract: A device to read a variable resistor has an analog to digital converter (ADC), a first switch and a second switch. The ADC has a first ADC input, a second ADC input and an ADC output. The first switch selectively couples a first voltage indicative of a voltage across a first resistance to the first ADC input. The second switch selectively couples a second voltage indicative of a voltage across a second resistance to the second ADC input. The ADC outputs a signal indicative of a value of the second resistance.

公开(公告)号：US09595947B2

公开(公告)日：2017-03-14

申请号：US14797571

申请日：2015-07-13

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Vanni Poletto ,  Patrizia Milazzo ,  Sergio Lecce

IPC: H03K5/04 ,  H03K17/041 ,  H03K19/003 ,  H03K19/0175 ,  H03K17/042 ,  H03K17/16

CPC classification number: H03K5/04 ,  H03K17/04106 ,  H03K17/04206 ,  H03K17/166 ,  H03K19/00323 ,  H03K19/0175

Abstract: A driver device is for switching on and off a transistor for supplying a load by driving a control electrode of the transistor. The driver device includes a first terminal connected to the control electrode of the transistor, a second terminal connected between the transistor and the load, and a current-discharge path coupled to the first terminal. The current-discharge path includes a diode and is activated when the transistor is switched off. The diode becomes non-conductive to interrupt the current-discharge path when the voltage on the second terminal reaches a threshold value.

Abstract translation: 驱动器件用于通过驱动晶体管的控制电极来接通和关断用于提供负载的晶体管。 驱动器件包括连接到晶体管的控制电极的第一端子，连接在晶体管和负载之间的第二端子以及耦合到第一端子的电流 - 放电路径。 电流放电路径包括二极管，并且当晶体管关断时被激活。 当第二端子上的电压达到阈值时，二极管变得不导通以中断电流 - 放电路径。

公开(公告)号：US08872682B2

公开(公告)日：2014-10-28

申请号：US13926455

申请日：2013-06-25

Applicant: STMicroelectronics S.r.l

Inventor： Vanni Poletto ,  Carlo Antonini ,  Salvatore Cannavacciuolo

IPC: H03M1/00 ,  H03M1/12 ,  H03M3/04 ,  H03M1/48

CPC classification number: H03M1/12 ,  H03M1/1235 ,  H03M1/48 ,  H03M3/04

Abstract: An analog-to-digital conversion loop adapted to generate a digital output signal corresponding to a low-pass filtered replica of an analog input signal, including an analog adder configured to receive the input analog signal and an analog feedback signal, adapted to generate an analog error signal corresponding to the difference between the analog input signal and the analog feedback signal; an analog-to-digital converter having a nonlinear input-output conversion characteristic defining a larger quantization step the more the input to be converted differs from a null value, configured to receive the analog error signal and to generate a corresponding digital error signal a digital integrator configured to receive the digital error signal, configured to generate the digital output signal corresponding to the time integration of the digital error signal; a digital-to-analog converter, configured to receive the digital output signal and to generate the analog feedback signal as analog replica of the digital output signal.

Abstract translation: 一种适于产生对应于模拟输入信号的低通滤波复制品的数字输出信号的模拟 - 数字转换回路，包括配置成接收输入模拟信号的模拟加法器和模拟反馈信号，该模拟加法器适于产生 模拟误差信号对应于模拟输入信号和模拟反馈信号之间的差异; 具有定义较大量化步长的非线性输入 - 输出转换特性的模数转换器，被转换的输入越多与空值不同，被配置为接收模拟误差信号并产生相应的数字误差信号，数字 积分器，被配置为接收数字误差信号，被配置为产生对应于数字误差信号的时间积分的数字输出信号; 数模转换器，配置成接收数字输出信号并产生模拟反馈信号作为数字输出信号的模拟副本。

公开(公告)号：US20130342376A1

公开(公告)日：2013-12-26

申请号：US13926455

申请日：2013-06-25

Applicant: STMicroelectronics S.r.l.

Inventor： Vanni Poletto ,  Carlo Antonini ,  Salvatore Cannavacciuolo

IPC: H03M1/12

CPC classification number: H03M1/12 ,  H03M1/1235 ,  H03M1/48 ,  H03M3/04

Abstract: An analog-to-digital conversion loop adapted to generate a digital output signal corresponding to a low-pass filtered replica of an analog input signal, including an analog adder configured to receive the input analog signal and an analog feedback signal, adapted to generate an analog error signal corresponding to the difference between the analog input signal and the analog feedback signal; an analog-to-digital converter having a nonlinear input-output conversion characteristic defining a larger quantization step the more the input to be converted differs from a null value, configured to receive the analog error signal and to generate a corresponding digital error signal a digital integrator configured to receive the digital error signal, configured to generate the digital output signal corresponding to the time integration of the digital error signal; a digital-to-analog converter, configured to receive the digital output signal and to generate the analog feedback signal as analog replica of the digital output signal.

Abstract translation: 一种适于产生对应于模拟输入信号的低通滤波复制品的数字输出信号的模拟 - 数字转换回路，包括配置成接收输入模拟信号的模拟加法器和模拟反馈信号，该模拟加法器适于产生 模拟误差信号对应于模拟输入信号和模拟反馈信号之间的差异; 具有定义较大量化步长的非线性输入 - 输出转换特性的模数转换器，被转换的输入越多与空值不同，被配置为接收模拟误差信号并产生相应的数字误差信号，数字 积分器，被配置为接收数字误差信号，被配置为产生对应于数字误差信号的时间积分的数字输出信号; 数模转换器，配置成接收数字输出信号并产生模拟反馈信号作为数字输出信号的模拟副本。

公开(公告)号：US12261597B2

公开(公告)日：2025-03-25

申请号：US18321568

申请日：2023-05-22

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Marzo ,  Vincenzo Randazzo ,  Vanni Poletto ,  Giovanni Susinna

IPC: H03K17/687 ,  H03K17/0412 ,  H03K17/06

Abstract: In embodiments, a capacitance is coupled to a source of electrical charge via a drain to source current flow path through a field-effect transistor. The capacitance is pre-charged by making the field-effect transistor selectively conductive in response to the gate-source voltage of the field-effect transistor exceeding a threshold. The difference between the gate-source voltage of the field-effect transistor and the threshold provides an overdrive value of the field-effect transistor. The gate of the field-effect transistor is driven with a variable gate-source voltage having as a target maintaining a constant overdrive value. Electrical charge is controllably transferred from the source to the capacitance via the drain to source current flow path through the field-effect transistor avoiding undesirably high inrush currents.

公开(公告)号：US11923770B2

公开(公告)日：2024-03-05

申请号：US17959797

申请日：2022-10-04

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Marco Cignoli ,  Vanni Poletto

IPC: H02M3/155 ,  B60L3/12 ,  G01R19/10 ,  H02M1/08

CPC classification number: H02M3/155 ,  B60L3/12 ,  G01R19/10 ,  H02M1/08

Abstract: Provided is a circuit including a switching transistor having a control terminal configured to receive a control signal and having a current flow path therethrough. The switching transistor becomes conductive in response to the control signal having a first value. The current flow path through the switching transistor provides a current flow line between two nodes. In a non-conductive state, a voltage drop stress is across the switching transistor. The circuit comprises a sense transistor that is coupled to and a scaled replica of the switching transistor. The sense transistor has a sense current therethrough. The sense current is indicative of the current of the switching transistor. The circuit includes coupling circuitry configured to apply the voltage drop stress across the sense transistor in response to the switching transistor being non-conductive. In the non-conductive state, the voltage drop stress is replicated across both the switching transistor and the sense transistor.

公开(公告)号：US11892518B2

公开(公告)日：2024-02-06

申请号：US17368153

申请日：2021-07-06

Applicant: STMicroelectronics S.r.l.

Inventor： Orazio Pennisi ,  Valerio Bendotti ,  Vanni Poletto ,  Vittorio D'Angelo

IPC: G01R31/396 ,  G01R31/50 ,  G01R31/54 ,  B60L58/22 ,  H01M10/46 ,  H01M10/18 ,  H02J7/14 ,  H01M10/48 ,  G01R31/52

CPC classification number: G01R31/396 ,  B60L58/22 ,  G01R31/50 ,  G01R31/52 ,  G01R31/54 ,  H01M10/46 ,  H01M10/482 ,  H02J7/14

Abstract: A method of operating a control device includes performing an open load test or a current leakage test. The open load test includes activating a first current and then a second current and sensing with the first current and the second current activated, respectively, a first voltage drop and a second voltage drop between charge distribution pins and charge sensing pins of the control device. Respective differences are calculated between the first voltage drop and the second voltage drop sensed with the first current and the second current activated, respectively. These differences are compared with respective thresholds and an open circuit condition is declared as a result of the differences calculated reaching these thresholds.

公开(公告)号：US20230403005A1

公开(公告)日：2023-12-14

申请号：US18321568

申请日：2023-05-22

Applicant: STMicroelectronics S.r.l.

Inventor： Alberto Marzo ,  Vincenzo Randazzo ,  Vanni Poletto ,  Giovanni Susinna

IPC: H03K17/687 ,  H03K17/0412 ,  H03K17/06

CPC classification number: H03K17/687 ,  H03K17/04123 ,  H03K17/063

Abstract: In embodiments, a capacitance is coupled to a source of electrical charge via a drain to source current flow path through a field-effect transistor. The capacitance is pre-charged by making the field-effect transistor selectively conductive in response to the gate-source voltage of the field-effect transistor exceeding a threshold. The difference between the gate-source voltage of the field-effect transistor and the threshold provides an overdrive value of the field-effect transistor. The gate of the field-effect transistor is driven with a variable gate-source voltage having as a target maintaining a constant overdrive value. Electrical charge is controllably transferred from the source to the capacitance via the drain to source current flow path through the field-effect transistor avoiding undesirably high inrush currents.

公开(公告)号：US20220200509A1

公开(公告)日：2022-06-23

申请号：US17535176

申请日：2021-11-24

Applicant: STMicroelectronics S.r.l.

Inventor： Nicola Errico ,  Vanni Poletto ,  Paolo Vilmercati ,  Marco Cignoli

IPC: H02P27/12 ,  H02P27/08

Abstract: In an embodiment, an electronic circuit includes: a controller configured to produce a pulse-width-modulated (PWM) signal to control a first current of an electrical load; a redundant current measurement circuit configured to measure the first current and provide first and second current measurement signal; a monitor circuit coupled to the redundant current measurement circuit, the monitor circuit configured to assert a current monitor signal in response to the first and second current measurement signals being found to be matching with each other, wherein the monitor circuit is configured to: detect an absence of the asserted current monitor signal prior to expiry of a threshold time interval, and in response to detecting the absence of the asserted current monitor signal, force the controller to produce, prior to expiry of the threshold time interval, a first PWM signal pulse having a controlled duty-cycle.