公开(公告)号：US07182879B2

公开(公告)日：2007-02-27

申请号：US10795296

申请日：2004-03-09

申请人： Itsuko Sakai ,  Tokuhisa Ohiwa

发明人： Itsuko Sakai ,  Tokuhisa Ohiwa

IPC分类号： C03C25/68

CPC分类号： C23C16/45593 ,  B08B7/0035 ,  C23C16/4405 ,  C23C16/52 ,  H01J37/3244 ,  Y02C20/30 ,  Y02P70/605

摘要： A plasma processing method, in which a process gas is introduced into an evacuated process chamber for subjecting the target object to a plasma processing. The plasma processing method is featured in that at least a part of the process gas exhausted from the process chamber is introduced again into the process chamber. A specified value is obtained by monitoring the state of the plasma of the process gas within the process chamber, and the introducing conditions of the process gas into the process chamber are controlled to adjust a predetermined property value to a regulated value.

摘要翻译： 一种等离子体处理方法，其中将处理气体引入到真空处理室中，以对目标物体进行等离子体处理。 等离子体处理方法的特征在于，将从处理室排出的处理气体的至少一部分再次引入处理室。 通过监测处理室内的处理气体的等离子体的状态来获得规定的值，并且控制处理气体进入处理室的引入条件以将预定的特性值调整到规定值。

公开(公告)号：US06911398B2

公开(公告)日：2005-06-28

申请号：US10107434

申请日：2002-03-28

申请人： Masaki Narita ,  Katsuya Okumura ,  Tokuhisa Ohiwa

发明人： Masaki Narita ,  Katsuya Okumura ,  Tokuhisa Ohiwa

IPC分类号： H01L21/302 ,  H01L21/00 ,  H01L21/205 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/66

CPC分类号： H01L21/67271 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of making a semiconductor device, comprises preparing a plurality of lots each including semiconductor substrates to be processed, the plurality of lots including at least first and second lots, processing the plurality of lots for every one lot, using a semiconductor manufacturing apparatus, judging whether or not the semiconductor manufacturing apparatus is subjected to cleaning before the second lot is processed, depending upon both a first processing type of the first lot to be processed and a second processing type of the second lot to be processed after the first lot, and processing the second lot without the cleaning in the case where the second lot does not require the cleaning.

摘要翻译： 一种制造半导体器件的方法，包括制备多个批次，每个批次包括要处理的半导体衬底，所述多个批次至少包括第一批次和第二批次，使用半导体制造装置处理每批的多个批次， 根据第一批次的待处理的第一处理类型和第一批次之后的待处理的第二批次的第二处理类型，判断半导体制造装置是否在处理第二批次之前进行清洁， 并且在第二批次不需要清洁的情况下处理第二批而不进行清洁。

公开(公告)号：US06369423B2

公开(公告)日：2002-04-09

申请号：US09033899

申请日：1998-03-03

申请人： Tokuhisa Ohiwa ,  Jeffrey P. Gambino ,  Katsuya Okumura ,  Jun-ichi Shiozawa

发明人： Tokuhisa Ohiwa ,  Jeffrey P. Gambino ,  Katsuya Okumura ,  Jun-ichi Shiozawa

IPC分类号： H01L2976

CPC分类号： H01L21/76897 ,  H01L27/10873 ,  H01L27/10888

摘要： The present invention intends to provide a semiconductor device capable of realizing a thin gate stack and the manufacturing method thereof. A gate cap layer and/or a protection insulating film (an etching stopper) has a plurality of insulating materials such as oxide and nitride stacked on each other. With this structure, an insulating layer having an etching rate lower than that of the interlayer insulating layer, for example, can be exposed during the etching of the interlayer insulating layer, and the gate stack can be formed thin and the aspect ratio of the contact hole formed in the device can be reduced. The present invention can realize a thin gate stack in such a manner, and thus is suitable for a SAC used in a DRAM.

摘要翻译： 本发明旨在提供一种能够实现薄栅堆叠的半导体器件及其制造方法。 栅极覆盖层和/或保护绝缘膜（蚀刻阻挡层）具有堆叠在一起的多个绝缘材料，例如氧化物和氮化物。 利用这种结构，在层间绝缘层的蚀刻期间可以暴露具有比层间绝缘层的蚀刻速率低的蚀刻速率的绝缘层，并且可以使栅极堆叠形成得较薄，并且接触的纵横比 可以减少在装置中形成的孔。 本发明可以以这种方式实现薄栅堆叠，因此适用于在DRAM中使用的SAC。

公开(公告)号：US20140083979A1

公开(公告)日：2014-03-27

申请号：US14116952

申请日：2012-05-10

申请人： Shigeru Tahara ,  Eiichi Nishimura ,  Hiroshi Tomita ,  Tokuhisa Ohiwa ,  Hisashi Okuchi ,  Mitsuhiro Omura

发明人： Shigeru Tahara ,  Eiichi Nishimura ,  Hiroshi Tomita ,  Tokuhisa Ohiwa ,  Hisashi Okuchi ,  Mitsuhiro Omura

IPC分类号： B05D3/14

CPC分类号： B05D3/145 ,  H01L21/02057 ,  H01L21/02063 ,  H01L21/31116

摘要： A deposit removal method for removing deposits deposited on the surface of a pattern formed on a substrate by etching, includes an oxygen plasma treatment process for exposing the substrate to oxygen plasma while heating the substrate and a cycle treatment process for, after the oxygen plasma treatment process, repeating multiple cycles of a first period and a second period. In the first period, the substrate is exposed to a mixture of hydrogen fluoride gas and alcohol gas inside a processing chamber and the partial pressure of the alcohol gas is set to the first partial pressure. In the second period, the partial pressure of the alcohol gas is set to the second partial pressure lower than the first partial pressure by exhausting the inside of the processing chamber.

摘要翻译： 通过蚀刻去除沉积在形成在基板上的图案的表面上的沉积物的沉积物去除方法包括用于在加热基板的同时将基板暴露于氧等离子体的氧等离子体处理工艺和在氧等离子体处理之后的循环处理 处理，重复第一周期和第二周期的多个周期。 在第一阶段中，将基板暴露于处理室内的氟化氢气体和醇气体的混合物，并将醇气体的分压设定为第一分压。 在第二时段，通过排出处理室的内部，将醇气体的分压设定为低于第一分压的第二分压。

公开(公告)号：US20060118044A1

公开(公告)日：2006-06-08

申请号：US11292353

申请日：2005-12-02

申请人： Shinji Himori ,  Noriaki Imai ,  Katsumi Horiguchi ,  Takaaki Nezu ,  Shoichiro Matsuyama ,  Hiroki Matsumaru ,  Toshihiro Hayami ,  Kazuya Nagaseki ,  Itsuko Sakai ,  Tokuhisa Ohiwa ,  Yoshikazu Sugiyasu

发明人： Shinji Himori ,  Noriaki Imai ,  Katsumi Horiguchi ,  Takaaki Nezu ,  Shoichiro Matsuyama ,  Hiroki Matsumaru ,  Toshihiro Hayami ,  Kazuya Nagaseki ,  Itsuko Sakai ,  Tokuhisa Ohiwa ,  Yoshikazu Sugiyasu

IPC分类号： C23F1/00 ,  C23C16/00

CPC分类号： H01J37/32697 ,  H01J37/32082

摘要： A capacitive coupling plasma processing apparatus includes a process chamber configured to have a vacuum atmosphere, and a process gas supply section configured to supply a process gas into the chamber. In the chamber, a first electrode and a second electrode are disposed opposite each other. An RF power supply is disposed to supply an RF power to the first or second electrode to form an RF electric field within a plasma generation region between the first and second electrodes, so as to turn the process gas into plasma. The target substrate is supported by a support member between the first and second electrodes such that a process target surface thereof faces the second electrode. A conductive functional surface is disposed in a surrounding region around the plasma generation region and grounded to be coupled with the plasma in a sense of DC to expand the plasma.

摘要翻译： 电容耦合等离子体处理装置包括被配置为具有真空气氛的处理室和被配置为将处理气体供应到室中的处理气体供给部。 在腔室中，第一电极和第二电极相对设置。 设置RF电源以向第一或第二电极提供RF功率，以在第一和第二电极之间的等离子体产生区域内形成RF电场，以将处理气体转化为等离子体。 目标基板由第一和第二电极之间的支撑构件支撑，使得其工艺目标表面面向第二电极。 导电功能表面设置在等离子体产生区域周围的周围区域中，并且被接地以与DC等离子体耦合以扩展等离子体。

公开(公告)号：US07045462B2

公开(公告)日：2006-05-16

申请号：US10395065

申请日：2003-03-25

申请人： Takayuki Sakai ,  Tokuhisa Ohiwa ,  Masanobu Kibe

发明人： Takayuki Sakai ,  Tokuhisa Ohiwa ,  Masanobu Kibe

IPC分类号： H01L21/302

CPC分类号： H01L21/32139 ,  H01L21/28123 ,  H01L21/31138

摘要： A method for fabricating a pattern, includes: delineating a mask pattern on at least a portion of an underlying layer; etching a portion of the mask pattern; irradiating an incident light on the mask pattern to which the etching is performed and detecting a reflected light produced by reflecting the incident light after the incident light is transmitted through the mask pattern; obtaining a reflected interference spectrum; and calculating a pattern width of the mask pattern using data of the reflected interference spectrum, the reflected interference spectrum being in a wavelength range of not less than two times a pitch of the mask pattern.

摘要翻译： 一种用于制造图案的方法，包括：在下层的至少一部分上描绘掩模图案; 蚀刻掩模图案的一部分; 在进行了蚀刻的掩模图案上照射入射光，并且在入射光透过掩模图案之后，检测反射入射光产生的反射光; 获得反射的干涉光谱; 并且使用反射的干涉光谱的数据计算掩模图案的图案宽度，反射的干涉光谱在不小于掩模图案的间距的两倍的波长范围内。

公开(公告)号：US20050140975A1

公开(公告)日：2005-06-30

申请号：US10969860

申请日：2004-10-22

申请人： Takayuki Sakai ,  Masanobu Kibe ,  Tokuhisa Ohiwa

发明人： Takayuki Sakai ,  Masanobu Kibe ,  Tokuhisa Ohiwa

IPC分类号： G01B11/02 ,  G01B11/06 ,  G01B11/22 ,  G01N15/02 ,  H01L21/3065 ,  H01L21/66 ,  H01L21/768

CPC分类号： H01L21/76802 ,  G01B11/0625 ,  G01B11/0683 ,  G01B11/22 ,  H01J37/32935 ,  H01J37/32972 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： A process monitoring system has a process chamber configured to hold an object to be processed, an illumination source configured to emit a light to the object, a polarizer configured to polarize the light, a monitor window having a birefringent material and provided on the process chamber to propagate the light, direction adjusting equipment configured to adjust a relationship between a polarization plane of the light and a direction of an optic axis of the monitor window, and a monitoring information processor configured to detect the light reflected from the object.

摘要翻译： 过程监控系统具有被配置为保持要处理的对象的处理室，被配置为向对象发光的照明源，被配置为使光偏振的偏振器，具有双折射材料并设置在处理室上的监视器窗 传播光，方向调整装置，被配置为调节光的偏振面与监视窗的光轴的方向之间的关系;以及监视信息处理器，被配置为检测从物体反射的光。

公开(公告)号：US06780278B2

公开(公告)日：2004-08-24

申请号：US09892481

申请日：2001-06-28

申请人： Hisataka Hayashi ,  Kazuhiro Tomioka ,  Itsuko Sakai ,  Tokuhisa Ohiwa ,  Akihiro Kojima

发明人： Hisataka Hayashi ,  Kazuhiro Tomioka ,  Itsuko Sakai ,  Tokuhisa Ohiwa ,  Akihiro Kojima

IPC分类号： H01L2100

CPC分类号： H01J37/32082 ,  H01J37/32532

摘要： A plasma processing apparatus comprises a grounded housing, a thin RF plate electrode, an opposite electrode facing the RF plate electrode, and a RF power source for applying a radio frequency to either the RF plate electrode or the opposite electrode to produce plasma between the two electrodes. If the radio frequency applied to the electrode is f (MHz), the parasitic capacity C (pF) between the grounded portion of the housing and a conductive portion through which the radio frequency propagates is less than 1210*f−0.9. The thickness of the RF plate electrode is 1 mm to 6 mm, and it is supported by a heat sink. The heat sink has a coolant passage in the proximity to the RF plate electrode. The heat sink also has a groove or a cavity in addition to the coolant passage, thereby reducing the value of the dielectric constant of the heat sink as a whole.

摘要翻译： 等离子体处理装置包括接地壳体，薄RF板电极，面对RF板电极的相对电极和用于将射频施加到RF板电极或相对电极的RF电源，以在两者之间产生等离子体 电极。 如果施加到电极的射频为f（MHz），则壳体的接地部分与射频传播的导电部分之间的寄生电容C（pF）小于1210×f <-0.9>。 RF板电极的厚度为1mm〜6mm，由散热片支撑。 散热器在RF板电极附近具有冷却剂通道。 除了冷却剂通道之外，散热器还具有凹槽或空腔，从而整体上降低了散热器的介电常数值。

公开(公告)号：US06576562B2

公开(公告)日：2003-06-10

申请号：US10014459

申请日：2001-12-14

申请人： Junko Ohuchi ,  Yasuhiko Sato ,  Eishi Shiobara ,  Hisataka Hayashi ,  Tokuhisa Ohiwa ,  Yasunobu Onishi

发明人： Junko Ohuchi ,  Yasuhiko Sato ,  Eishi Shiobara ,  Hisataka Hayashi ,  Tokuhisa Ohiwa ,  Yasunobu Onishi

IPC分类号： H01L21302

CPC分类号： H01L21/76808 ,  H01L21/0271 ,  H01L21/288 ,  H01L21/31144 ,  H01L21/32051

摘要： A manufacturing method of semiconductor device comprises forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object, forming a mask material pattern by etching the mask material to a desired pattern, and etching the object to transfer the mask material pattern as a mask to the object.

公开(公告)号：US06420271B2

公开(公告)日：2002-07-16

申请号：US09814839

申请日：2001-03-23

申请人： Yasuhiko Sato ,  Eishi Shiobara ,  Motoyuki Sato ,  Yasunobu Onishi ,  Hiroshi Tomita ,  Tokuhisa Ohiwa ,  Junko Ohuchi ,  Hisataka Hayashi

发明人： Yasuhiko Sato ,  Eishi Shiobara ,  Motoyuki Sato ,  Yasunobu Onishi ,  Hiroshi Tomita ,  Tokuhisa Ohiwa ,  Junko Ohuchi ,  Hisataka Hayashi

IPC分类号： H01L214763

CPC分类号： H01L21/31144 ,  G03F7/085 ,  G03F7/09 ,  H01L21/3081 ,  H01L21/32139

摘要： A method of forming a pattern comprising the steps of, forming a lower film on a substrate, the lower film being a film containing carbon atom at a ratio of 80 wt % or more, or a vapor phase deposition film, either applying an adhesion-promoting treatment to a surface of the lower film or forming an adhesion-promoting on the lower film, forming an intermediate film on a surface of the lower film, forming a resist film on the intermediate film, forming a resist pattern by conducting a patterning exposure of the resist film, forming an intermediate film pattern by transferring the resist pattern to the intermediate film, and forming a lower film pattern by transferring the intermediate film pattern to the lower film.

摘要翻译： 一种形成图案的方法，包括以下步骤：在基底上形成下膜，下膜是含有80重量％以上的碳原子的膜或气相沉积膜， 促进对下膜的表面的处理或在下膜上形成粘合促进，在下膜的表面上形成中间膜，在中间膜上形成抗蚀剂膜，通过进行图案曝光形成抗蚀剂图案 的抗蚀剂膜，通过将抗蚀剂图案转印到中间膜而形成中间膜图案，并通过将中间膜图案转印到下膜来形成下膜图案。