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    Semiconductor device with a thin gate stack having a plurality of insulating layers
    1.
    发明授权
    Semiconductor device with a thin gate stack having a plurality of insulating layers 失效
    具有薄栅极叠层的半导体器件具有多个绝缘层

    公开(公告)号：US06369423B2

    公开(公告)日：2002-04-09

    申请号：US09033899

    申请日：1998-03-03

    申请人： Tokuhisa Ohiwa ,  Jeffrey P. Gambino ,  Katsuya Okumura ,  Jun-ichi Shiozawa

    发明人： Tokuhisa Ohiwa ,  Jeffrey P. Gambino ,  Katsuya Okumura ,  Jun-ichi Shiozawa

    IPC分类号： H01L2976

    CPC分类号： H01L21/76897 ,  H01L27/10873 ,  H01L27/10888

    摘要： The present invention intends to provide a semiconductor device capable of realizing a thin gate stack and the manufacturing method thereof. A gate cap layer and/or a protection insulating film (an etching stopper) has a plurality of insulating materials such as oxide and nitride stacked on each other. With this structure, an insulating layer having an etching rate lower than that of the interlayer insulating layer, for example, can be exposed during the etching of the interlayer insulating layer, and the gate stack can be formed thin and the aspect ratio of the contact hole formed in the device can be reduced. The present invention can realize a thin gate stack in such a manner, and thus is suitable for a SAC used in a DRAM.

    摘要翻译： 本发明旨在提供一种能够实现薄栅堆叠的半导体器件及其制造方法。 栅极覆盖层和/或保护绝缘膜（蚀刻阻挡层）具有堆叠在一起的多个绝缘材料，例如氧化物和氮化物。 利用这种结构，在层间绝缘层的蚀刻期间可以暴露具有比层间绝缘层的蚀刻速率低的蚀刻速率的绝缘层，并且可以使栅极堆叠形成得较薄，并且接触的纵横比 可以减少在装置中形成的孔。 本发明可以以这种方式实现薄栅堆叠，因此适用于在DRAM中使用的SAC。

    Deep trench filling method using silicon film deposition and silicon migration
    2.
    发明授权
    Deep trench filling method using silicon film deposition and silicon migration 失效
    使用硅膜沉积和硅迁移的深沟槽填充方法

    公开(公告)号：US5888876A

    公开(公告)日：1999-03-30

    申请号：US628094

    申请日：1996-04-09

    申请人： Jun-ichi Shiozawa ,  Yoshitaka Tsunashima ,  Katsuya Okumura

    发明人： Jun-ichi Shiozawa ,  Yoshitaka Tsunashima ,  Katsuya Okumura

    IPC分类号： H01L21/76 ,  H01L21/334 ,  H01L21/763 ,  H01L21/768 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/20

    CPC分类号： H01L29/66181 ,  H01L21/763 ,  H01L21/76877

    摘要： A method of filling one or more trenches formed in a silicon substrate includes the steps of forming a thin polycrystalline silicon film in a trench such that the thin polycrystalline silicon film is sufficiently thin so as to not close the trench; forming an amorphous silicon film on thin polycrystalline film and the surface of the substrate and in the trenches; and annealing the amorphous silicon film such that the amorphous silicon layer migrates to fill the trenches to a first level. The deposition and annealing steps are performed in ambient atmospheres having low partial pressures of H.sub.2 O and O.sub.2, the annealing temperature is higher than the deposition temperature, and the annealing pressure is greater than the deposition pressure.

    摘要翻译： 填充形成在硅衬底中的一个或多个沟槽的方法包括以下步骤：在沟槽中形成薄多晶硅膜，使得薄多晶硅膜足够薄以便不关闭沟槽; 在薄多晶膜和衬底的表面和沟槽中形成非晶硅膜; 以及使所述非晶硅膜退火，使得所述非晶硅层迁移以将所述沟槽填充至第一水平。 沉积和退火步骤在具有低的H 2 O和O 2分压的环境气氛中进行，退火温度高于沉积温度，并且退火压力大于沉积压力。

    Field effect transistor having elevated source and drain regions and methods of manufacturing the same
    3.
    发明授权
    Field effect transistor having elevated source and drain regions and methods of manufacturing the same 失效
    具有升高的源极和漏极区域的场效应晶体管及其制造方法

    公开(公告)号：US6091117A

    公开(公告)日：2000-07-18

    申请号：US373558

    申请日：1999-08-13

    申请人： Jun-ichi Shiozawa ,  Yoshitaka Tsunashima ,  Katsuya Okumura

    发明人： Jun-ichi Shiozawa ,  Yoshitaka Tsunashima ,  Katsuya Okumura

    IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L21/768 ,  H01L29/08

    CPC分类号： H01L29/66628 ,  H01L21/76895 ,  H01L29/0847

    摘要： A field effect transistor is manufactured by forming an isolating structure on a semiconductor substrate to define an active area. A gate structure is formed which is insulated from a surface of the active area of the semiconductor substrate. An amorphous silicon film is formed on the gate structure, on the surface of the semiconductor substrate, and on the isolating structure. A first portion of the amorphous silicon film is converted to an epitaxial film and a second portion of the amorphous silicon film is converted to a polysilicon film. Impurities are diffused throughout the polysilicon film and into an upper surface portion of said epitaxial film. The impurity doped polysilicon film and the upper surface portion of the epitaxial film are oxidized to form oxide films and the oxide films are removed so that the epitaxial film remains at least on the active area of the semiconductor substrate. Source and drain regions of the transistor are formed in the active area of the semiconductor substrate.

    摘要翻译： 通过在半导体衬底上形成隔离结构来限定有源区域来制造场效应晶体管。 形成与半导体衬底的有源区的表面绝缘的栅极结构。 在栅极结构，半导体衬底的表面和隔离结构上形成非晶硅膜。 将非晶硅膜的第一部分转变为外延膜，将非晶硅膜的第二部分转换为多晶硅膜。 杂质扩散到整个多晶硅膜并进入所述外延膜的上表面部分。 杂质掺杂多晶硅膜和外延膜的上表面部分被氧化以形成氧化物膜，并且去除氧化物膜，使得外延膜至少保留在半导体衬底的有源区上。 晶体管的源区和漏区形成在半导体衬底的有源区中。

    Field effect transistor having elevated source and drain regions and methods for manufacturing the same
    4.
    发明授权
    Field effect transistor having elevated source and drain regions and methods for manufacturing the same 失效
    形成具有升高的源极和漏极区域的场效应晶体管的方法

    公开(公告)号：US5970352A

    公开(公告)日：1999-10-19

    申请号：US64716

    申请日：1998-04-23

    申请人： Jun-ichi Shiozawa ,  Yoshitaka Tsunashima ,  Katsuya Okumura

    发明人： Jun-ichi Shiozawa ,  Yoshitaka Tsunashima ,  Katsuya Okumura

    IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L21/768 ,  H01L29/08

    CPC分类号： H01L29/66628 ,  H01L21/76895 ,  H01L29/0847

    摘要： A field effect transistor is manufactured by forming an isolating structure on a semiconductor substrate to define an active area. A gate structure is formed which is insulated from a surface of the active area of the semiconductor substrate. An amorphous silicon film is formed on the gate structure, on the surface of the semiconductor substrate, and on the isolating structure. A first portion of the amorphous silicon film is converted to an epitaxial film and a second portion of the amorphous silicon film is converted to a polysilicon film. Impurities are diffused throughout the polysilicon film and into an upper surface portion of said epitaxial film. The impurity doped polysilicon film and the upper surface portion of the epitaxial film are oxidized to form oxide films and the oxide films are removed so that the epitaxial film remains at least on the active area of the semiconductor substrate. Source and drain regions of the transistor are formed in the active area of the semiconductor substrate.

    摘要翻译： 通过在半导体衬底上形成隔离结构来限定有源区域来制造场效应晶体管。 形成与半导体衬底的有源区的表面绝缘的栅极结构。 在栅极结构，半导体衬底的表面和隔离结构上形成非晶硅膜。 将非晶硅膜的第一部分转变为外延膜，将非晶硅膜的第二部分转换为多晶硅膜。 杂质扩散到整个多晶硅膜并进入所述外延膜的上表面部分。 杂质掺杂多晶硅膜和外延膜的上表面部分被氧化以形成氧化物膜，并且去除氧化物膜，使得外延膜至少保留在半导体衬底的有源区上。 晶体管的源区和漏区形成在半导体衬底的有源区中。

    Method for manufacturing a semiconductor device
    6.
    发明授权
    Method for manufacturing a semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号：US06274512B1

    公开(公告)日：2001-08-14

    申请号：US09658508

    申请日：2000-09-08

    申请人： Hisataka Hayashi ,  Tokuhisa Ohiwa ,  Katsuya Okumura

    发明人： Hisataka Hayashi ,  Tokuhisa Ohiwa ,  Katsuya Okumura

    IPC分类号： H01L213605

    CPC分类号： H01L21/02043 ,  H01L21/28518

    摘要： A method comprises the steps of forming a damaged layer on a silicon substrate by subjecting the silicon substrate to a plasma treatment, forming a silicon oxide layer by exposing the surface of the damaged layer to an oxygen plasma to oxidize the surface of the silicon substrate including the damaged layer and selectively eliminating the silicon oxide layer under a condition of a high selective ratio to the silicon, in which the film thickness of the silicon oxide layer is controlled by controlling an ion energy of the oxygen plasma and exposure time of the surface of the damaged layer to the oxygen plasma in accordance with the film thickness of the damaged layer.

    摘要翻译： 一种方法包括以下步骤：通过对硅衬底进行等离子体处理，在硅衬底上形成损伤层，通过将损伤层的表面暴露于氧等离子体来氧化氧化硅层，以氧化硅衬底的表面，包括 损坏层，并且在与硅的选择率高的条件下选择性地除去氧化硅层，其中通过控制氧等离子体的离子能量和表面的暴露时间来控制氧化硅层的膜厚度 根据损伤层的膜厚度，氧等离子体的损伤层。

    Method of sequentially processing a plurality of lots each including semiconductor substrates
    8.
    发明授权
    Method of sequentially processing a plurality of lots each including semiconductor substrates 失效
    顺序处理包括半导体衬底的多个批次的方法

    公开(公告)号：US06911398B2

    公开(公告)日：2005-06-28

    申请号：US10107434

    申请日：2002-03-28

    申请人： Masaki Narita ,  Katsuya Okumura ,  Tokuhisa Ohiwa

    发明人： Masaki Narita ,  Katsuya Okumura ,  Tokuhisa Ohiwa

    IPC分类号： H01L21/302 ,  H01L21/00 ,  H01L21/205 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/66

    CPC分类号： H01L21/67271 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of making a semiconductor device, comprises preparing a plurality of lots each including semiconductor substrates to be processed, the plurality of lots including at least first and second lots, processing the plurality of lots for every one lot, using a semiconductor manufacturing apparatus, judging whether or not the semiconductor manufacturing apparatus is subjected to cleaning before the second lot is processed, depending upon both a first processing type of the first lot to be processed and a second processing type of the second lot to be processed after the first lot, and processing the second lot without the cleaning in the case where the second lot does not require the cleaning.

    摘要翻译： 一种制造半导体器件的方法，包括制备多个批次，每个批次包括要处理的半导体衬底，所述多个批次至少包括第一批次和第二批次，使用半导体制造装置处理每批的多个批次， 根据第一批次的待处理的第一处理类型和第一批次之后的待处理的第二批次的第二处理类型，判断半导体制造装置是否在处理第二批次之前进行清洁， 并且在第二批次不需要清洁的情况下处理第二批而不进行清洁。