公开(公告)号：US20210313169A1

公开(公告)日：2021-10-07

申请号：US17208216

申请日：2021-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjae SONG ,  Kaoru YAMAMOTO ,  Changhyun KIM ,  Shuji MORIYA ,  Jungsoo YOON ,  Soyoung LEE ,  Changseok LEE

IPC: H01L21/02 ,  H01L21/428 ,  H01L21/3213 ,  H01J37/32

Abstract: Provided are apparatuses for manufacturing semiconductor devices. An apparatus includes a reaction chamber having a stage to be loaded on a substrate, wherein set plasma is formed over the stage, a plurality of gas supply lines connected to the reaction chamber, flow controllers formed on the plurality of gas supply lines, respectively, to control the amount of a gas supplied to the reaction chamber, and a gas splitter configured to supply a mixed gas to the flow controllers. The apparatus may be a thin film deposition apparatus using plasma and further include a flow control unit connected to the gas splitter and a gas supply source connected to the flow control unit.

公开(公告)号：US20210146476A1

公开(公告)日：2021-05-20

申请号：US16906410

申请日：2020-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngchul KWON ,  Changhyun KIM ,  Byoungho LEE ,  Jangwoon SUNG ,  Junhyeok JANG ,  Chulsoo CHOI ,  Manhee HAN

IPC: B23K26/06 ,  B23K26/073

Abstract: A stealth dicing apparatus may include a laser light source, and a linearly focusing lens configured to linearly focus a beam output from the laser light source. The linearly focusing lens includes a horizontal surface, and an inclined surface forming an inclination angle with the horizontal surface. The inclination angle satisfies an expression 34.97R2−146.6R+162.5

公开(公告)号：US20180232585A1

公开(公告)日：2018-08-16

申请号：US15708978

申请日：2017-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM

IPC: G06K9/00 ,  G05D1/00 ,  G05D1/02 ,  G08G1/16

CPC classification number: G06K9/00825 ,  B60W2420/42 ,  G05D1/0088 ,  G05D1/0246 ,  G05D2201/0213 ,  G06K9/00798 ,  G06K9/00805 ,  G06K2209/23 ,  G06N3/0445 ,  G06N3/0454 ,  G06N3/08 ,  G06T2207/30256 ,  G08G1/167

Abstract: A processor implemented vehicle control method for autonomous driving includes: obtaining a driving image of a vehicle; determining a control parameter for controlling the vehicle in response to a driving situation of the vehicle by applying the driving image to a neural network; and transmitting the control parameter to an electronic control unit (ECU) of the vehicle for controlling the vehicle to drive autonomously, wherein the neural network comprises first layers in a convolutional structure and second layers in a recurrent structure, the driving image is applied to a first layer among the first layers, a last layer among the first layers is connected with a first layer among the second layers, and the control parameter is output from a last layer among the second layers.

公开(公告)号：US20180052457A1

公开(公告)日：2018-02-22

申请号：US15440138

申请日：2017-02-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changhyun KIM ,  Hyoa KANG ,  Changwoo SHIN ,  Baek Hwan CHO ,  Derek Daehyun JI

IPC: G05D1/00 ,  G05D1/02 ,  H04N13/02 ,  G06K9/00 ,  G06T7/593

CPC classification number: G05D1/0055 ,  G05D1/0251 ,  G05D2201/0213 ,  G06K9/00791 ,  G06T7/593 ,  G06T7/596 ,  G06T2207/10021 ,  G06T2207/10028 ,  G06T2207/10048 ,  G06T2207/30252 ,  H04N13/128 ,  H04N13/239 ,  H04N13/243 ,  H04N13/296 ,  H04N2013/0081

Abstract: Disclosed is a stereo camera-based autonomous driving method and apparatus, the method including estimating a driving situation of a vehicle, determining a parameter to control a stereo camera width of a stereo camera based on the estimated driving situation, controlling a capturer configured to control arrangement between two cameras of the stereo camera for a first direction based on the determined parameter, and measuring a depth of an object located in the first direction based on two images respectively captured by the two cameras with the controlled arrangement.

公开(公告)号：US20250107208A1

公开(公告)日：2025-03-27

申请号：US18976637

申请日：2024-12-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM ,  Seunggeol NAM ,  Keunwook SHIN ,  Dohyun LEE

IPC: H01L29/45 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device includes a first source/drain structure including a first semiconductor region and a first electrode in electrical contact with the first semiconductor region; a second source/drain structure including a second semiconductor region and a second electrode in electrical contact with the second semiconductor region; a channel between the first semiconductor region and the second semiconductor region; and a gate structure including a gate insulating film covering the channel and a gate electrode covering the gate insulating film. The first source/drain structure further includes a silicide film between the first semiconductor region and the first electrode and a conductive barrier between the silicide film and the first electrode. The conductive barrier includes a conductive two-dimensional material.

公开(公告)号：US20240304622A1

公开(公告)日：2024-09-12

申请号：US18416403

申请日：2024-01-18

Applicant: Samsung Electronics Co., Ltd. ,  THE UNIVERSITY OF CHICAGO

Inventor： Minsu SEOL ,  Ce LIANG ,  Jiwoong PARK ,  Kyung-Eun BYUN ,  Changhyun KIM

IPC: H01L27/092 ,  H01L21/02 ,  H01L21/8256 ,  H01L29/24 ,  H01L29/66 ,  H01L29/76

CPC classification number: H01L27/092 ,  H01L21/02568 ,  H01L21/8256 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7606

Abstract: Provided are a semiconductor device including a two-dimensional material and a method of manufacturing the semiconductor device. The semiconductor device may include a substrate, first and second two-dimensional material layers on the substrate and junctioned to each other in a lateral direction to form a coherent interface, a first source electrode and a first drain electrode on the first two-dimensional material layer, a first gate electrode between the first source electrode and the first drain electrode, a second source electrode and a second drain electrode on the second two-dimensional material layer, and a second gate electrode between the second source electrode and the second drain electrode.

公开(公告)号：US20240021676A1

公开(公告)日：2024-01-18

申请号：US18331463

申请日：2023-06-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM ,  Minsu SEOL ,  Junyoung KWON ,  Keunwook SHIN ,  Minseok YOO

IPC: H01L29/18 ,  H01L29/423 ,  H01L29/786 ,  H01L29/417 ,  H01L29/06 ,  H01L29/775 ,  H10B10/00 ,  H10B43/27

CPC classification number: H01L29/18 ,  H01L29/42392 ,  H01L29/78696 ,  H01L29/41733 ,  H01L29/0673 ,  H01L29/775 ,  H10B10/125 ,  H10B43/27

Abstract: A semiconductor device includes a channel including a two-dimensional (2D) semiconductor material, a source electrode and a drain electrode electrically connected to opposite sides of the channel, respectively, a transition metal oxide layer on the channel and including a transition metal oxide, a dielectric layer on the transition metal oxide layer and including a high-k material, and a gate electrode on the dielectric layer.

公开(公告)号：US20230123234A1

公开(公告)日：2023-04-20

申请号：US17703201

申请日：2022-03-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Kyung-Eun BYUN ,  Sangsoo LEE ,  Changhyun KIM ,  Changseok LEE

IPC: H01L29/786 ,  H01L29/16 ,  H01L27/11597 ,  H01L27/11582

Abstract: Provided is a thin film structure including a substrate, a metal layer on the substrate and spaced apart from the substrate, and a two-dimensional material layer between the substrate and the metal layer. The two-dimensional material layer may be configured to limit and/or block an electron transfer between the substrate and the metal layer. A resistivity of a metal layer on the two-dimensional material layer may be lowered by the two-dimensional material layer.

公开(公告)号：US20230081960A1

公开(公告)日：2023-03-16

申请号：US17697400

申请日：2022-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Eun BYUN ,  Sangwon KIM ,  Changhyun KIM ,  Keunwook SHIN ,  Changseok LEE

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/417 ,  H01L29/10 ,  H01L29/423

Abstract: A vertical channel transistor includes a first source/drain electrode; a second source/drain electrode spaced apart from the first source/drain electrode in a first direction; a first channel pattern between the first source/drain electrode and the second source/drain electrode; a first gate electrode on a side surface of the first channel pattern; a first gate insulation layer between the first channel pattern and the first gate electrode; and a first graphene insertion layer between the first source/drain electrode and the first channel pattern.

公开(公告)号：US20220328671A1

公开(公告)日：2022-10-13

申请号：US17539768

申请日：2021-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM ,  Hyeonjin SHIN ,  Minhyun LEE ,  Taejin CHOI ,  Sangwon KIM ,  Bongseob YANG ,  Eunkyu LEE

IPC: H01L29/76 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/16 ,  H01L29/20 ,  H01L29/24

Abstract: A field effect transistor structure is disclosed. The field effect transistor structure includes: a fin-shaped channel protruding from a substrate and extending in one direction; a source electrode on one side of the fin-shaped channel; a drain electrode separated from the source electrode with the fin-shaped channel therebetween; a gate insulating film surrounding side and upper surfaces of the fin-shaped channel; a gate electrode on the gate insulating film; and a two-dimensional semiconductor material layer between the gate insulating film and the gate electrode.