公开(公告)号：US11710673B2

公开(公告)日：2023-07-25

申请号：US17376883

申请日：2021-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Choongbin Yim ,  Dongwook Kim ,  Hyunki Kim ,  Jongbo Shim ,  Jihwang Kim ,  Sungkyu Park ,  Yongkwan Lee ,  Byoungwook Jang

IPC: H01L23/12 ,  H01L23/538

CPC classification number: H01L23/12 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386

Abstract: A semiconductor package including a first package substrate, a first semiconductor chip on the first package substrate, a first conductive connector on the first package substrate and laterally spaced apart from the first semiconductor chip, an interposer substrate on the first semiconductor chip and electrically connected to the first package substrate through the first conductive connector, the interposer substrate including a first portion overlapping the first semiconductor chip and a plurality of upper conductive pads in the first portion, a plurality of spacers on a lower surface of the first portion of the interposer substrate and positioned so as not to overlap the plurality of upper conductive pads in a plan view, and an insulating filler between the interposer substrate and the first package substrate may be provided.

公开(公告)号：US11469156B2

公开(公告)日：2022-10-11

申请号：US17203084

申请日：2021-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunki Kim ,  Sangsoo Kim ,  Seung Hwan Kim ,  Kyung Suk Oh ,  Yongkwan Lee ,  Jongho Lee

IPC: H01L23/433 ,  H01L25/065 ,  H01L23/00 ,  H01L23/367 ,  H01L25/07

Abstract: Disclosed is a semiconductor package comprising a package substrate, a first semiconductor chip on the package substrate and including a first region and a second region, a second semiconductor chip on the first region, a heat radiation spacer on the second region, a third semiconductor chip supported by the second semiconductor chip and the heat radiation spacer, and a molding layer covering the first to third semiconductor chips and the heat radiation spacer.

公开(公告)号：US10978374B2

公开(公告)日：2021-04-13

申请号：US16285480

申请日：2019-02-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunki Kim ,  Sangsoo Kim ,  Seung Hwan Kim ,  Kyung Suk Oh ,  Yongkwan Lee ,  Jongho Lee

IPC: H01L23/433 ,  H01L25/065 ,  H01L23/367 ,  H01L25/07 ,  H01L23/00

Abstract: Disclosed is a semiconductor package comprising a package substrate, a first semiconductor chip on the package substrate and including a first region and a second region, a second semiconductor chip on the first region, a heat radiation spacer on the second region, a third semiconductor chip supported by the second semiconductor chip and the heat radiation spacer, and a molding layer covering the first to third semiconductor chips and the heat radiation spacer.

公开(公告)号：US20250118689A1

公开(公告)日：2025-04-10

申请号：US18782386

申请日：2024-07-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongkwan Lee ,  Hyunki Kim ,  Youngmin Lee ,  Hyeon Hwang

IPC: H01L23/00 ,  H01L25/18 ,  H10B80/00

Abstract: A semiconductor package includes a substrate having first and second sides, pads disposed on the substrate and including first and second bonding pads adjacent to the first and second sides, respectively, and upper pads between the first and second bonding pads, a passivation layer disposed on the substrate and exposing the first and second bonding pads, a solder resist layer disposed on the passivation layer, a first chip structure on the solder resist layer, adjacent to the first side and electrically connected to the first bonding pads, a second chip structure on the solder resist layer, adjacent to the second side and electrically connected to the second bonding pads, a controller on the solder resist layer between the first and the second chip structure, and a connection structure penetrating the passivation layer and the solder resist layer and electrically connecting the controller and the upper pads.

公开(公告)号：US12132007B2

公开(公告)日：2024-10-29

申请号：US18103584

申请日：2023-01-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongwan Kim ,  Kyong Hwan Koh ,  Juhyeon Oh ,  Yongkwan Lee

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L21/568 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16227

Abstract: A semiconductor package including a substrate including at least one ground pad and a ground pattern; a semiconductor chip on the substrate; and a shield layer on the substrate and covering the semiconductor chip, wherein the shield layer extends onto a bottom surface of the substrate and includes an opening region on the bottom surface of the substrate, a bottom surface of the at least one ground pad is at the bottom surface of the substrate, a side surface of the ground pattern is at a side surface of the substrate, and the shield layer on the bottom surface of the substrate is in contact with the bottom surface of the at least one ground pad and in contact with the side surface of the ground pattern.

公开(公告)号：US12087650B2

公开(公告)日：2024-09-10

申请号：US18315558

申请日：2023-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyoung Oh ,  Hyunggil Baek ,  Seunghwan Kim ,  Jungjoo Kim ,  Jongho Park ,  Yongkwan Lee

IPC: H01L23/16 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/16 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/5389 ,  H01L25/0657

Abstract: A semiconductor package is provided. The semiconductor package includes: a first package substrate; a first semiconductor chip on the first package substrate; an interposer substrate including a lower surface facing the first package substrate, an upper surface opposite to the lower surface, and an upper conductive pad in the upper surface of the interposer substrate; a first dam structure on the upper surface of the interposer substrate and extending along an edge of the upper conductive pad; a first molding layer in contact with the lower and upper surfaces of the interposer substrate and with an outer wall of the first dam structure; and a conductive connector in contact with an inner wall of the at least one first dam structure and with the upper conductive pad.

公开(公告)号：US11742294B2

公开(公告)日：2023-08-29

申请号：US17306290

申请日：2021-05-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongho Park ,  Seunghwan Kim ,  Junyoung Oh ,  Yonghyun Kim ,  Yongkwan Lee ,  Junga Lee

IPC: H01L23/13 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498 ,  H01L25/10 ,  H01L23/31

CPC classification number: H01L23/5385 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058

Abstract: A semiconductor package includes a first package substrate; a first semiconductor chip on the first package substrate; a first conductive connector on the first package substrate; and an interposer including a central portion on the first semiconductor chip and an outer portion having the first conductive connector attached thereto. The central portion of the interposer includes a bottom surface defining a recess from a bottom surface of the outer portion of the interposer in a vertical direction that is perpendicular to a top surface of the first package substrate. A thickness in the vertical direction of the outer portion of the interposer is greater than a thickness in the vertical direction of the central portion of the interposer.

公开(公告)号：US20230082412A1

公开(公告)日：2023-03-16

申请号：US17747131

申请日：2022-05-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongkwan Lee ,  Seunghwan Kim ,  Jungjoo Kim ,  Jongwan Kim ,  Junwoo Park

IPC: H01L23/367 ,  H01L25/065 ,  H01L25/16 ,  H01L23/498 ,  H01L23/48

Abstract: A semiconductor package is provided. The semiconductor package includes a package substrate, an interposer including a lower protective layer, conductive connectors connecting the package substrate to the interposer, a semiconductor chip arranged between the package substrate and the interposer, and cooling patches arranged between the semiconductor chip and the interposer and having cylindrical shapes, wherein each of the cooling patches includes the same material as each of the conductive connectors, a height of each of the cooling patches is less than or equal to a diameter of each of the cooling patches, and thermal conductivity of each of the cooling patches is greater than thermal conductivity of the lower protective layer.

公开(公告)号：US11538801B2

公开(公告)日：2022-12-27

申请号：US17220468

申请日：2021-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongho Park ,  Seung Hwan Kim ,  Jun Young Oh ,  Jungjoo Kim ,  Yongkwan Lee ,  Dong-Ju Jang

IPC: H01L25/18 ,  H01L23/538 ,  H01L25/00 ,  H01L23/00

Abstract: A semiconductor package includes a first substrate that includes a first trench on a recessed portion of a bottom surface of the first substrate and a first through hole extending through the first substrate to the first trench, a first semiconductor chip on the first substrate, a first capacitor chip in the first trench and on the first substrate, and a first molding layer on the first substrate and covering the first semiconductor chip. The first molding layer includes a first part that extends parallel to a top surface of the first substrate, a second part connected to the first part and extending vertically in the first through hole, and a third part connected to the second part and surrounding the first capacitor chip. A bottom surface of the third part is coplanar with the bottom surface of the first substrate.

公开(公告)号：US11508713B2

公开(公告)日：2022-11-22

申请号：US17168706

申请日：2021-02-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyoung Oh ,  Kyonghwan Koh ,  Sangsoo Kim ,  Seunghwan Kim ,  Jongho Park ,  Yongkwan Lee

IPC: H01L21/56 ,  H01L25/00 ,  H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/78 ,  H01L25/065

Abstract: A method of manufacturing a semiconductor package includes forming a laser reactive polymer layer on a substrate; mounting a semiconductor device on the substrate; irradiating at least a portion of the laser reactive polymer layer below the semiconductor device with a laser having a wavelength capable of penetrating through the semiconductor device on the substrate to modify the laser reactive polymer layer to have a hydrophilic functional group; and forming a first encapsulation material layer between the semiconductor device and the substrate.