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公开(公告)号：US11915647B2
公开(公告)日：2024-02-27
申请号：US17765599
申请日：2019-10-02
发明人： Takayuki Nishiyama
IPC分类号： G09G3/32 , G09G3/3233 , G09G3/3291
CPC分类号： G09G3/3233 , G09G3/3291 , G09G2300/0842 , G09G2310/027
摘要： A pixel circuit includes an organic EL element configured to emit light, a capacitor configured to hold a data voltage, a drive transistor with a data gate connected to one electrode of the capacitor, and a diode connection transistor connected between a source of the drive transistor and the organic EL element. A source of the diode connection transistor is connected to a back gate of the drive transistor. In a case where a channel length of the drive transistor is taken as L1, a channel length of the diode connection transistor is taken as L2, a ratio of a channel width to a channel length of the drive transistor is taken as (W/L)1, and a ratio of a channel width to a channel length of the diode connection transistor is taken as (W/L)2, a relation of L1
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公开(公告)号：US11910671B2
公开(公告)日：2024-02-20
申请号：US17436537
申请日：2019-03-28
IPC分类号： H01L23/00 , H10K59/131 , G09G3/3266 , G09G3/3275 , H10K59/121
CPC分类号： H10K59/131 , G09G3/3266 , G09G3/3275 , H10K59/1213 , H10K59/1216 , G09G2310/0278
摘要： With respect to a display device having an external compensation function, a monitor time can be shortened without increasing the number of wiring lines. A pixel circuit in an i-th row and a j-th column includes an organic EL element (display element), a writing control transistor, a drive transistor, a monitor control transistor, and a holding capacitor. A control terminal of the drive transistor is connected to a data signal line S(j) in the j-th column via the write control transistor. The monitor control transistor includes a first conduction terminal connected to a second conduction terminal of the drive transistor, and a second conduction terminal connected to a data signal line S(j+1) in a (j+1)-th column.
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公开(公告)号：US10235956B2
公开(公告)日：2019-03-19
申请号：US15305798
申请日：2015-04-21
IPC分类号： G09G3/36 , G02F1/133 , G02F1/1368 , G09G3/20 , G02F1/1335 , G02F1/1362
摘要： A technique of, in the case of changing, at predetermined time intervals, a drive circuit for switching a gate line to a selected state, preventing a stopped drive circuit from malfunctioning is provided. Each of a plurality of drive circuits provided for each gate line in an active-matrix substrate includes: a selection circuit unit including an output switching element that is turned on to apply a voltage to the gate line in response to a control signal; an internal line connected to a gate terminal of the output switching element and the gate line; and a potential control circuit unit connected to the internal line for controlling a potential of the internal line in response to the control signal. At predetermined time intervals, a signal supply unit: supplies, to at least one of the plurality of drive circuits, a potential control signal so that the potential of the internal line is controlled to be lower than a threshold voltage of the output switching element by the potential control circuit unit; and supplies, to each of the other drive circuits, a drive signal so that a selection voltage is applied to the gate line by the selection circuit unit.
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公开(公告)号：US10115369B2
公开(公告)日：2018-10-30
申请号：US15307040
申请日：2015-04-22
IPC分类号： G09G3/36 , G02F1/1362 , G02F1/1368 , G09F9/30 , G09F9/35 , G09G3/20 , G02F1/1335 , G02F1/1333 , G02F1/1343
摘要： To reduce the parasitic capacitance of a driving circuit and definitely switches a gate line to a selection state, an active matrix substrate is provided. The active matrix substrate includes a driving circuit that switches a gate line (13G) to a selection state in a pixel region defined by a source line (15S) and the gate line (13G). The driving circuit includes: a plurality of switching elements including an output switching element (TFT-F) that supplies a selection voltage to the gate line; and an internal line (netA) to which a gate terminal of the output switching element (TFT-F) and at least a first switching element of the switching elements other than the output switching element are connected. The active matrix substrate includes a reduction part (C1 and C2) that reduce the parasitic capacitance of the driving circuit in the pixel region in which at least one of the internal line and the first switching element is located.
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公开(公告)号：US09939696B2
公开(公告)日：2018-04-10
申请号：US15305394
申请日：2015-04-28
IPC分类号： G09G3/36 , G02F1/1362 , G02F1/1343 , G02F1/1368 , G09F9/30 , H01L21/822 , H01L27/04 , H01L29/786 , H01L27/02 , H01L27/12
CPC分类号： G02F1/136204 , G02F1/1343 , G02F1/1368 , G09F9/30 , G09G3/3648 , G09G3/3688 , G09G2300/0413 , G09G2300/0426 , G09G2300/08 , G09G2310/08 , G09G2330/04 , G09G2330/08 , H01L21/822 , H01L27/0255 , H01L27/0266 , H01L27/04 , H01L27/1244 , H01L29/786
摘要： Provided is an active matrix substrate that can protected from static electricity, with the frame region being narrowed. An active matrix substrate (20a) includes a plurality of first lines (GL), a plurality of second lines (SL), and a protection part (50). The first lines are formed in a display region (30). The second lines are formed in the display region, and intersect with the first lines. The protection part protects the active matrix substrate from static electricity. The protection part includes a plurality of first protection circuits (50A), and a conductive unit (50B). The first protection circuits are connected to each of the first lines in the display region. The conductive unit is connected to each of the first protection circuits in the display region. Each of the first protection circuits, according to a potential of the first line to which the first protection circuit is connected, allows the first line and the conductive unit to be conductive with each other.
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公开(公告)号：US09760102B2
公开(公告)日：2017-09-12
申请号：US15253152
申请日：2016-08-31
发明人： Kohei Tanaka , Hidefumi Yoshida , Takeshi Noma , Ryo Yonebayashi , Takayuki Nishiyama , Mitsuhiro Murata , Yosuke Iwata
IPC分类号： G09G5/00 , G05F1/46 , G02F1/1368 , G02F1/1362 , H03K17/042 , H03K17/16 , H03K17/687 , G09G3/36 , G02F1/1333 , G02F1/1335 , G02F1/1345 , H01L27/12 , H01L27/32
CPC分类号： G05F1/467 , G02F1/133308 , G02F1/133514 , G02F1/13454 , G02F1/136213 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0251 , G09G2310/0281 , G09G2310/0286 , G09G2320/0223 , H01L27/124 , H01L27/1255 , H01L27/3272 , H03K17/04206 , H03K17/165 , H03K17/687
摘要： A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
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公开(公告)号：US09429791B2
公开(公告)日：2016-08-30
申请号：US14374239
申请日：2013-01-25
IPC分类号： G02F1/13 , G02F1/1335 , G02F1/13363 , G02F1/1337
CPC分类号： G02F1/133528 , G02F1/13363 , G02F2001/133541 , G02F2001/133638 , G02F2001/133742 , G02F2413/04 , G02F2413/06 , G02F2413/08
摘要： The present invention provides a liquid crystal display device which can achieve cost reduction, excellent productivity, and a high contrast ratio within a wide viewing angle range. The liquid crystal display device of the present invention includes, in the order set forth, a first polarizer, a first λ/4 plate, a liquid crystal cell, a second λ/4 plate, a third Type-I birefringent layer, a Type-IV birefringent layer, and a second polarizer. An in-plane slow axis of the first λ/4 plate forms an angle of about 45° with an absorption axis of the first polarizer. An in-plane slow axis of the second λ/4 plate is substantially perpendicular to the in-plane slow axis of the first λ/4 plate. An absorption axis of the second polarizer is substantially perpendicular to the absorption axis of the first polarizer. An in-plane slow axis of the third Type-I birefringent layer is substantially parallel with the absorption axis of the second polarizer. The liquid crystal display device displays a black screen by aligning liquid crystal molecules in the liquid crystal layer in the direction substantially vertical to the substrate surface.
摘要翻译： 本发明提供一种液晶显示装置，其可以实现成本降低，生产率优异，并且在宽视角范围内具有高对比度。 本发明的液晶显示装置按照以下顺序包括第一偏振器，第一λ/ 4板，液晶单元，第二λ/ 4板，第三I型双折射层，类型 -IV双折射层和第二偏振器。 第一λ/ 4板的面内慢轴与第一偏振片的吸收轴形成约45°的角度。 第二λ/ 4板的面内慢轴基本上垂直于第一λ/ 4板的面内慢轴。 第二偏振器的吸收轴基本上垂直于第一偏振器的吸收轴。 第三I型双折射层的平面内慢轴与第二偏振片的吸收轴基本平行。 液晶显示装置通过使液晶层中的液晶分子沿与基板表面大致垂直的方向排列黑屏。
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公开(公告)号：US20150249069A1
公开(公告)日：2015-09-03
申请号：US14429536
申请日：2013-09-25
IPC分类号： H01L25/075 , H01L33/50 , H01L33/38 , H01L33/62 , H01L33/58
CPC分类号： H01L25/0753 , H01L33/387 , H01L33/505 , H01L33/58 , H01L33/62 , H01L2224/13 , H01L2933/0016 , H01L2933/0058 , H01L2933/0066
摘要： Provided is a low cost and high resolution display device having light-emitting elements. An LED element is provided in a region between a first substrate and a second substrate, the region being an intersection region where a first electrode and a second electrode intersect each other in a plan view, and the LED element is provided with a first element electrode connected to the first electrode and provided on a bottom surface, and a second element electrode connected to a second electrode and provided on a top surface.
摘要翻译： 提供了具有发光元件的低成本和高分辨率显示装置。 LED元件设置在第一基板和第二基板之间的区域中，该区域是第一电极和第二电极在平面图中彼此相交的交叉区域，并且LED元件设置有第一元件电极 连接到第一电极并设置在底表面上，第二元件电极连接到第二电极并设置在顶表面上。
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