Multi-chip module leadless package
    22.
    发明授权

    公开(公告)号:US12142550B2

    公开(公告)日:2024-11-12

    申请号:US18086981

    申请日:2022-12-22

    Abstract: A multi-chip module (MCM) package includes a leadframe including half-etched lead terminals including a full-thickness and half-etched portion, and second lead terminals including a thermal pad(s). A first die is attached by a dielectric die attach material to the half-etched lead terminals. The first die includes first bond pads coupled to first circuitry configured for receiving a control signal and for outputting a coded signal and a transmitter. The second die includes second bond pads coupled to second circuitry configured for a receiver with a gate driver. The second die is attached by a conductive die attach material to the thermal pad. Bond wires include die-to-die bond wires between a portion of the first and second bond pads. A high-voltage isolation device is between the transmitter and receiver. A mold compound encapsulates the first and the second die.

    Multi-chip module leadless package
    23.
    发明授权

    公开(公告)号:US11538741B2

    公开(公告)日:2022-12-27

    申请号:US17177910

    申请日:2021-02-17

    Abstract: A multi-chip module (MCM) package includes a leadframe including half-etched lead terminals including a full-thickness and half-etched portion, and second lead terminals including a thermal pad(s). A first die is attached by a dielectric die attach material to the half-etched lead terminals. The first die includes first bond pads coupled to first circuitry configured for receiving a control signal and for outputting a coded signal and a transmitter. The second die includes second bond pads coupled to second circuitry configured for a receiver with a gate driver. The second die is attached by a conductive die attach material to the thermal pad. Bond wires include die-to-die bond wires between a portion of the first and second bond pads. A high-voltage isolation device is between the transmitter and receiver. A mold compound encapsulates the first and the second die.

    Packaged semiconductor system having unidirectional connections to discrete components

    公开(公告)号:US10566276B2

    公开(公告)日:2020-02-18

    申请号:US15807114

    申请日:2017-11-08

    Abstract: A packaged semiconductor system, including: at least one electronic device on a device mounting surface of a substrate having terminals for attaching bond wires; at least one discrete component adjacent to the at least one electronic device, a second electrode of the at least one discrete component parallel to and spaced from a first electrode by a component body; the first electrode a metal foil having a protrusion extending laterally from the body and having a surface facing towards the second electrode; bonding wires interconnecting respective terminals of the at least one electronic device, the first electrode and the second electrode, and bonded to the surface of the second electrode and to the protrusion that extend away from the respective surfaces in a same direction; and packaging compound covering portions of the at least one electronic device, the at least one discrete component, and the bonding wires.

Patent Agency Ranking