公开(公告)号：US20240297166A1

公开(公告)日：2024-09-05

申请号：US18664483

申请日：2024-05-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shang-Yun Hou ,  Sung-Hui Huang ,  Kuan-Yu Huang ,  Hsien-Pin Hu ,  Yushun Lin ,  Heh-Chang Huang ,  Hsing-Kuo Hsia ,  Chih-Chieh Hung ,  Ying-Ching Shih ,  Chin-Fu Kao ,  Wen-Hsin Wei ,  Li-Chung Kuo ,  Chi-Hsi Wu ,  Chen-Hua Yu

IPC: H01L25/00 ,  H01L21/48 ,  H01L23/00 ,  H01L23/24 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L25/50 ,  H01L21/4803 ,  H01L21/4853 ,  H01L23/24 ,  H01L23/3128 ,  H01L23/49827 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/1144 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/18161

Abstract: An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.

公开(公告)号：US12051668B2

公开(公告)日：2024-07-30

申请号：US18324514

申请日：2023-05-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Yu Huang ,  Li-Chung Kuo ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Tsung-Yu Chen ,  Chien-Yuan Huang

IPC: H01L23/00 ,  H01L21/60 ,  H01L23/32 ,  H01L25/065

CPC classification number: H01L24/27 ,  H01L23/32 ,  H01L24/94 ,  H01L24/95 ,  H01L25/0657 ,  H01L2021/60097

Abstract: A method of forming a semiconductor device includes applying an adhesive material in a first region of an upper surface of a substrate, where applying the adhesive material includes: applying a first adhesive material at first locations of the first region; and applying a second adhesive material at second locations of the first region, the second adhesive material having a different material composition from the first adhesive material. The method further includes attaching a ring to the upper surface of the substrate using the adhesive material applied on the upper surface of the substrate, where the adhesive material is between the ring and the substrate after the ring is attached.

公开(公告)号：US20240071849A1

公开(公告)日：2024-02-29

申请号：US17822476

申请日：2022-08-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jian-You Chen ,  Kuan-Yu Huang ,  Li-Chung Kuo ,  Chen-Hsuan Tsai ,  Kung-Chen Yeh ,  Hsien-Ju Tsou ,  Ying-Ching Shih ,  Szu-Wei Lu

IPC: H01L23/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/16 ,  H01L21/4857 ,  H01L21/56 ,  H01L23/3157 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/16 ,  H01L2224/16227

Abstract: A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.

公开(公告)号：US11842936B2

公开(公告)日：2023-12-12

申请号：US17384923

申请日：2021-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wei Chen ,  Li-Chung Kuo ,  Ying-Ching Shih ,  Szu-Wei Lu ,  Jing-Cheng Lin ,  Long Hua Lee ,  Kuan-Yu Huang

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/3135 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/0651 ,  H01L2225/0652

Abstract: A method for forming an underfill structure and semiconductor packages including the underfill structure are disclosed. In an embodiment, the semiconductor package may include a package including an integrated circuit die; an interposer bonded to the integrated circuit die by a plurality of die connectors; and an encapsulant surrounding the integrated circuit die. The semiconductor package may further include a package substrate bonded to the interposer by a plurality of conductive connectors; a first underfill between the package and the package substrate, the first underfill having a first coefficient of thermal expansion (CTE); and a second underfill surrounding the first underfill, the second underfill having a second CTE less than the first CTE.

公开(公告)号：US20230253280A1

公开(公告)日：2023-08-10

申请号：US18194876

申请日：2023-04-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Yu-Wei Chen ,  Li-Chung Kuo ,  Ying-Ching Shih ,  Szu-Wei Lu ,  Jing-Cheng Lin ,  Long Hua Lee ,  Kuan-Yu Huang

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/3135 ,  H01L23/3128 ,  H01L23/49816 ,  H01L21/563 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/0651 ,  H01L2225/0652

Abstract: A method for forming an underfill structure and semiconductor packages including the underfill structure are disclosed. In an embodiment, the semiconductor package may include a package including an integrated circuit die; an interposer bonded to the integrated circuit die by a plurality of die connectors; and an encapsulant surrounding the integrated circuit die. The semiconductor package may further include a package substrate bonded to the interposer by a plurality of conductive connectors; a first underfill between the package and the package substrate, the first underfill having a first coefficient of thermal expansion (CTE); and a second underfill surrounding the first underfill, the second underfill having a second CTE less than the first CTE.

公开(公告)号：US11694939B2

公开(公告)日：2023-07-04

申请号：US16881004

申请日：2020-05-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sung-Hui Huang ,  Shang-Yun Hou ,  Tien-Yu Huang ,  Heh-Chang Huang ,  Kuan-Yu Huang ,  Shu-Chia Hsu ,  Yu-Shun Lin

IPC: H01L23/31 ,  H01L25/16

CPC classification number: H01L23/3185 ,  H01L25/167

Abstract: A semiconductor package includes a substrate, a stacked structure, an encapsulation material, a lid structure, and a coupler. The stacked structure is disposed over and bonded to the substrate. The encapsulation material partially encapsulates the stacked structure. The lid structure is disposed on the substrate, wherein the lid structure surrounds the stacked structure and covers a top surface of the stacked structure. The coupler is bonded to the stacked structure, wherein a portion of the coupler penetrates through and extends out of the lid structure.

公开(公告)号：US11502015B2

公开(公告)日：2022-11-15

申请号：US16885304

申请日：2020-05-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Wei Shen ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Kuan-Yu Huang

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00 ,  H01L21/268 ,  H01L23/29

Abstract: Semiconductor package includes interposer, dies, encapsulant. Each die includes active surface, backside surface, side surfaces. Backside surface is opposite to active surface. Side surfaces join active surface to backside surface. Encapsulant includes first material and laterally wraps dies. Dies are electrically connected to interposer and disposed side by side on interposer with respective backside surfaces facing away from interposer. At least one die includes an outer corner. A rounded corner structure is formed at the outer corner. The rounded corner structure includes second material different from first material. The outer corner is formed by backside surface and a pair of adjacent side surfaces of the at least one die. The side surfaces of the pair have a common first edge. Each side surface of the pair does not face other dies and has a second edge in common with backside surface of the at least one die.

公开(公告)号：US11270956B2

公开(公告)日：2022-03-08

申请号：US16917920

申请日：2020-07-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Shang-Yun Hou

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L21/56 ,  H01L21/78 ,  H01L23/48

Abstract: A semiconductor device including a first semiconductor die, a second semiconductor die, an insulating encapsulation and a warpage control pattern is provided. The first semiconductor die includes an active surface and a rear surface opposite to the active surface. The second semiconductor die is disposed on the active surface of the first semiconductor die. The insulating encapsulation is disposed on the active surface of the first semiconductor die and laterally encapsulates the second semiconductor die. The warpage control pattern is disposed on and partially covers the rear surface of the first semiconductor die.

公开(公告)号：US20210358825A1

公开(公告)日：2021-11-18

申请号：US17384923

申请日：2021-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wei Chen ,  Li-Chung Kuo ,  Ying-Ching Shih ,  Szu-Wei Lu ,  Jing-Cheng Lin ,  Long Hua Lee ,  Kuan-Yu Huang

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065

Abstract: A method for forming an underfill structure and semiconductor packages including the underfill structure are disclosed. In an embodiment, the semiconductor package may include a package including an integrated circuit die; an interposer bonded to the integrated circuit die by a plurality of die connectors; and an encapsulant surrounding the integrated circuit die. The semiconductor package may further include a package substrate bonded to the interposer by a plurality of conductive connectors; a first underfill between the package and the package substrate, the first underfill having a first coefficient of thermal expansion (CTE); and a second underfill surrounding the first underfill, the second underfill having a second CTE less than the first CTE.

公开(公告)号：US11024616B2

公开(公告)日：2021-06-01

申请号：US16413612

申请日：2019-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wei Chen ,  Li-Chung Kuo ,  Long-Hua Lee ,  Szu-Wei Lu ,  Ying-Ching Shih ,  Kuan-Yu Huang

IPC: H01L25/11 ,  H01L23/538 ,  H01L23/498 ,  H01L25/00 ,  H01L23/31 ,  H01L25/10 ,  H01L23/00 ,  H01L21/56 ,  H01L23/29

Abstract: Provided is a package structure including at least two chips, an interposer, a first encapsulant, and a second encapsulant. The at least two chips are disposed side by side and bonded to the interposer by a plurality of connectors. The first encapsulant is disposed on the interposer and filling in a gap between the at least two chips. The second encapsulant encapsulates the plurality of connectors and surrounding the at least two chips, wherein the second encapsulant is in contact with the first encapsulant sandwiched between the at least two chips, and a material of the second encapsulant has a coefficient of thermal expansion (CTE) larger than a CTE of a material of the first encapsulant. A method of manufacturing a package structure is also provided.