公开(公告)号：US20050087869A1

公开(公告)日：2005-04-28

申请号：US10808158

申请日：2004-03-23

申请人： Takao Nakamura ,  Hiroki Mori ,  Koji Katayama

发明人： Takao Nakamura ,  Hiroki Mori ,  Koji Katayama

IPC分类号： H01L33/06 ,  H01L33/28 ,  H01S5/327 ,  H01L23/48

CPC分类号： H01L33/04 ,  B82Y20/00 ,  H01L33/28 ,  H01L2224/48463

摘要： A semiconductor optical device comprises a superlattice contact semiconductor region and a metal electrode. The superlattice contact semiconductor region has a superlattice structure. The superlattice contact semiconductor region includes a II-VI compound semiconductor region and a II-VI compound semiconductor layer. The II-VI compound semiconductor region contains zinc, selenium and tellurium, and the II-VI compound semiconductor layer contains zinc and selenium. The metal electrode is provided on said superlattice contact semiconductor region and the metal electrode is electrically bonded to the first II-VI compound semiconductor layer.

摘要翻译： 半导体光学器件包括超晶格接触半导体区域和金属电极。 超晶格接触半导体区域具有超晶格结构。 超晶格接触半导体区域包括II-VI族化合物半导体区域和II-VI族化合物半导体层。 II-VI化合物半导体区域含有锌，硒和碲，II-VI化合物半导体层含有锌和硒。 金属电极设置在所述超晶格接触半导体区域上，金属电极与第一II-VI族化合物半导体层电连接。

公开(公告)号：US20050062060A1

公开(公告)日：2005-03-24

申请号：US10923046

申请日：2004-08-23

申请人： Youichi Nagai ,  Makoto Kiyama ,  Takao Nakamura ,  Takashi Sakurada ,  Katsushi Akita ,  Koji Uematsu ,  Ayako Ikeda ,  Koji Katayama ,  Susumui Yoshimoto

发明人： Youichi Nagai ,  Makoto Kiyama ,  Takao Nakamura ,  Takashi Sakurada ,  Katsushi Akita ,  Koji Uematsu ,  Ayako Ikeda ,  Koji Katayama ,  Susumui Yoshimoto

IPC分类号： H01L29/24 ,  H01L33/06 ,  H01L33/12 ,  H01L33/32 ,  H01L33/40 ,  H01L33/50 ,  H01L33/54 ,  H01L33/56 ,  H01L33/60 ,  H01L33/62

CPC分类号： H01L33/32 ,  H01L33/20 ,  H01L33/382 ,  H01L33/505 ,  H01L33/507 ,  H01L33/58 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/2076 ,  H01L2224/05599 ,  H01L2924/00011 ,  H01L2224/45099

摘要： In order to provide light emitting devices which have simple constructions and thus can be fabricated easily, and can stably provide high light emission efficiencies for a long time period, a light emitting device includes an n-type nitride semiconductor layer at a first main surface side of a nitride semiconductor substrate, a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at the first main surface side and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer at the first main surface side. The nitride semiconductor substrate has a resistivity of 0.5 Ω·cm or less and the p-type nitride semiconductor layer side is down-mounted so that light is emitted from the second main surface of the nitride semiconductor substrate at the opposite side from the first main surface.

摘要翻译： 为了提供具有简单结构并因此可以容易地制造并且可以长期稳定地提供高发光效率的发光器件，发光器件在第一主表面侧包括n型氮化物半导体层 的氮化物半导体衬底，比在第一主表面侧的n型氮化物半导体层更远离氮化物半导体衬底设置的p型氮化物半导体层，以及放置在n型氮化物半导体层和 在第一主表面侧的p型氮化物半导体层。 氮化物半导体衬底的电阻率为0.5Ω·cm以下，p型氮化物半导体层侧被下放，使得从氮化物半导体衬底的第二主表面在与第一主体相反的一侧发射光 表面。

公开(公告)号：US06693728B1

公开(公告)日：2004-02-17

申请号：US09562140

申请日：2000-05-01

申请人： Hiroyuki Kinoshita ,  Takao Nakamura

发明人： Hiroyuki Kinoshita ,  Takao Nakamura

IPC分类号： H04N121

CPC分类号： H04N1/00519 ,  H04N2201/0094

摘要： The present invention relates to a recording apparatus provided with recording device for effecting recording on a sheet which has sheet containing device provided detachably attachably to a main body of the apparatus, sheet supporting device disposed in the sheet containing device, for supporting the sheet, lift device for lifting the sheet supporting device from the sheet containing device in operative association with an operation of attaching the sheet containing device to the main body of the apparatus, and sheet feeding device for feeding the sheet from the sheet feeding device for feeding the sheet from the sheet supporting device lifted by the lift device toward the recording device.

摘要翻译： 本发明涉及一种具有记录装置的记录装置，该记录装置用于对片材进行记录，该片材具有可装卸地安装在该装置的主体上的片材容纳装置，设置在片材容纳装置中的片材支撑装置，用于支撑片材，提升装置 用于从片材容纳装置提升片材支撑装置的装置，其与将片材容纳装置附接到装置的主体的操作有关;以及片材进给装置，用于从片材进给装置供给片材，以将片材从 所述片材支撑装置由提升装置朝向记录装置提升。

公开(公告)号：US5985402A

公开(公告)日：1999-11-16

申请号：US933893

申请日：1992-08-24

申请人： Takao Nakamura ,  Takaaki Shirakura ,  Hiroyuki Kataoka

发明人： Takao Nakamura ,  Takaaki Shirakura ,  Hiroyuki Kataoka

IPC分类号： G11B5/60 ,  G11B5/64 ,  G11B5/73 ,  G11B5/82 ,  G11B5/84 ,  G11B19/04 ,  G11B5/66

CPC分类号： G11B5/7315 ,  G11B5/64 ,  G11B5/82 ,  G11B5/84 ,  G11B5/8404 ,  G11B19/04 ,  G11B5/6011 ,  Y10T428/24355

摘要： In a thin film magnetic disk, a micro projections are formed on a substrate in a circumferential direction. A height of the micro projections is several nm to several tens of nm and a density of the micro projections is several hundred pcs/mm to several tens of thousands of pcs/mm.sup.2. With this arrangement, a magnetic disk fulfilling a head floating characteristic of a narrow space and further fulfilling a mechanical anti-sliding characteristic such as a contact start-stops characteristic and a head stickiness and the like is provided so that high reliability is attained. In the thin film magnetic disk, a bearing ratio curve of a sectional shape measured in a radial direction of the textured substrate has a bearing ratio of 0.1 to 10% at the surface layer (a cutting height of 5 to 10 nm). In this way, a pressure receiving area under a sliding of the magnetic head is increased.

摘要翻译： 在薄膜磁盘中，在圆周方向上在基板上形成微突起。 微突起的高度为几nm至几十nm，微突起的密度为几百个/ mm至几万个/ mm 2。 通过这种布置，提供了满足狭窄空间的磁头浮动特性并进一步实现诸如触点启动 - 停止特性和磁头粘性等的机械防滑特性的磁盘，从而获得高可靠性。 在薄膜磁盘中，在纹理基板的径向方向上测量的截面形状的轴承比曲线在表面层（切割高度为5〜10nm）的轴承比为0.1〜10％。 以这种方式，增加了磁头滑动下的受压面积。

公开(公告)号：US5739084A

公开(公告)日：1998-04-14

申请号：US778370

申请日：1997-01-02

申请人： Takao Nakamura ,  Hiroshi Inada ,  Michitomo Iiyama

发明人： Takao Nakamura ,  Hiroshi Inada ,  Michitomo Iiyama

IPC分类号： H01L39/14 ,  H01L39/24

CPC分类号： H01L39/146 ,  Y10S505/702 ,  Y10S505/728

摘要： A method for fabricating a superconducting device with a substrate, a first oxide superconductor thin film, a barrier layer, a diffusion layer, and a second oxide superconductor thin film. The first oxide superconductor thin film with a very thin thickness is formed on the principal surface of the substrate. The barrier layer and the diffusion source layer are formed on a portion of the first oxide superconductor thin film. The second oxide superconductor thin film is grown on an exposed surface of the first oxide superconductor thin film until the barrier and diffusion source layers are embedded in the second oxide superconductor thin film, so that a material of the diffusion source layer is diffused into the second oxide superconductor thin film.

摘要翻译： 一种用于制造具有衬底，第一氧化物超导体薄膜，阻挡层，扩散层和第二氧化物超导体薄膜的超导器件的方法。 在基板的主表面上形成厚度非常薄的第一氧化物超导体薄膜。 阻挡层和扩散源层形成在第一氧化物超导体薄膜的一部分上。 第二氧化物超导体薄膜在第一氧化物超导薄膜的暴露表面上生长直到阻挡层和扩散源层嵌入第二氧化物超导体薄膜中，使得扩散源层的材料扩散到第二氧化物超导体薄膜 氧化物超导体薄膜。

公开(公告)号：US5678744A

公开(公告)日：1997-10-21

申请号：US541458

申请日：1995-10-10

申请人： Takao Nakamura

发明人： Takao Nakamura

IPC分类号： B28D5/00 ,  H01L21/301 ,  H01L21/304 ,  H01L39/24 ,  B26F3/12

CPC分类号： H01L39/2458 ,  B28D5/0011 ,  H01L21/3043 ,  H01L39/2454 ,  Y10T225/12 ,  Y10T225/304

摘要： A method for breaking a hard to cut wafer, such as a SrTiO.sub.3 single-crystal wafer or amorphous wafer, into sections comprises the steps of scribing the wafer to form a groove along a breaking line, heating the groove for a period of about between 30 seconds to 5 minutes, cooling the wafer to a room temperature, and then breaking the wafer along the breaking line by applying a bending moment about the breaking line. The wafer can have an oxide superconductor film, such as Y.sub.1 Ba.sub.2 Cu.sub.3 O.sub.7.delta., deposited on its surface before the wafer is cut.

摘要翻译： 用于将诸如SrTiO3单晶晶片或非晶晶片的难切割的晶片分成多个部分的方法包括以下步骤：划分晶片以沿着断裂线形成凹槽，将槽加热约30分钟 秒至5分钟，将晶片冷却至室温，然后通过围绕断线施加弯曲力矩沿断裂线断开晶片。 在晶片切割之前，晶片可以具有沉积在其表面上的氧化物超导膜，例如Y1Ba2Cu3O7δ。

公开(公告)号：US5642114A

公开(公告)日：1997-06-24

申请号：US351253

申请日：1995-01-24

申请人： Eiji Komoto ,  Takao Nakamura

发明人： Eiji Komoto ,  Takao Nakamura

IPC分类号： G11C11/00 ,  G11C15/00 ,  G11C15/04 ,  H03M7/42 ,  H03M7/40

CPC分类号： H03M7/425 ,  G11C11/005 ,  G11C15/00 ,  G11C15/04

摘要： The present invention relates to a variable-length code decoding circuit for decoding an input variable-length code string and a variable-length code decoding system using the same. A typical variable-length code decoding circuit of the present invention includes a CAM cell 10 for storing a variable-length code bit and a RAM cell 20 which is paired with the CAM cell 10 for storing a mask bit so as to perform a masking operation. The variable-length code decoding circuit further includes an NMOS transistor 30 which is coupled between the CAM cell 10 and a match line ML for selectively disconnecting the CAM cell 10 from the match line ML in response to an output of the RAM cell 20. The CAM cell 10 collates a bit of the input variables-length code string with the stored code bit. When the input bit matches the stored code bit, the CAM cell 10 outputs an H level matching to the match line ML and otherwise it outputs an L level unmatching to the match line ML. If the CAM cell 10 does not relate to the collating operation that is, if it does not matter whether there is a match, the RAM cell 20 corresponding to the CAM cell 10 outputs an L level signal to turn off the NMOS transistor 30. When the NMOS 30 is turned off, the output of the CAM cell 10 is not transmitted to the match line ML.

摘要翻译： PCT No.PCT / JP94 / 00646 Sec。 371日期1995年1月24日 102（e）1995年1月24日PCT PCT 1994年4月19日PCT公布。 第WO94 / 24672号公报 日期：1994年10月27日本发明涉及用于解码输入可变长度代码串的可变长度码解码电路和使用其的可变长度码解码系统。 本发明的典型的可变长度码解码电路包括用于存储可变长度码位的CAM单元10和与用于存储掩码位的CAM单元10配对以便执行掩蔽操作的RAM单元20 。 可变长度码解码电路还包括NMOS晶体管30，其耦合在CAM单元10和匹配线ML之间，用于响应于RAM单元20的输出选择性地将CAM单元10与匹配线ML断开。 CAM单元10将输入变量长度代码串的位与存储的代码位进行核对。 当输入位与存储的代码位匹配时，CAM单元10输出与匹配线ML匹配的H电平，否则将其输出到匹配线ML的L电平不匹配。 如果CAM单元10与对照操作无关，则如果不存在匹配，则与CAM单元10相对应的RAM单元20输​​出L电平信号以关闭NMOS晶体管30.当 NMOS30截止，CAM单元10的输出不发送到匹配线ML。

公开(公告)号：US5629268A

公开(公告)日：1997-05-13

申请号：US457313

申请日：1995-06-01

申请人： So Tanaka ,  Takao Nakamura ,  Michitomo Iiyama

发明人： So Tanaka ,  Takao Nakamura ,  Michitomo Iiyama

IPC分类号： H01L39/24 ,  B05D5/12

CPC分类号： H01L39/2422 ,  H01L39/2496 ,  Y10S505/702 ,  Y10S505/731 ,  Y10S505/732

摘要： A process for depositing successively a plurality of thin films on a bottom superconductor layer made of oxide superconductor deposited on a substrate in a single chamber under a condition, the bottom superconductor layer is heated in ultra-high vacuum at a temperature which is lower than the oxygen-trap temperature (T.sub.trap) at which oxygen enter into the oxide superconductor but higher than a temperature which is lower by 100.degree. C. than the oxygen-trap temperature (T.sub.trap -100.degree. C.) and then the first thin film is deposited thereon.

摘要翻译： 在一个条件下在单个室中沉积在衬底上的由氧化物超导体制成的底部超导体层上依次沉积多个薄膜的过程，在超高真空中以低于 氧吸入温度（Ttrap），氧气进入氧化物超导体，但高于比氧捕获温度（Ttrap-100℃）低100℃的温度，然后沉积第一薄膜 上。

公开(公告)号：US5547923A

公开(公告)日：1996-08-20

申请号：US476582

申请日：1995-06-07

申请人： Takao Nakamura ,  Hiroshi Inada ,  Michitomo Iiyama

发明人： Takao Nakamura ,  Hiroshi Inada ,  Michitomo Iiyama

IPC分类号： H01L39/14 ,  H01L39/24

CPC分类号： H01L39/146 ,  Y10S505/701 ,  Y10S505/728

摘要： For manufacturing a superconducting device, a first oxide superconductor thin film having a very thin thickness is formed on a principal surface of a substrate, and a stacked structure of a gate insulator and a gate electrode is formed on a portion of the first oxide superconductor thin film. A second oxide superconductor thin film is grown on an exposed surface of the first oxide superconductor thin film, using the gate electrode as a mask, so that first and second superconducting regions having a relatively thick thickness are formed at opposite sides of the gate electrode, electrically isolated from the gate electrode. A source electrode and a drain electrode is formed on the first and second oxide superconducting regions. The superconducting device thus formed can functions as a super-FET.

摘要翻译： 为了制造超导装置，在衬底的主表面上形成具有非常薄的厚度的第一氧化物超导体薄膜，并且在第一氧化物超导薄层的一部分上形成栅极绝缘体和栅电极的叠层结构 电影。 使用栅电极作为掩模，在第一氧化物超导体薄膜的暴露表面上生长第二氧化物超导体薄膜，使得在栅电极的相对侧形成具有较厚厚度的第一和第二超导区域， 与栅电极电隔离。 源电极和漏电极形成在第一和第二氧化物超导区上。 这样形成的超导器件可以用作超级FET。

公开(公告)号：US5539215A

公开(公告)日：1996-07-23

申请号：US366381

申请日：1994-12-29

申请人： Takao Nakamura ,  Hiroshi Inada ,  Michitomo Iiyama

发明人： Takao Nakamura ,  Hiroshi Inada ,  Michitomo Iiyama

IPC分类号： H01L39/22 ,  H01L39/14 ,  H01L39/24 ,  H01L29/06 ,  B05D5/12 ,  H01B12/00

CPC分类号： H01L39/146 ,  H01L39/2464 ,  H01L39/249 ,  H01L39/2496 ,  Y10S505/702 ,  Y10S505/728

摘要： A superconducting device comprising a substrate having a principal surface, a non-superconducting oxide layer having a similar crystal structure to that of the oxide superconductor, a first and a second superconducting regions formed of c-axis oriented oxide superconductor thin films on the non-superconducting oxide layer separated from each other and gently inclining to each other, a third superconducting region formed of an extremely thin c-axis oriented oxide superconductor thin film between the first and the second superconducting regions, which is continuous to the first and the second superconducting regions.

摘要翻译： 一种超导装置，包括具有主表面的衬底，具有与氧化物超导体相似的晶体结构的非超导氧化物层，由非氧化物超导体上的c轴取向氧化物超导体薄膜形成的第一和第二超导区域， 超导氧化物层彼此分离并且彼此轻轻地倾斜;在第一和第二超导区域之间由第一和第二超导区域之间的极薄的c轴取向的氧化物超导体薄膜形成的第三超导区域，其与第一和第二超导 地区。