公开(公告)号：US09384974B2

公开(公告)日：2016-07-05

申请号：US14285874

申请日：2014-05-23

Applicant: TOKYO ELECTRON LIMITED

Inventor： Daisuke Suzuki ,  Kazuya Takahashi ,  Mitsuhiro Okada ,  Katsuhiko Komori ,  Satoshi Onodera

IPC: H01L21/02

CPC classification number: H01L21/02532 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02592 ,  H01L21/02645 ,  H01L21/02667

Abstract: The present disclosure provides a method for filling a trench formed on an insulating film of a workpiece. The method includes forming a first impurity-containing amorphous silicon film on a wall surface which defines the trench, forming a second amorphous silicon film on the first amorphous silicon film, and annealing the workpiece after the second amorphous silicon film is formed.

Abstract translation: 本公开提供了一种用于填充形成在工件的绝缘膜上的沟槽的方法。 该方法包括在限定沟槽的壁表面上形成第一含杂质的非晶硅膜，在第一非晶硅膜上形成第二非晶硅膜，并在形成第二非晶硅膜之后退火工件。

公开(公告)号：US09171722B2

公开(公告)日：2015-10-27

申请号：US13954472

申请日：2013-07-30

Applicant: TOKYO ELECTRON LIMITED

Inventor： Kazuya Takahashi ,  Yoshikazu Furusawa ,  Mitsuhiro Okada

IPC: H01L21/22 ,  H01L21/223 ,  H01L21/67

Abstract: A method of vapor-diffusing impurities into a diffusion region of a target substrate to be processed using a dummy substrate is provided. The method includes loading the target substrate and the dummy substrate in a substrate loading jig, accommodating the substrate loading jig loaded with the target substrate and the dummy substrate in a processing chamber of a processing apparatus, and vapor-diffusing impurities into the diffusion region of the target substrate in the processing chamber having the accommodated substrate loading jig. The vapor-diffused impurities are boron, an outer surface of the dummy substrate includes a material having properties not allowing boron adsorption.

公开(公告)号：US12100616B2

公开(公告)日：2024-09-24

申请号：US17445436

申请日：2021-08-19

Applicant: Tokyo Electron Limited

Inventor： Kazuo Kibi ,  Shigetsugu Fujita ,  Kenji Suzuki ,  Mitsuhiro Okada

IPC: H01L21/768 ,  H01L21/027

CPC classification number: H01L21/76805 ,  H01L21/0274 ,  H01L21/76877

Abstract: A method of manufacturing a semiconductor device includes: planarizing a surface of a substrate having a conductive material embedded in a first hole so as to expose the conductive material embedded in the first hole, wherein the first hole is formed in a region which is on an insulating film laminated on the substrate and is surrounded by a spacer film; laminating a mask film on the surface of the substrate; forming a second hole in the mask film such that at least a portion of an upper surface of the conductive material embedded in the first hole is exposed; embedding the conductive material in the second hole; and removing the mask film.

公开(公告)号：US11732357B2

公开(公告)日：2023-08-22

申请号：US16892766

申请日：2020-06-04

Applicant: Tokyo Electron Limited

Inventor： Tsuyoshi Takahashi ,  Mitsuhiro Okada ,  Yasushi Fujii ,  Yu Nunoshige ,  Shinji Kawasaki ,  Hirotaka Kuwada ,  Toshio Takagi

IPC: C23C16/455 ,  C23C16/458 ,  C23C16/52 ,  C23C16/44

CPC classification number: C23C16/45544 ,  C23C16/4408 ,  C23C16/4554 ,  C23C16/4582 ,  C23C16/45527 ,  C23C16/45557 ,  C23C16/52

Abstract: A substrate processing method in substrate processing apparatus comprises repeating cycle including: supplying source gas into process container causing the source gas to be adsorbed to substrate; exhausting excess source gas from the process container; supplying reaction gas into the process container causing the reaction gas to react with the source gas; and exhausting excess reaction gas, wherein at least one of a gap width between placement stage and member forming processing space between the member and the stage and degree of opening of pressure adjustment valve in at least one of the supplying the source gas and the supplying the reaction gas is smaller than at least one of a gap width between the stage and the member and the degree of opening of the pressure adjustment valve in at least one of the exhausting the excess source gas and the exhausting the excess reaction gas, respectively.

公开(公告)号：US11251034B2

公开(公告)日：2022-02-15

申请号：US16281418

申请日：2019-02-21

Applicant: TOKYO ELECTRON LIMITED

Inventor： Hiroyuki Hayashi ,  Rui Kanemura ,  Satoshi Takagi ,  Mitsuhiro Okada

IPC: H01L21/02 ,  H01L21/67 ,  H01L21/311 ,  H01L21/3205 ,  C23C16/02 ,  C23C16/24

Abstract: There is provided a film forming method comprising an organic substance removal step of removing an organic substance adhering to an oxide film generated on a surface of a base by supplying a hydrogen-containing gas and an oxygen-containing gas to the base; an oxide film removal step of removing the oxide film formed on the surface of the base after the organic substance removal step; and a film forming step of forming a predetermined film on the surface of the base after the oxide film removal step.

公开(公告)号：US10570508B2

公开(公告)日：2020-02-25

申请号：US15852668

申请日：2017-12-22

Applicant: TOKYO ELECTRON LIMITED

Inventor： Satoshi Takagi ,  Katsuhiko Komori ,  Mitsuhiro Okada ,  Masahisa Watanabe ,  Kazuya Takahashi ,  Kazuki Yano ,  Keisuke Fujita

IPC: C23C16/24 ,  C23C16/455 ,  H01L21/205 ,  H01L21/22 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/67 ,  H01L21/673 ,  C23C16/46

Abstract: There is provided a film forming apparatus for performing a film forming process on substrates by heating the substrates while the substrates are held in a shelf shape by a substrate holder in a vertical reaction container. The film forming apparatus includes: an exhaust part configured to evacuate the reaction container; a gas supply part configured to supply a film forming gas into the reaction container; a heat insulating member provided above or below an arrangement region of the substrates to overlap with the arrangement region and configured to thermally insulate the arrangement region from an upper region above the arrangement region or a lower region below the arrangement region; and a through-hole provided in the heat insulating member at a position overlapping with central portions of the substrates to adjust a temperature distribution in a plane of each substrate held near the heat insulating member.

公开(公告)号：US09922824B2

公开(公告)日：2018-03-20

申请号：US14978328

申请日：2015-12-22

Applicant: TOKYO ELECTRON LIMITED

Inventor： Mitsuhiro Okada

IPC: C23C16/24 ,  H01L21/02 ,  H01L21/67 ,  H01L21/677 ,  H01L21/3205

CPC classification number: H01L21/02532 ,  C23C16/02 ,  C23C16/24 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/32055 ,  H01L21/67109 ,  H01L21/67757

Abstract: A method of forming a silicon film on a target surface of a target object, including: performing a gas process on the target surface of the target object using an oxygen gas and a hydrogen gas; forming the silicon film on the target surface to which the gas process has been performed, wherein the performing a gas process and the forming the silicon film are performed within a single processing chamber.

公开(公告)号：US09490139B2

公开(公告)日：2016-11-08

申请号：US14449744

申请日：2014-08-01

Applicant: TOKYO ELECTRON LIMITED

Inventor： Katsuhiko Komori ,  Mitsuhiro Okada

IPC: H01L21/205 ,  H01L21/285 ,  C23C16/24 ,  H01L21/3205 ,  H01L21/3213 ,  H01L21/3215 ,  C23C16/04 ,  C23C16/455 ,  H01L21/768

CPC classification number: H01L21/32055 ,  C23C16/045 ,  C23C16/24 ,  C23C16/45523 ,  H01L21/28556 ,  H01L21/32135 ,  H01L21/32155 ,  H01L21/76877

Abstract: Provided is a method of forming a silicon film in a groove formed on a surface of an object to be processed, which includes: forming a first silicon layer on the surface of the object to be processed to embed the groove; doping impurities near a surface of the first silicon layer; forming a seed layer on the doped first silicon layer; and forming a second silicon layer containing impurities on the seed layer.

Abstract translation: 本发明提供一种在被处理物的表面上形成的沟槽中形成硅膜的方法，该方法包括：在待加工物体的表面上形成第一硅层以嵌入槽中; 在第一硅层的表面附近掺杂杂质; 在掺杂的第一硅层上形成晶种层; 以及在种子层上形成含有杂质的第二硅层。

公开(公告)号：US09478423B2

公开(公告)日：2016-10-25

申请号：US13954472

申请日：2013-07-30

Applicant: TOKYO ELECTRON LIMITED

Inventor： Kazuya Takahashi ,  Yoshikazu Furusawa ,  Mitsuhiro Okada

IPC: H01L21/223 ,  H01L21/324 ,  H01L21/322 ,  H01L21/22 ,  H01L21/67

CPC classification number: H01L21/22 ,  H01L21/223 ,  H01L21/67109

Abstract: A method of vapor-diffusing impurities into a diffusion region of a target substrate to be processed using a dummy substrate is provided. The method includes loading the target substrate and the dummy substrate in a substrate loading jig, accommodating the substrate loading jig loaded with the target substrate and the dummy substrate in a processing chamber of a processing apparatus, and vapor-diffusing impurities into the diffusion region of the target substrate in the processing chamber having the accommodated substrate loading jig. The vapor-diffused impurities are boron, an outer surface of the dummy substrate includes a material having properties not allowing boron adsorption.

Abstract translation: 提供了使用虚设基板将杂质气相扩散到待加工对象基板的扩散区域的方法。 该方法包括将目标衬底和虚拟衬底加载到衬底装载夹具中，将装载有目标衬底和虚设衬底的衬底装载夹具容纳在处理装置的处理室中，并将杂质蒸发扩散到 处理室中的目标衬底具有容纳衬底加载夹具。 蒸气扩散的杂质是硼，虚拟衬底的外表面包括具有不允许硼吸附的特性的材料。

公开(公告)号：US09318328B2

公开(公告)日：2016-04-19

申请号：US13901712

申请日：2013-05-24

Applicant: TOKYO ELECTRON LIMITED

Inventor： Katsuhiko Komori ,  Akinobu Kakimoto ,  Mitsuhiro Okada ,  Nobuhiro Takahashi

IPC: H01L21/3105 ,  H01L21/762 ,  H01L21/285 ,  H01L21/205 ,  H01L21/02 ,  C23C16/04 ,  C23C16/24

CPC classification number: H01L21/02658 ,  C23C16/045 ,  C23C16/24 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/76224 ,  H01L21/76232

Abstract: A method of forming a silicon film includes a first film forming process, an etching process, a doping process, and a second film forming process. In the first film forming process, a silicon film doped with impurities containing boron is formed so as to embed a groove provided on an object to be processed. In the etching process, the silicon film formed in the first film forming process is etched. In the doping process, the silicon film etched in the etching process is doped with impurities containing boron. In the second film forming process, a silicon film doped with impurities containing boron is formed so as to embed the silicon film that is doped in the doping process.

Abstract translation: 形成硅膜的方法包括第一成膜工艺，蚀刻工艺，掺杂工艺和第二成膜工艺。 在第一成膜工艺中，形成掺杂含有杂质的硅的硅膜，以便嵌入设置在被处理物上的槽。 在蚀刻工艺中，蚀刻在第一成膜工艺中形成的硅膜。 在掺杂工艺中，在蚀刻工艺中蚀刻的硅膜掺杂含有硼的杂质。 在第二成膜工艺中，形成掺杂含有杂质的硅的硅膜，以便嵌入在掺杂工艺中掺杂的硅膜。