公开(公告)号：US06787923B2

公开(公告)日：2004-09-07

申请号：US10120169

申请日：2002-04-10

申请人： Cher Khng Victor Tan ,  Choon Kuan Lee ,  Kian Chai Lee ,  Guek Har Lim ,  Wuu Yean Tay ,  Teck Huat Poh ,  Cheng Pour Poh

发明人： Cher Khng Victor Tan ,  Choon Kuan Lee ,  Kian Chai Lee ,  Guek Har Lim ,  Wuu Yean Tay ,  Teck Huat Poh ,  Cheng Pour Poh

IPC分类号： H01L2348

CPC分类号： H01L24/83 ,  B33Y80/00 ,  H01L23/13 ,  H01L23/16 ,  H01L23/3121 ,  H01L23/538 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/27013 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/8319 ,  H01L2224/83385 ,  H01L2224/8385 ,  H01L2224/85385 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K3/305 ,  H05K3/3452 ,  H05K2201/09036 ,  H05K2201/09909 ,  H05K2201/10689 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A carrier substrate includes at least one die-attach location and one or more terminals that protrude from a surface of the carrier substrate so as to prevent adhesive material from contaminating connection surfaces thereof. A solder mask for use on a carrier substrate includes a device-securing region positionable over at least a portion of a die-support location of the carrier substrate. Dams of the solder mask are positionable laterally adjacent to at least portions of the peripheries of corresponding terminals of the carrier substrate. The carrier substrate and solder mask may each include one or more recessed areas that laterally surround at least portions of their die-attach location and device-securing region, respectively, to receive some of the excess adhesive. Assemblies and packages including one or both of the carrier substrate and solder mask are also disclosed, as are assembly methods and methods for designing the carrier substrate and solder mask.

摘要翻译： 载体基板包括至少一个管芯附着位置和从载体衬底的表面突出的一个或多个端子，以防止粘合剂材料污染其连接表面。 用于载体衬底的焊接掩模包括可位于载体衬底的管芯支撑位置的至少一部分上的器件固定区域。 焊料掩模的大坝位于横向邻近于载体衬底的相应端子的周边的至少一部分。 载体基板和焊接掩模可以各自包括一个或多个凹陷区域，其分别横向包围其管芯附接位置和装置固定区域的至少一部分，以容纳一些多余的粘合剂。 还公开了包括载体基板和焊接掩模中的一个或两个的组件和封装，以及用于设计载体衬底和焊接掩模的组装方法和方法。

公开(公告)号：US06740983B2

公开(公告)日：2004-05-25

申请号：US10231731

申请日：2002-08-28

申请人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

发明人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

IPC分类号： H01L2348

CPC分类号： H01L23/3114 ,  G01R1/0408 ,  G01R1/0483 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low-profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned-in and tested in a more efficient and cost-effective manner than prior known BGA or FBGA semiconductor packages. A high-density, low-profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.

摘要翻译： 可堆叠的球栅阵列（BGA）或细球栅阵列（FBGA）半导体封装，特别适用于需要低剖面BGA或FBGA半导体封装的板上芯片或片上电路板应用。 可堆叠球栅阵列（BGA）或细球栅阵列（FBGA）提供了一种半导体封装，能够以比现有已知的BGA或FBGA半导体封装更有效和成本有效的方式进行烧录和测试。 进一步公开了以堆叠方式结合多个公开的BGA或FBGA半导体封装的高密度，低轮廓的存储器模块。

公开(公告)号：US06674175B2

公开(公告)日：2004-01-06

申请号：US10231729

申请日：2002-08-28

申请人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

发明人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

IPC分类号： H01L2348

CPC分类号： H01L23/3114 ,  G01R1/0408 ,  G01R1/0483 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low-profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned-in and tested in a more efficient and cost-effective manner than prior known BGA or FBGA semiconductor packages. A high-density, low-profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.

公开(公告)号：US08357566B2

公开(公告)日：2013-01-22

申请号：US11510026

申请日：2006-08-25

申请人： Ai-Chie Wang ,  Choon Kuan Lee ,  Chin Hui Chong ,  Wuu Yean Tay

发明人： Ai-Chie Wang ,  Choon Kuan Lee ,  Chin Hui Chong ,  Wuu Yean Tay

IPC分类号： H01L21/00

CPC分类号： H01L23/495 ,  H01L23/49506 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： Pre-encapsulated lead frames suitable for use in microelectronic device packages are disclosed. Individual lead frames can include a set of multiple lead fingers arranged side by side with neighboring lead fingers spaced apart from each other by a corresponding gap. An encapsulating compound at least partially encapsulates the set of lead fingers without encapsulating a microelectronic device. The encapsulating compound can generally fill the plurality of gaps between two adjacent lead fingers.

摘要翻译： 公开了适用于微电子器件封装的预封装引线框架。 单独的引线框架可以包括一组多个引线并排布置，其中相邻引线彼此间隔开相应的间隙。 封装化合物至少部分地封装该组引线指而不封装微电子器件。 封装化合物通常可以填充两个相邻引线指之间的多个间隙。

公开(公告)号：US20080048301A1

公开(公告)日：2008-02-28

申请号：US11510026

申请日：2006-08-25

申请人： Ai-Chie Wang ,  Choon Kuan Lee ,  Chin Hui Chong ,  Wuu Yean Tay

发明人： Ai-Chie Wang ,  Choon Kuan Lee ,  Chin Hui Chong ,  Wuu Yean Tay

IPC分类号： H01L23/495

CPC分类号： H01L23/495 ,  H01L23/49506 ,  H01L23/4951 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： Pre-encapsulated lead frames suitable for use in microelectronic device packages are disclosed. Individual lead frames can include a set of multiple lead fingers arranged side by side with neighboring lead fingers spaced apart from each other by a corresponding gap. An encapsulating compound at least partially encapsulates the set of lead fingers without encapsulating a microelectronic device. The encapsulating compound can generally fill the plurality of gaps between two adjacent lead fingers.

摘要翻译： 公开了适用于微电子器件封装的预封装引线框架。 单独的引线框架可以包括一组多个引线并排布置，其中相邻引线彼此间隔开相应的间隙。 封装化合物至少部分地封装该组引线指而不封装微电子器件。 封装化合物通常可以填充两个相邻引线指之间的多个间隙。

公开(公告)号：US20050200376A1

公开(公告)日：2005-09-15

申请号：US10883487

申请日：2004-07-01

申请人： Pak Hong Yee ,  Wuu Yean Tay

发明人： Pak Hong Yee ,  Wuu Yean Tay

IPC分类号： G01R31/02 ,  G01R31/26

CPC分类号： G01R31/2875

摘要： A testing apparatus and method for testing integrated circuits is disclosed wherein a device under test is continuously maintained at a desired set point temperature by an included thermal body. The thermal body has an enclosed phase change material which provides latent heat to the device under test such that there is negligible temperature variation realized by integrated circuits being tested.

摘要翻译： 公开了一种用于测试集成电路的测试装置和方法，其中被测器件由所包含的热体连续地保持在所需的设定点温度。 热体具有封闭的相变材料，其向被测设备提供潜热，使得由被测试的集成电路实现的温度变化可忽略。

公开(公告)号：US06847220B2

公开(公告)日：2005-01-25

申请号：US10629666

申请日：2003-07-29

申请人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

发明人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

IPC分类号： G01R1/04 ,  H01L23/31 ,  H01L25/10 ,  H05K1/18 ,  G01R31/02

CPC分类号： H01L23/3114 ,  G01R1/0408 ,  G01R1/0483 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low-profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned-in and tested in a more efficient and cost-effective manner than prior known BGA or FBGA semiconductor packages. A high-density, low-profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.

摘要翻译： 可堆叠的球栅阵列（BGA）或细球栅阵列（FBGA）半导体封装，特别适用于需要低剖面BGA或FBGA半导体封装的板上芯片或片上电路板应用。 可堆叠球栅阵列（BGA）或细球栅阵列（FBGA）提供了一种半导体封装，能够以比现有已知的BGA或FBGA半导体封装更有效和成本有效的方式进行烧录和测试。 进一步公开了以堆叠方式结合多个公开的BGA或FBGA半导体封装的高密度，低轮廓的存储器模块。

公开(公告)号：US06693363B2

公开(公告)日：2004-02-17

申请号：US10136123

申请日：2002-05-01

申请人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

发明人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

IPC分类号： H01L2348

CPC分类号： H01L23/3114 ,  G01R1/0408 ,  G01R1/0483 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low-profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned-in and tested in a more efficient and cost-effective manner than prior known BGA or FBGA semiconductor packages. A high-density, low-profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.

摘要翻译： 可堆叠的球栅阵列（BGA）或细球栅阵列（FBGA）半导体封装，特别适用于需要低剖面BGA或FBGA半导体封装的板上芯片或片上电路板应用。 可堆叠球栅阵列（BGA）或细球栅阵列（FBGA）提供了一种半导体封装，能够以比现有已知的BGA或FBGA半导体封装更有效和成本有效的方式进行烧录和测试。 进一步公开了以堆叠方式结合多个公开的BGA或FBGA半导体封装的高密度，低轮廓的存储器模块。

公开(公告)号：US06522019B2

公开(公告)日：2003-02-18

申请号：US10152246

申请日：2002-05-21

申请人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

发明人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

IPC分类号： H01L2348

CPC分类号： H01L23/3114 ,  G01R1/0408 ,  G01R1/0483 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low-profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned-in and tested in a more efficient and cost-effective manner than prior known BGA or FBGA semiconductor packages. A high-density, low-profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.

公开(公告)号：US06448664B1

公开(公告)日：2002-09-10

申请号：US10011196

申请日：2001-11-13

申请人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

发明人： Wuu Yean Tay ,  Jeffrey Toh Tuck Fook

IPC分类号： H01L2348

CPC分类号： H01L23/3114 ,  G01R1/0408 ,  G01R1/0483 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned in and tested in a more efficient and cost effective manner than prior known BGA or FBGA semiconductor packages. A high density, low profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.