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公开(公告)号:US20180364510A1
公开(公告)日:2018-12-20
申请号:US16109886
申请日:2018-08-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE , Masashi TSUBUKU , Kosei NODA
IPC: G02F1/1368 , H01L29/786 , H01L27/12 , G09G3/36
CPC classification number: G02F1/1368 , G09G3/3611 , G09G3/3648 , G09G3/3674 , G09G3/3677 , G09G5/18 , G09G2310/0286 , G09G2320/103 , G09G2330/021 , G09G2330/022 , G09G2330/027 , H01L27/1225 , H01L29/7869
Abstract: A liquid crystal display device includes: a driver circuit portion; a pixel portion; a signal generation circuit for generating a control signal for driving the driver circuit portion and an image signal which is supplied to the pixel portion; a memory circuit; a comparison circuit for detecting a difference of image signals for a series of frame periods among image signals stored for respective frame periods in the memory circuit; a selection circuit which selects and outputs the image signals for the series of frame periods when the difference is detected in the comparison circuit; and a display control circuit which supplies the control signal and the image signals output from the selection circuit, to the driver circuit portion when the difference is detected in the comparison circuit, and stops supplying the control signal to the driver circuit portion when the difference is not detected in the comparison circuit.
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公开(公告)号:US20180322835A1
公开(公告)日:2018-11-08
申请号:US16039515
申请日:2018-07-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA
IPC: G09G3/36
CPC classification number: G09G3/3614 , G09G3/3648 , G09G3/3655 , G09G3/3677 , G09G3/3688 , G09G2310/0297 , G09G2310/06 , G09G2310/08 , G09G2320/0214 , G09G2320/0247 , G09G2330/021 , G09G2330/023
Abstract: An object is to reduce power consumption of a display device and to suppress deterioration of display quality. As a transistor provided for each pixel, a transistor including an oxide semiconductor layer is used. Note that off-state current of the transistor can be decreased when the oxide semiconductor layer is highly purified. Therefore, variation in the value of a data signal due to the off-state current of the transistor can be suppressed. That is, display deterioration (change) which occurs when writing frequency of the data signal to the pixel including the transistor is reduced (when a break period is lengthened) can be suppressed. In addition, flickers in display which generates when the frequency of an alternating-current driving signal supplied to a signal line in the break period is reduced can be suppressed.
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公开(公告)号:US20180309973A1
公开(公告)日:2018-10-25
申请号:US16010600
申请日:2018-06-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Jun KOYAMA , Mai AKIBA
IPC: H04N13/122 , H04N13/341 , H04N13/139 , G09G5/00 , G09G3/00 , H04N13/156 , G06T19/20 , H04N13/31 , H04N13/00
CPC classification number: H04N13/122 , G06T19/20 , G06T2219/2016 , G09G3/003 , G09G5/003 , G09G2340/0464 , H04N13/139 , H04N13/156 , H04N13/31 , H04N13/341 , H04N2013/0081
Abstract: An image processing method to obtain a high sense of depth or high stereoscopic effect for an image and a display device utilizing the method are provided. Image data of an image is separated into image data of a plurality of objects and a background. A feature amount is obtained from the image data of each object, so that the objects are identified. The relative distance between viewer's eye and any of the objects is determined by the data of the sizes of the objects in the image and the sizes of the objects stored in the database. The image data of each object is processed so that an object with a shorter relative distance is enlarged. The image data of each object after image processing is combined with the image data of the background, so that a sense of depth or stereoscopic effect of an image is increased.
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公开(公告)号:US20180301476A1
公开(公告)日:2018-10-18
申请号:US16008437
申请日:2018-06-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Masashi TSUBUKU , Kosei NODA
IPC: H01L27/12 , H03K19/096 , G09G3/20 , H03K17/16 , H01L29/786 , G11C19/28 , G11C19/18 , H03K19/003 , G09G3/3291 , G09G3/36 , G09G3/3233
Abstract: To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.
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公开(公告)号:US20180269233A1
公开(公告)日:2018-09-20
申请号:US15988534
申请日:2018-05-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Jun KOYAMA , Shunpei YAMAZAKI
IPC: H01L27/12 , H01L29/786 , G02F1/1345 , H01L29/04 , H01L29/66 , G09G3/3266 , G02F1/1368 , G02F1/1362 , G02F1/1343 , G09G3/3275 , G09G3/36 , G02F1/1333
CPC classification number: H01L27/1225 , G02F1/133345 , G02F1/134309 , G02F1/13452 , G02F1/13454 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G3/3266 , G09G3/3275 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , G09G2330/023 , H01L27/124 , H01L27/1285 , H01L29/045 , H01L29/66742 , H01L29/66969 , H01L29/7869
Abstract: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.
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公开(公告)号:US20180084314A1
公开(公告)日:2018-03-22
申请号:US15554228
申请日:2016-02-25
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Jun KOYAMA
IPC: H04Q9/00
CPC classification number: H04Q9/00 , G08C17/02 , G11C7/12 , G11C7/16 , G11C8/08 , G11C11/404 , G11C11/405 , G11C11/4074 , G11C11/4125 , H01L29/7869 , H03M1/46 , H04Q2209/40 , H04Q2209/88
Abstract: To provide an environmental sensor with reduced power consumption.A semiconductor device includes a first sensor, a second sensor, a control circuit, a transmission amplifier, a modulation circuit, a memory device, an analog-to-digital converter circuit, and an antenna. The memory device and the analog-to-digital converter circuit each include a transistor in which an oxide semiconductor is formed in a channel region. The second sensor is an optical sensor, and has a function of transmitting a trigger signal to the control circuit when receiving laser light. The control circuit has a function of transmitting a control signal to the first sensor, the transmission amplifier, the modulation circuit, the memory device, and the analog-to-digital converter circuit when receiving the trigger signal. The first sensor is a sensor that senses a physical or chemical quantity, and the measured data is subjected to digital conversion by the analog-to-digital converter circuit and stored in the memory device. In addition, the data is transmitted as an electromagnetic wave signal from the antenna through the modulation circuit and the transmission amplifier.
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公开(公告)号:US20180082645A1
公开(公告)日:2018-03-22
申请号:US15819236
申请日:2017-11-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE , Kouhei TOYOTAKA
CPC classification number: G09G3/3406 , G09G3/2025 , G09G3/3413 , G09G3/3607 , G09G3/3659 , G09G2300/0456 , G09G2330/021
Abstract: A liquid crystal display device comprising a backlight and a pixel portion including first to 2n-th scan lines, wherein, in a first case of expressing a color image, first pixels controlled by the first to n-th scan lines are configured to express a first image using at least one of first to third hues supplied in a first rotating order, and second pixels controlled by the (n+1)-th to 2n-th scan lines are configured to express a second image using at least one of the first to third hues supplied in a second rotating order, wherein, in a second case of expressing a monochrome image, the first and second pixels controlled by the first to 2n-th scan lines are configured to express the monochrome image by external light reflected by the reflective pixel electrode, and wherein the first rotating order is different from the second rotating order.
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公开(公告)号:US20180047852A1
公开(公告)日:2018-02-15
申请号:US15728591
申请日:2017-10-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Masahiro TAKAHASHI , Hideyuki KISHIDA , Akiharu MIYANAGA , Yasuo NAKAMURA , Junpei SUGAO , Hideki UOCHI
IPC: H01L29/786 , H01L29/49 , H01L29/45 , H01L29/66 , H01L27/12
CPC classification number: H01L29/78669 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L27/1288 , H01L29/45 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/78678 , H01L29/7869
Abstract: It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.
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公开(公告)号:US20170301300A1
公开(公告)日:2017-10-19
申请号:US15636153
申请日:2017-06-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA
IPC: G09G3/36
CPC classification number: G09G3/3614 , G09G3/3648 , G09G3/3655 , G09G3/3677 , G09G3/3688 , G09G2310/0297 , G09G2310/06 , G09G2310/08 , G09G2320/0214 , G09G2320/0247 , G09G2330/021 , G09G2330/023
Abstract: An object is to reduce power consumption of a display device and to suppress deterioration of display quality. As a transistor provided for each pixel, a transistor including an oxide semiconductor layer is used. Note that off-state current of the transistor can be decreased when the oxide semiconductor layer is highly purified. Therefore, variation in the value of a data signal due to the off-state current of the transistor can be suppressed. That is, display deterioration (change) which occurs when writing frequency of the data signal to the pixel including the transistor is reduced (when a break period is lengthened) can be suppressed. In addition, flickers in display which generates when the frequency of an alternating-current driving signal supplied to a signal line in the break period is reduced can be suppressed.
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公开(公告)号:US20170263777A1
公开(公告)日:2017-09-14
申请号:US15609513
申请日:2017-05-31
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE , Kei TAKAHASHI , Kouhei TOYOTAKA , Masashi TSUBUKU , Kosei NODA , Hideaki KUWABARA
IPC: H01L29/786 , H01L23/552 , H01L23/66 , H01L49/02 , H01L27/02 , H01L27/108 , H01L27/12 , H01L21/84 , H01L25/16
CPC classification number: H01L29/7869 , H01L21/84 , H01L23/552 , H01L23/60 , H01L23/66 , H01L25/16 , H01L27/0222 , H01L27/10873 , H01L27/12 , H01L27/1225 , H01L28/20 , H01L28/60 , H01L29/78609 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit included in an LSI, a CPU, or a memory is manufactured using the transistor which is formed using an oxide semiconductor which is an intrinsic or substantially intrinsic semiconductor obtained by removal of impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than a silicon semiconductor, and is formed over a semiconductor substrate. With the transistor which is formed over the semiconductor substrate and includes the highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device whose power consumption due to leakage current is low can be realized.
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