公开(公告)号：US6137309A

公开(公告)日：2000-10-24

申请号：US159316

申请日：1998-09-23

Applicant: Pascal Couteaux ,  Roland Marbot

Inventor： Pascal Couteaux ,  Roland Marbot

IPC: H03K5/00 ,  H03K19/21

CPC classification number: H03K19/215 ,  H03K5/00006

Abstract: An Exclusive-OR logic gate with four two-by-two complementary inputs and two complementary outputs. The structure of this Exclusive-Or gate is said to be symmetrical in that the gate has a propagation time that is identical whichever of the two pairs of complementary inputs is switched over, whatever the nature of the transition at output and whatever the logic state of the pair of inputs that do not switch over. The disclosed device enables a further reduction in the differences in the time taken for the propagation of the signal edges through the gate by eliminating the floating character of certain nodes. It also relates to a frequency multiplier comprising a tree of Exclusive-Or gates such as this.

Abstract translation: 具有四个二乘互补输入和两个互补输出的异或逻辑门。 据说这种异或门的结构是对称的，因为门的传播时间是相同的，两对互补输入中的任何一个都被切换，无论输出的转换的性质如何， 该对输入不切换。 所公开的装置能够通过消除某些节点的浮动特性来进一步减少通过门传播信号边缘所花费的时间差异。 它还涉及包括诸如此类的异或门树的倍频器。

公开(公告)号：US6125094A

公开(公告)日：2000-09-26

申请号：US66726

申请日：1998-04-23

Applicant: Francis Dell'Ova ,  Bruno Bonhoure ,  Frederic Paillardet

Inventor： Francis Dell'Ova ,  Bruno Bonhoure ,  Frederic Paillardet

IPC: H03F1/56 ,  G05F3/26 ,  G11B7/00 ,  H03F3/08 ,  H03F3/34 ,  H03F3/345 ,  H03F3/347

CPC classification number: G11B7/005 ,  H03F3/08 ,  H03F3/082 ,  H03F3/345 ,  G11B7/13

Abstract: A current amplifier includes a cascode transistor for fixing the voltage of an input of the amplifier; a first constant current source connected between the input and a first supply voltage; a second constant current source, for providing a current lower than the first current source, connected between a second supply voltage and the cascode transistor; a second transistor, of different type than the cascode transistor, connected between the input and the second supply voltage, and controlled by the node between the cascode transistor and the second current source; and an output transistor of same type as the second transistor, connected to the second supply voltage and controlled by the node.

Abstract translation: 电流放大器包括用于固定放大器的输入端的电压的共源共栅晶体管; 连接在所述输入端和第一电源电压之间的第一恒流源; 第二恒流源，用于提供连接在第二电源电压和共源共栅晶体管之间的低于第一电流源的电流; 第二晶体管，其不同于共源共栅晶体管的类型，连接在输入和第二电源电压之间，并由共源共栅晶体管和第二电流源之间的节点控制; 以及与第二晶体管相同类型的输出晶体管，连接到第二电源电压并由节点控制。

公开(公告)号：US6125063A

公开(公告)日：2000-09-26

申请号：US154268

申请日：1998-09-16

Applicant: Mohamad Chehadi ,  David Naura

Inventor： Mohamad Chehadi ,  David Naura

IPC: G11C16/30 ,  G11C29/50 ,  G11C7/00

CPC classification number: G11C16/30 ,  G11C29/50 ,  G11C16/04

Abstract: In a memory integrated circuit comprising an internal circuit for the generation of a programming high voltage and comprising a first pad designed to receive a main logic supply voltage below five volts, a second specific supply pad is designed to supply the high voltage generation circuit. This enables the application of a specific logic supply voltage with a voltage level greater than that of the main logic supply voltage in test mode or in application mode.

Abstract translation: 在包括用于产生编程高电压的内部电路并包括被设计为接收低于五伏的主逻辑电源电压的第一焊盘的存储器集成电路中，第二特定供电焊盘被设计成供应高压发生电路。 这样可以在测试模式或应用模式下，施加电压值大于主逻辑电源电压的特定逻辑电源电压。

公开(公告)号：US6124677A

公开(公告)日：2000-09-26

申请号：US405974

申请日：1999-09-27

Applicant: Celine Lardeau ,  Gilles Troussel ,  Eric Benoit

Inventor： Celine Lardeau ,  Gilles Troussel ,  Eric Benoit

IPC: G01R31/04 ,  G01R31/28 ,  G09G3/00 ,  G09G3/10

CPC classification number: G09G3/006 ,  G01R31/043 ,  G01R31/2825

Abstract: A method for testing output connections of at least one driver circuit that drives a plasma display panel. According to the method, at least one output of the driver circuit is switched to a high level for a predetermined time period. The output of the driver circuit is switched to a low level, and the time to discharge the output of the driver circuit with a constant discharge current is measured. It is determined whether a capacitive load is connected to the output of the driver circuit based on the measured time to discharge. In one preferred method, these steps are repeated for each of the outputs of the driver circuit. A driver circuit for driving a plasma display panel is also provided. The driver circuit includes driver output stages, and means for selectively sinking a constant discharge current from the output of at least one of the driver output stages to ground. Additionally, the driver circuit includes means for producing a measuring logic pulse whose duration is a function of a time required to discharge the output, and means for determining whether a capacitive load is connected to the output based on the measuring logic pulse.

Abstract translation: 一种用于测试驱动等离子体显示面板的至少一个驱动电路的输出连接的方法。 根据该方法，驱动电路的至少一个输出在预定时间段内被切换到高电平。 驱动电路的输出被切换到低电平，并且测量以恒定放电电流放电驱动电路的输出的时间。 基于测量的放电时间确定容性负载是否连接到驱动器电路的输出。 在一个优选的方法中，针对驱动器电路的每个输出重复这些步骤。 还提供了用于驱动等离子体显示面板的驱动电路。 驱动器电路包括驱动器输出级，以及用于选择性地将恒定放电电流从至少一个驱动器输出级的输出吸收到地的装置。 此外，驱动器电路包括用于产生其持续时间是放电输出所需时间的函数的测量逻辑脉冲的装置，以及用于基于测量逻辑脉冲确定容性负载是否连接到输出的装置。

公开(公告)号：US06121762A

公开(公告)日：2000-09-19

申请号：US344846

申请日：1999-06-28

Applicant: Jean-Michel Ravon

Inventor： Jean-Michel Ravon

IPC: H02M3/155 ,  G05F1/44

CPC classification number: H02M3/155

Abstract: A non-isolated voltage converter, of switch-mode type, includes a capacitor between terminals that provide an output voltage regulated by a circuit that controls a switch that provides current to an inductive element. A local supply for the control circuit receives energy from the inductive element. In one embodiment, the inductive element has a tab between two windings, and the output voltage of the converter is smaller than the local supply voltage of the control circuit. In another embodiment, a diode is interposed between a positive terminal of the output capacitor and a positive terminal of a capacitor of the local supply of the control circuit. The negative terminal of the local supply capacitor is connected to the mid-point of a series association of the switch with the inductive element. A zener diode is interposed, in series with the local supply capacitor and the local supply diode, between the mid-point and the positive output terminal.

Abstract translation: 开关型的非隔离电压转换器包括端子之间的电容器，其提供由控制向感应元件提供电流的开关的电路调节的输出电压。 控制电路的本地电源从电感元件接收能量。 在一个实施例中，电感元件在两个绕组之间具有突片，并且转换器的输出电压小于控制电路的本地电源电压。 在另一个实施例中，二极管插在输出电容器的正端子和控制电路的本地电源的电容器的正极之间。 本地电源电容器的负端子连接到开关与电感元件的串联关联的中点。 齐纳二极管与本地电源电容器和本地电源二极管串联插在中间点和正极输出端子之间。

公开(公告)号：US6107673A

公开(公告)日：2000-08-22

申请号：US318290

申请日：1999-05-25

Applicant: Bertrand Rivet

Inventor： Bertrand Rivet

IPC: H01L27/08 ,  H01L29/861 ,  H01L29/93

CPC classification number: H01L29/861 ,  H01L27/0814

Abstract: The present invention relates to a high voltage diode which has a fast turn-off, formed of a series connection of several diodes, the relative intrinsic dispersion of recovered charges between the diodes being smaller than 5%.

Abstract translation: 本发明涉及一种高压二极管，其具有由几个二极管的串联连接形成的快速关断，二极管之间恢复的电荷的相对固有分散度小于5％。

公开(公告)号：US6097322A

公开(公告)日：2000-08-01

申请号：US159319

申请日：1998-09-23

Applicant: Christian Tournier

Inventor： Christian Tournier

IPC: H04L7/033 ,  H04L25/49 ,  H03H7/12 ,  H03H13/00

CPC classification number: H04L7/0331 ,  H04L25/4904

Abstract: A device including a mechanism (4) for generating a counting clock signal (CKM) whose frequency is less than or equal to n times twice the transmission frequency. The device also includes a detection mechanism (10) for detecting the transitions (TD) of the signal (DS) at the counting frequency and for delivering corresponding detection signals (ST), a selection mechanism (2) for receiving each detection signal (ST) and for delivering or otherwise a selection signal (RS) depending on the satisfying or otherwise of a predetermined selection criterion, and a frequency divider-by-n (30) which receives the counting clock signal, in order to sample the carrier signal after a predetermined time delay (Tr) after each detected transition. Provided are a sampling control device and method which are completely digital and therefore use no analog component of the phase-locked loop type and are very simple to produce at an industrially economical cost.

Abstract translation: 一种装置，包括用于产生其频率小于或等于发送频率的两倍的计数时钟信号（CKM）的机构（4）。 该装置还包括检测机构（10），用于检测计数频率处的信号（DS）的转换（TD），并输出相应的检测信号（ST）;选择机构（2），用于接收每个检测信号（ST ），并且用于根据预定选择标准的满足或其他方式传送或以其他方式传送选择信号（RS），以及接收计数时钟信号的分频器（30），以便在后面对载波信号进行采样 每个检测到的转换之后的预定时间延迟（Tr）。 提供了完全数字化的采样控制装置和方法，因此不使用锁相环类型的模拟部件，并且以工业上的经济成本非常简单地生产。

公开(公告)号：US6091650A

公开(公告)日：2000-07-18

申请号：US321023

申请日：1999-05-27

Applicant: Richard Ferrant

Inventor： Richard Ferrant

IPC: G06F11/20 ,  G11C7/00

CPC classification number: G11C29/846 ,  G11C29/44 ,  G11C29/4401 ,  G11C2029/4402 ,  G11C2229/723

Abstract: A memory device includes a defect memory, a test circuit, and a spare memory. The defect memory and the spare memory have as many rows as the array, and each row of the defect memory and the spare memory are selected when the corresponding row of the array is selected. A test circuit locates defective cells of the array and writes addresses in the defect memory to indicate locations of the defective cells. Additionally, a control circuit selects a row of the array based on a selected row address and redirects access to the corresponding row of the spare memory whenever a selected column address corresponds to one of the addresses stored in the defect memory. In one preferred embodiment, each of the rows of the defect memory stores information indicating if there is a defective cell in the corresponding row of the array and the column address of the defective cell. A computer system including such a memory device is also provided.

Abstract translation: 存储器件包括缺陷存储器，测试电路和备用存储器。 缺陷存储器和备用存储器具有与阵列一样多的行，并且当选择阵列的相应行时，选择缺陷存储器和备用存储器的每一行。 测试电路定位阵列的故障单元，并将缺陷存储器中的地址写入以指示故障单元的位置。 另外，只要选择的列地址对应于存储在缺陷存储器中的一个地址，控制电路就基于所选择的行地址选择一行阵列，并重定向到备用存储器的相应行的访问。 在一个优选实施例中，缺陷存储器的每行都存储指示阵列的相应行中是否存在缺陷单元的信息以及有缺陷单元的列地址。 还提供了包括这种存储装置的计算机系统。

公开(公告)号：US6057727A

公开(公告)日：2000-05-02

申请号：US175000

申请日：1998-10-19

Applicant: Pierre Dautriche ,  Thierry Rouzier

Inventor： Pierre Dautriche ,  Thierry Rouzier

IPC: G05F3/26 ,  G05F1/10

CPC classification number: G05F3/262

Abstract: The present invention relates to a constant current generator including a reference voltage source providing a constant voltage with respect to a first ground; an operational amplifier receiving the constant voltage on a non-inverting input; and a follower transistor controlled by the output of the operational amplifier and connected between an input of a current mirror and a first resistor connected to the first ground. It further includes a second resistor connected between an output of the current mirror and a second ground, the output of the current mirror being also coupled to an inverting input of the operational amplifier; and a filtering circuit connected to reduce or eliminate, in the output signal of the operational amplifier, any high frequency ac component with respect to the first ground.

Abstract translation: 本发明涉及一种恒流发生器，其包括相对于第一接地提供恒定电压的参考电压源; 在非反相输入端接收恒定电压的运算放大器; 以及由运算放大器的输出控制并连接在电流镜的输入端与连接到第一地的第一电阻之间的跟随器晶体管。 其还包括连接在电流镜的输出端和第二接地之间的第二电阻器，电流镜的输出端也耦合到运算放大器的反相输入端; 以及滤波电路，其连接以在运算放大器的输出信号中减少或消除相对于第一地的任何高频交流分量。

公开(公告)号：US6051966A

公开(公告)日：2000-04-18

申请号：US160425

申请日：1998-09-25

Applicant: Serge Pontarollo

Inventor： Serge Pontarollo

IPC: G05F3/22 ,  G05F3/26 ,  G05F3/20

CPC classification number: G05F3/227 ,  G05F3/265

Abstract: The present invention relates to a Vbe/R bias source of the type including a first reference branch, a second output branch, and means of correction of an output current by an error current proportional to the current flowing in the reference branch.

Abstract translation: 本发明涉及一种包括第一参考支路，第二输出支路以及输出电流校正方式的Vbe / R偏压源，该误差电流与在参考支路中流动的电流成正比。