Abstract:
One embodiment exemplarily described herein can be characterized as an image sensor including a substrate having a front surface and a rear surface; a photoelectric converting portion on the front surface of the substrate; a through via extending through the substrate, wherein the through via is electrically connected to the photoelectric converting portion; an external connection terminal on the rear surface of the substrate, wherein the external connection terminal is connected to the through via; and a light shading layer formed on a portion of the rear surface of the substrate, wherein the light shading layer is substantially opaque with respect to an external light. In some embodiments, the portion of the rear surface of the substrate on which the light shading layer is formed is not overlapped by the through via or the external connection terminal.
Abstract:
A stack type semiconductor chip package includes a first wafer mold, a protection substrate, and a second wafer mold that are stacked in a wafer level process. The first wafer mold includes a first chip having first pads and a first mold layer encapsulating the first chip. The protection substrate is placed on the first wafer mold, is mechanically bonded with the first wafer mold using a first adhesive layer, and includes wiring layers facing the first pads. The second wafer mold is placed under the first wafer mold, is mechanically bonded with the first wafer mold using a second adhesive layer, and includes a second chip having second pads, and a second mold layer encapsulating the second chip. First vias electrically connect the wiring layers of the protection substrate with the second pads. Second vias electrically connect the wiring layers of the protection substrate with external connection terminals.
Abstract:
One embodiment exemplarily described herein can be characterized as an image sensor including a substrate having a front surface and a rear surface; a photoelectric converting portion on the front surface of the substrate; a through via extending through the substrate, wherein the through via is electrically connected to the photoelectric converting portion; an external connection terminal on the rear surface of the substrate, wherein the external connection terminal is connected to the through via; and a light shading layer formed on a portion of the rear surface of the substrate, wherein the light shading layer is substantially opaque with respect to an external light. In some embodiments, the portion of the rear surface of the substrate on which the light shading layer is formed is not overlapped by the through via or the external connection terminal.
Abstract:
A semiconductor device comprises at the wafer level one or more ferrite structures adapted to dampen high frequency noise potentially apparent at signal lines and termination points within the semiconductor device. Related methods of forming said ferrite structures are also disclosed.
Abstract:
In one aspect, a bump electrode of a semiconductor device is formed by providing a substrate including a pad electrode, forming a seed layer over the pad electrode, and forming a mask layer over the seed layer which includes an opening aligned over the pad electrode. A barrier plating layer is electroplated within the opening over the seed layer, and a bump plating layer is electroplated over the barrier plating layer. The mask layer is removed, and the seed layer is etched using the bump plating layer as a mask.
Abstract:
A semiconductor package includes a semiconductor chip operatively attached to a conductive lead of a film circuit substrate by an indium-containing solder material and a silver-containing bump electrode, where the solder material is interposed between the conductive lead and the bump electrode.
Abstract:
A semiconductor device comprises at the wafer level one or more ferrite structures adapted to dampen high frequency noise potentially apparent at signal lines and termination points within the semiconductor device. Related methods of forming said ferrite structures are also disclosed.
Abstract:
A multi-layer H2 sensor includes a carbon nanotube layer, and a ultra-thin metal or metal alloy layer in contact with the nanotube layer. The ultra-thin metal or metal alloy layer is preferably from 10 to 50 angstroms thick. An electrical resistance of the layered sensor increases upon exposure to H2 and can provide detection of hydrogen gas (H2) down to at least 10 ppm, The metal or metal alloy layer is preferably selected from the group consisting of Ni, Pd and Pt, or mixtures thereof. Multi-layered sensors and can be conveniently operated at room temperature.
Abstract:
A method of coding and decoding a still picture is provided. The method of coding and decoding a still image includes: constructing a coded data configured with a region consisting of a first information expressible in bit and a second information expressible in byte by using separate output buffers; and separately allocating a first output buffer for the first information and a second output buffer for the second information, and decoding the coded data.
Abstract:
A battery sheath having enough mechanical strength to stably protect a battery from external impact is provided. The battery sheath also has reduced thickness, thereby increasing battery capacity. In addition, the battery sheath suppresses swelling, thereby preventing battery deformation. The battery sheath includes a base layer having a first surface and a second surface opposite the first surface. A first adhesive is applied to the first surface of the base layer to a predetermined thickness. A CPP layer is applied to the first adhesive to a predetermined thickness. A PET layer is laminated at high temperature on the second surface of the base layer to a predetermined thickness.