公开(公告)号：US20070281497A1

公开(公告)日：2007-12-06

申请号：US11751516

申请日：2007-05-21

Applicant: Yijun Liu ,  Huiwen Xu ,  Li-Qun Xia ,  Chad Peterson ,  Hichem M'saad

Inventor： Yijun Liu ,  Huiwen Xu ,  Li-Qun Xia ,  Chad Peterson ,  Hichem M'saad

IPC: H01L21/469 ,  H01L21/4763

CPC classification number: H01L21/022 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02304 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/3148 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76832

Abstract: Methods are provided for processing a substrate comprising a bilayer barrier film thereon. In one aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and ultraviolet curing the dielectric layer. In another aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and curing the dielectric layer with an electron beam treatment.

Abstract translation: 提供了用于处理其上包含双层阻挡膜的基材的方法。 一方面，一种方法包括沉积第一阻挡层，在第一阻挡层上沉积第二阻挡层，在由第一阻挡层和第二阻挡层形成的双层阻挡膜上沉积介电层，以及紫外线固化电介质 层。 在另一方面，一种方法包括沉积第一阻挡层，在第一阻挡层上沉积第二阻挡层，在由第一阻挡层和第二阻挡层形成的双层阻挡膜上沉积介电层，以及使介电层 用电子束处理。

公开(公告)号：US08592793B2

公开(公告)日：2013-11-26

申请号：US13100657

申请日：2011-05-04

Applicant: Xiying Chen ,  Huiwen Xu ,  Chuanbin Pan

Inventor： Xiying Chen ,  Huiwen Xu ,  Chuanbin Pan

IPC: H01L47/00

CPC classification number: H01L27/101 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/149 ,  H01L45/1675

Abstract: A non-volatile memory device includes a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell containing a steering element and a storage element and at least one of a top corner or a bottom corner of each of the plurality of pillars is rounded. A method of making non-volatile memory device includes forming a stack of device layers, and patterning the stack to form a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell that contains a steering element and a storage element, and where at least one of top corner or bottom corner of each of the plurality of pillars is rounded.

Abstract translation: 非易失性存储器件包括多个支柱，其中多个支柱中的每个支柱包含含有转向元件和存储元件的非易失性存储单元，并且每个的顶角或底角中的至少一个 多个柱子是圆形的。 制造非易失性存储器件的方法包括形成器件层堆叠，以及图案化堆叠以形成多个柱，其中多个柱中的每个柱包含含有转向元件和存储器的非易失性存储单元 并且其中所述多个柱中的每一个的顶角或底角中的至少一个是圆形的。

公开(公告)号：US08551855B2

公开(公告)日：2013-10-08

申请号：US12834942

申请日：2010-07-13

Applicant: Huiwen Xu ,  Er-Xuan Ping ,  Xiying Costa

Inventor： Huiwen Xu ,  Er-Xuan Ping ,  Xiying Costa

IPC: H01L21/20

CPC classification number: H01L45/1675 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/3146 ,  H01L21/32139 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/149 ,  H01L45/1616 ,  H01L45/1683

Abstract: Memory cells, and methods of forming such memory cells, are provided that include a steering element coupled to a carbon-based reversible resistivity switching material that has an increased resistivity, and a switching current that is less than a maximum current capability of the steering element used to control current flow through the carbon-based reversible resistivity switching material. In particular embodiments, methods and apparatus in accordance with this invention form a steering element, such as a diode, having a first width, coupled to a reversible resistivity switching material, such as aC, having a second width smaller than the first width.

Abstract translation: 提供了存储单元和形成这种存储单元的方法，其包括耦合到具有增加的电阻率的碳基可逆电阻率切换材料的转向元件和小于转向元件的最大电流能力的开关电流 用于控制通过碳基可逆电阻率开关材料的电流。 在具体实施例中，根据本发明的方法和装置形成具有第一宽度的转向元件，例如二极管，该第二宽度与第二宽度小于第一宽度的可逆电阻率开关材料（例如aC）耦合。

公开(公告)号：US20130094278A1

公开(公告)日：2013-04-18

申请号：US13552355

申请日：2012-07-18

Applicant: Kun Hou ,  Yung-Tin Chen ,  Zhida Lan ,  Huiwen Xu

Inventor： Kun Hou ,  Yung-Tin Chen ,  Zhida Lan ,  Huiwen Xu

IPC: G11C11/00 ,  H01L45/00

CPC classification number: G11C13/0007 ,  G11C13/0069 ,  G11C17/16 ,  G11C2013/0073 ,  G11C2013/0083 ,  G11C2213/32 ,  G11C2213/51 ,  G11C2213/71 ,  G11C2213/72 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146

Abstract: A non-volatile memory cell includes a first electrode, a steering element, a metal oxide storage element located in series with the steering element, a dielectric resistor located in series with the steering element and the metal oxide storage element, and a second electrode.

Abstract translation: 非易失性存储单元包括与转向元件串联设置的第一电极，操舵元件，金属氧化物存储元件，与转向元件和金属氧化物存储元件串联的介质电阻器和第二电极。

公开(公告)号：US08093123B2

公开(公告)日：2012-01-10

申请号：US12541075

申请日：2009-08-13

Applicant: Huiwen Xu ,  Er-Xuan Ping

Inventor： Huiwen Xu ,  Er-Xuan Ping

IPC: H01L21/8242

CPC classification number: H01L27/101 ,  H01L27/1021 ,  H01L27/1052

Abstract: Methods of forming memory cells are disclosed which include forming a pillar above a substrate, the pillar including a steering element and a memory element, and performing one or more etches vertically through the pillar to form multiple memory cells. Memory cells formed from such methods, as well as numerous other aspects are also disclosed.

Abstract translation: 公开了形成存储器单元的方法，其包括在衬底上形成柱，所述柱包括转向元件和存储元件，并且通过柱垂直地执行一个或多个蚀刻以形成多个存储单元。 还公开了由这些方法形成的存储单元以及许多其它方面。

公开(公告)号：US20100032643A1

公开(公告)日：2010-02-11

申请号：US12536463

申请日：2009-08-05

Applicant: Huiwen Xu

Inventor： Huiwen Xu

IPC: H01L45/00 ,  H01L21/28

CPC classification number: H01L27/101 ,  G11C2213/35 ,  G11C2213/71 ,  H01L21/3146 ,  H01L21/318 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/149 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/1675

Abstract: Memory cells, and methods of forming such memory cells, are provided that include a carbon-based reversible resistivity switching material. In particular embodiments, methods in accordance with this invention form a memory cell by (a) depositing a layer of the carbon material above a substrate; (b) doping the deposited carbon layer with a dopant; (c) depositing a layer of the carbon material over the doped carbon layer; and (d) iteratively repeating steps (b) and (c) to form a stack of doped carbon layers having a desired thickness. Other aspects are also provided.

Abstract translation: 提供了存储单元和形成这种存储单元的方法，其包括碳基可逆电阻率切换材料。 在特定实施例中，根据本发明的方法通过以下步骤形成存储器单元：（a）在基底上沉积碳材料层; （b）用掺杂剂掺杂沉积的碳层; （c）在所述掺杂碳层上沉积所述碳材料层; 和（d）重复地重复步骤（b）和（c）以形成具有期望厚度的掺杂碳层的堆叠。 还提供其他方面。

公开(公告)号：US20090257270A1

公开(公告)日：2009-10-15

申请号：US12421405

申请日：2009-04-09

Applicant: April D. Schricker ,  Mark H. Clark ,  Andy Fu ,  Huiwen Xu

Inventor： April D. Schricker ,  Mark H. Clark ,  Andy Fu ,  Huiwen Xu

IPC: G11C11/00 ,  H01L29/16 ,  H01L21/02

CPC classification number: H01L45/04 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/124 ,  H01L45/149 ,  H01L45/1683 ,  H01L45/1691

Abstract: In some aspects, a microelectronic structure is provided that includes (1) a first conducting layer; (2) a first dielectric layer formed above the first conducting layer and having a feature that exposes a portion of the first conducting layer; (3) a graphitic carbon film disposed on a sidewall of the feature defined by the first dielectric layer and in contact with the first conducting layer at a bottom of the feature; and (4) a second conducting layer disposed above and in contact with the graphitic carbon film. Numerous other aspects are provided.

Abstract translation: 在一些方面，提供微电子结构，其包括（1）第一导电层; （2）形成在第一导电层之上并具有暴露第一导电层的一部分的特征的第一介电层; （3）石墨碳膜，其设置在由所述第一介电层限定的特征的侧壁上，并且在所述特征的底部与所述第一导电层接触; 和（4）设置在石墨碳膜上方并与石墨碳膜接触的第二导电层。 提供了许多其他方面。

公开(公告)号：US20090257265A1

公开(公告)日：2009-10-15

申请号：US12153872

申请日：2008-05-27

Applicant: Xiying Chen ,  Bing K. Yen ,  Dat Nguyen ,  Huiwen Xu ,  George Samachisa ,  Tanmay Kumar ,  Er-Xuan Ping

Inventor： Xiying Chen ,  Bing K. Yen ,  Dat Nguyen ,  Huiwen Xu ,  George Samachisa ,  Tanmay Kumar ,  Er-Xuan Ping

IPC: G11C11/00 ,  G11C11/34 ,  G11C7/00

CPC classification number: G11C11/56 ,  B82Y10/00 ,  G11C13/00 ,  G11C13/0069 ,  G11C13/025 ,  G11C2013/009 ,  G11C2213/35 ,  G11C2213/72 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/149 ,  H01L45/1616 ,  H01L45/1675

Abstract: A nonvolatile memory cell includes a steering element located in series with a storage element. The storage element includes a carbon material and the memory cell includes a rewritable cell having multiple memory levels.

Abstract translation: 非易失性存储单元包括与存储元件串联定位的转向元件。 存储元件包括碳材料，并且存储单元包括具有多个存储器级别的可重写单元。

公开(公告)号：US20090093132A1

公开(公告)日：2009-04-09

申请号：US11869416

申请日：2007-10-09

Applicant: HUIWEN XU ,  Yijun Liu ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad

Inventor： HUIWEN XU ,  Yijun Liu ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad

IPC: H01L21/31

CPC classification number: H01L21/02205 ,  C23C16/22 ,  C23C16/505 ,  H01L21/02112 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/3185

Abstract: The present invention generally provides a method for forming a dielectric barrier with lowered dielectric constant, improved etching resistivity and good barrier property. One embodiment provides a method for processing a semiconductor substrate comprising flowing a precursor to a processing chamber, wherein the precursor comprises silicon-carbon bonds and carbon-carbon bonds, and generating a low density plasma of the precursor in the processing chamber to form a dielectric barrier film having carbon-carbon bonds on the semiconductor substrate, wherein the at least a portion of carbon-carbon bonds in the precursor is preserved in the low density plasma and incorporated in the dielectric barrier film.

Abstract translation: 本发明通常提供一种形成具有降低的介电常数，改进的蚀刻电阻率和良好的阻挡性能的介电阻挡层的方法。 一个实施例提供了一种用于处理半导体衬底的方法，包括将前体流入处理室，其中前体包含硅 - 碳键和碳 - 碳键，并在处理室中产生前体的低密度等离子体以形成电介质 在半导体衬底上具有碳 - 碳键的阻挡膜，其中前体中的至少一部分碳 - 碳键保存在低密度等离子体中并且并入介电阻挡膜中。

公开(公告)号：US20060093756A1

公开(公告)日：2006-05-04

申请号：US10981430

申请日：2004-11-03

Applicant: Nagarajan Rajagopalan ,  Li-Qun Xia ,  Mihaela Balseanu ,  Thomas Nowak ,  Ranjana Shah ,  Huiwen Xu ,  Chad Peterson ,  Derek Witty ,  Hichem M'Saad

Inventor： Nagarajan Rajagopalan ,  Li-Qun Xia ,  Mihaela Balseanu ,  Thomas Nowak ,  Ranjana Shah ,  Huiwen Xu ,  Chad Peterson ,  Derek Witty ,  Hichem M'Saad

IPC: B05D1/36

CPC classification number: C23C16/4405 ,  C23C16/4404 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02301 ,  H01L21/3121 ,  H01L21/31633

Abstract: A method for seasoning a deposition chamber wherein the chamber components and walls are densely coated with a material that does not contain carbon prior to deposition of an organo-silicon material on a substrate. An optional carbon-containing layer may be deposited therebetween. A chamber cleaning method using low energy plasma and low pressure to remove residue from internal chamber surfaces is provided and may be combined with the seasoning process.

Abstract translation: 一种用于调节沉积室的方法，其中在将有机硅材料沉积在基底上之前，室部件和壁被不含碳的材料致密地涂覆。 可以在其间沉积任选的含碳层。 提供了使用低能量等离子体和低压以从内部室表面除去残余物的室清洁方法，并且可以与调味过程组合。