公开(公告)号：US20230352556A1

公开(公告)日：2023-11-02

申请号：US18217739

申请日：2023-07-03

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Petri Raisanen ,  Michael Eugene Givens

IPC: H01L29/51 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66 ,  C23C16/455 ,  H01L29/49 ,  C23C16/34

CPC classification number: H01L29/517 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/02205 ,  H01L21/02175 ,  H01L29/66568 ,  C23C16/45525 ,  H01L29/4966 ,  C23C16/34

Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.

公开(公告)号：US11056567B2

公开(公告)日：2021-07-06

申请号：US16400814

申请日：2019-05-01

Applicant: ASM IP Holding B.V.

Inventor： Dong Li ,  Peng-Fu Hsu ,  Petri Raisanen ,  Moataz Bellah Mousa ,  Ward Johnson ,  Xichong Chen

IPC: H01L29/423 ,  H01L21/28 ,  H01L29/49

Abstract: Methods for depositing a doped metal carbide film on a substrate are disclosed. The methods may include: depositing a doped metal carbide film on a substrate utilizing at least one deposition cycle of a cyclical deposition process; and contacting the doped metal carbide film with a plasma generated from a hydrogen-containing gas. Semiconductor device structures including a doped metal carbide film formed by the methods of the disclosure are also disclosed.

公开(公告)号：US20190271078A1

公开(公告)日：2019-09-05

申请号：US15909705

申请日：2018-03-01

Applicant: ASM IP Holding B.V.

Inventor： Petri Raisanen ,  David Marquardt ,  Thomas Aswad

IPC: C23C16/44 ,  C23C16/56 ,  C23C16/455 ,  C23C16/458 ,  C23C16/46

Abstract: A semiconductor processing apparatus is disclosed. The apparatus may include, a reaction chamber and a susceptor dispose in the reaction chamber configured for supporting a substrate thereon, the susceptor comprising a plurality of through-holes in an axial direction of the susceptor. The apparatus may also include, a plurality of lift pins, each of the lift pins being disposed within a respective through-hole, and at least one gas transmitting channel comprising one or more gas channel outlets, the one or more gas channel outlets being disposed proximate to the through-holes. Methods for processing a substrate within a reaction chamber are also disclosed.

公开(公告)号：US20190221433A1

公开(公告)日：2019-07-18

申请号：US16242829

申请日：2019-01-08

Applicant: ASM IP Holding B.V.

Inventor： Petri Raisanen ,  Mark Olstad ,  Jose Alexandro Romero ,  Dong Li ,  Ward Johnson ,  Peijun Chen

IPC: H01L21/285 ,  H01L29/49 ,  H01L21/28 ,  C23C16/32 ,  C23C16/455

CPC classification number: H01L21/28556 ,  C23C16/32 ,  C23C16/45527 ,  C23C16/45553 ,  H01L21/28088 ,  H01L29/4966

Abstract: A method of depositing a material film on a substrate within a reaction chamber by a cyclical deposition process is disclosed. The method may include: contacting the substrate with a first vapor phase reactant and purging the reaction chamber with a first main purge. The method also includes: contacting the substrate with a second vapor phase reactant by two or more micro pulsing processes, wherein each micro pulsing process comprises: contacting the substrate with a micro pulse of a second vapor phase reactant; and purging the reaction chamber with a micro purge, wherein each of the micro pulses of the second vapor phase reactant provides a substantially constant concentration of the second vapor phase reactant into the reaction chamber. The method may also include; purging the reaction chamber with a second main purge. Device structures including a material film deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US20180350588A1

公开(公告)日：2018-12-06

申请号：US15974988

申请日：2018-05-09

Applicant: ASM IP Holding B.V.

Inventor： Petri Raisanen ,  Moataz Bellah Mousa ,  Peng-Fu Hsu

IPC: H01L21/02

Abstract: A method for forming a metal nitride film with good film closure at low temperatures is disclosed. The method may comprise utilizing plasma to form NH and NH2 radicals to allow for the formation of the metal nitride at low temperatures. The method may also comprise flowing an etch gas to result in an amorphous film with uniform thickness. The method may also comprise flowing an alkyl hydrazine to inhibit three-dimensional island growth of the metal nitride film.

公开(公告)号：US09790595B2

公开(公告)日：2017-10-17

申请号：US14606364

申请日：2015-01-27

Applicant: ASM IP Holding B.V.

Inventor： Sung-Hoon Jung ,  Petri Raisanen ,  Eric Jen Cheng Liu ,  Mike Schmotzer

IPC: C23C16/42 ,  C23C16/44 ,  C23C16/455

CPC classification number: C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/45534 ,  C23C16/45544

Abstract: Systems and methods of reducing outgassing of a substance within a reaction chamber of a reactor are disclosed. Exemplary methods include depositing a barrier layer within the reaction chamber and using a scavenging precursor to react with species on a surface of the reaction chamber. Exemplary systems include gas-phase deposition systems, such as atomic layer deposition systems, which include a barrier layer source and/or a scavenging precursor source fluidly coupled to a reaction chamber of the system.

公开(公告)号：US09711350B2

公开(公告)日：2017-07-18

申请号：US14729510

申请日：2015-06-03

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Fu Tang ,  Michael Givens ,  Petri Raisanen ,  Jan Willem Maes

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/02 ,  H01L29/16 ,  H01L29/20 ,  H01L29/10 ,  H01L21/28 ,  H01L29/51

CPC classification number: H01L21/02247 ,  H01L21/02112 ,  H01L21/02205 ,  H01L21/02249 ,  H01L21/02255 ,  H01L21/0228 ,  H01L21/02301 ,  H01L21/2807 ,  H01L29/1033 ,  H01L29/16 ,  H01L29/20 ,  H01L29/518

Abstract: In some embodiments, a semiconductor surface having a high mobility semiconductor may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.

公开(公告)号：US20160358835A1

公开(公告)日：2016-12-08

申请号：US15169430

申请日：2016-05-31

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Fu Tang ,  Michael Givens ,  Petri Raisanen ,  Jan Willem Maes ,  Xiaoqiang Jiang

IPC: H01L23/31 ,  H01L29/161 ,  H01L29/51 ,  C23C16/52 ,  H01L21/02 ,  C23C16/40 ,  C23C16/30 ,  C23C16/455 ,  H01L29/10 ,  H01L21/28

CPC classification number: H01L23/3171 ,  C23C16/0218 ,  C23C16/403 ,  C23C16/405 ,  H01L21/02112 ,  H01L21/0228 ,  H01L21/02299 ,  H01L21/02304 ,  H01L21/28255 ,  H01L21/306 ,  H01L21/3105 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: In some embodiments, a semiconductor surface may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, native oxide is removed from the semiconductor surface and the surface is subsequently nitrided. In some other embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.

Abstract translation: 在一些实施方案中，可以通过氮化，优选使用肼，肼衍生物或其组合来有效地钝化半导体表面。 该表面可以是晶体管沟道区的半导体表面。 在一些实施方案中，将天然氧化物从半导体表面上除去，随后将表面氮化。 在一些其它实施例中，在半导体表面形成半导体表面氧化物层，并且通过在表面形成半导体氮氧化物层来实现钝化，其中氮化对表面氧化物产生氮以形成氧氮化物层。 半导体氧化物层可以通过原子层沉积（ALD）沉积，并且氮化也可以作为ALD的一部分进行。

公开(公告)号：US09461134B1

公开(公告)日：2016-10-04

申请号：US14717553

申请日：2015-05-20

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Fu Tang ,  Petri Raisanen ,  Jacob Woodruff ,  Jan Willem Maes ,  Michael Givens

IPC: H01L21/44 ,  H01L29/45 ,  H01L21/02 ,  H01L21/285 ,  H01L29/16 ,  H01L29/08 ,  H01L29/66 ,  H01L23/31 ,  H01L23/29

CPC classification number: H01L29/45 ,  H01L21/02186 ,  H01L21/0228 ,  H01L21/285 ,  H01L21/76831 ,  H01L23/291 ,  H01L23/485 ,  H01L29/0847 ,  H01L29/0895 ,  H01L29/16 ,  H01L29/66477 ,  H01L29/66568 ,  H01L29/78

Abstract: In some embodiments, an MIS-type contact structure is formed by passivating the semiconductor surface of a source/drain region with a chalcogen, and subsequently depositing an tunnel layer by first exposing the chalcogen-passivated surface to a metal-organic precursor. Subsequently, deposition of the tunnel layer continues to a desired thickness. Preferably, the metal-organic precursor is part of a first set of ALD precursors and a second set of ALD precursors, which include one or more metal or semimetal precursors, are subsequently used to continue the deposition. For example, the metal-organic precursor may be used to deposit a first portion of the tunnel layer, and an inorganic metal or inorganic semimetal precursor or a different organic metal or organic semimetal precursor may be used to deposit a second portion of the tunnel layer. A metal is subsequently deposited on the tunnel layer, e.g., to form a metal electrode or electrical contact.

Abstract translation: 在一些实施例中，通过用硫族元素钝化源极/漏极区域的半导体表面并随后通过首先将硫属软化钝化表面暴露于金属 - 有机前体而沉积隧道层来形成MIS型接触结构。 随后，隧道层的沉积继续到期望的厚度。 优选地，金属 - 有机前体是第一组ALD前体的一部分，并且随后使用包括一种或多种金属或半金属前体的第二组ALD前体来继续沉积。 例如，金属有机前体可以用于沉积隧道层的第一部分，并且可以使用无机金属或无机半金属前体或不同的有机金属或有机半金属前体来沉积隧道层的第二部分 。 随后在隧道层上沉积金属，例如形成金属电极或电接触。

公开(公告)号：US09385164B2

公开(公告)日：2016-07-05

申请号：US14256728

申请日：2014-04-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Vladimir Machkaoutsan ,  Jan Willem Maes ,  Michael Givens ,  Petri Raisanen

IPC: H01L21/8242 ,  H01L27/24 ,  H01L45/00 ,  G11C13/00

CPC classification number: H01L27/2481 ,  G11C13/0007 ,  G11C2213/71 ,  H01L45/08 ,  H01L45/085 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1641

Abstract: A method for forming a resistive random access memory (RRAM) device is disclosed. The method comprises forming a first electrode, forming a resistive switching oxide layer comprising a metal oxide by thermal atomic layer deposition (ALD), doping the resistive switching oxide layer with a metal dopant different from metal forming the metal oxide, and forming a second electrode by thermal atomic layer deposition (ALD), where the resistive switching layer is interposed between the first electrode and the second electrode. In some embodiments, forming the resistive switching oxide may be performed without exposing a surface of the switching oxide layer to a surface-modifying plasma treatment after depositing the metal oxide.

Abstract translation: 公开了一种形成电阻随机存取存储器（RRAM）装置的方法。 该方法包括：形成第一电极，通过热原子层沉积（ALD）形成包含金属氧化物的电阻式开关氧化物层，用与形成金属氧化物的金属不同的金属掺杂剂掺杂电阻式开关氧化物层，以及形成第二电极 通过热原子层沉积（ALD），其中电阻式开关层介于第一电极和第二电极之间。 在一些实施例中，在沉积金属氧化物之后，可以进行形成电阻式开关氧化物而不使开关氧化物层的表面暴露于表面改性等离子体处理。