Abstract:
Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure to circuit board protection. The tamper-respondent assemblies include a circuit board, and an electronic enclosure mounted to the circuit board and facilitating enclosing at least one electronic component within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and the tamper-respondent electronic circuit structure includes a tamper-respondent circuit. An adhesive is provided to secure, in part, the electronic enclosure to the circuit board. The adhesive contacts, at least in part, the tamper-respondent circuit so that an attempted separation of the electronic enclosure from the circuit board causes the adhesive to break the tamper-respondent circuit, facilitating detection of the separation by a monitor circuit of the tamper-respondent electronic circuit structure.
Abstract:
A fluxless bonding process is provided. An array of micro solder bumps of a first semiconductor structure is aligned to an array of bonding pads of a second semiconductor structure under an applied bonding force. An environment is provided to prevent oxides from forming on the solder bump structures and bonding pads during the bonding process. A scrubbing process is performed at a given scrubbing frequency and amplitude to scrub the micro solder bumps against the bonding pads in a direction perpendicular to the bonding. Heat is applied to at least the first semiconductor structure to melt and bond the micro solder bumps to the bonding pads. The first semiconductor structure is cooled down to solidify the molten solder. Coplanarity is maintained between the bonding surfaces of the semiconductor structures within a given tolerance during the scrubbing and cooling steps until solidification of the micro solder bumps.
Abstract:
Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure to circuit board protection. The tamper-respondent assemblies include a circuit board, and an electronic enclosure mounted to the circuit board and facilitating enclosing at least one electronic component within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and the tamper-respondent electronic circuit structure includes a tamper-respondent circuit. An adhesive is provided to secure, in part, the electronic enclosure to the circuit board. The adhesive contacts, at least in part, the tamper-respondent circuit so that an attempted separation of the electronic enclosure from the circuit board causes the adhesive to break the tamper-respondent circuit, facilitating detection of the separation by a monitor circuit of the tamper-respondent electronic circuit structure.
Abstract:
Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure to circuit board protection. The tamper-respondent assemblies include a circuit board, and an electronic enclosure mounted to the circuit board and facilitating enclosing at least one electronic component within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and the tamper-respondent electronic circuit structure includes a tamper-respondent circuit. An adhesive is provided to secure, in part, the electronic enclosure to the circuit board. The adhesive contacts, at least in part, the tamper-respondent circuit so that an attempted separation of the electronic enclosure from the circuit board causes the adhesive to break the tamper-respondent circuit, facilitating detection of the separation by a monitor circuit of the tamper-respondent electronic circuit structure.
Abstract:
A heat sink and method for using the same for use in cooling an integrated circuit (IC) chip is provided herein. The heat sink includes a manifold block, a liquid-filled cooling system, and a compliant foil affixed to the manifold block and backed by a liquid in the closed loop cooling system. The pressure provided by the liquid behind the foil causes the foil to bow, and to conform to non-planarities in the surface of the IC chip, thus reducing air gaps and increasing thermal coupling between the IC chip and the heat sink.
Abstract:
A heat sink and method for using the same for use in cooling an integrated circuit (IC) chip is provided herein. The heat sink includes a manifold block, a liquid-filled cooling system, and a compliant foil affixed to the manifold block and backed by a liquid in the closed loop cooling system. The pressure provided by the liquid behind the foil causes the foil to bow, and to conform to non-planarities in the surface of the IC chip, thus reducing air gaps and increasing thermal coupling between the IC chip and the heat sink.
Abstract:
A multichip module includes a carrier, a stiffening frame, a plurality of semiconductor chips, and a plurality of covers. The carrier has a top surface and a bottom surface configured to be electrically connected to a motherboard. The stiffening frame includes a plurality of openings that accept the plurality of semiconductor chips and may be attached to the top surface of the carrier with an adhesive that absorbs dimensional changes between the stiffening frame and the carrier. The semiconductor chips are concentrically arranged within the plurality of openings of the stiffening frame and the plurality of covers are attached to the stiffening frame so as to enclose the plurality of openings.
Abstract:
A fill head apparatus includes at least one chamber for holding a fluid. The chamber has an outlet for expelling the fluid. A vacuum device has an inlet for a suction device adjacent to the fluid outlet. A plurality of flexible and resilient sealing devices contact a top surface of a workpiece. The sealing devices are positioned on opposing sides of the chamber outlet and on opposing sides of the vacuum device inlet, such that the sealing devices create at least a partial seal around a cavity defined by the workpiece and the cavity is beneath both the chamber outlet and the vacuum outlet.
Abstract:
A multi-chip module (MCM) package includes an organic laminate substrate; first and second semiconductor device chips that are mounted to a top side of the substrate and that define a chip gap region between opposing edges of the chips; and a stiffener that is embedded in the bottom side of the substrate. The stiffener extends across a stiffening region, which underlies the chip gap region, and does not protrude beyond a bottom side metallization of the substrate.
Abstract:
Disclosed are embodiments of forming porous copper on the end of a copper pillar. The embodiments may be used to remove solder from selected locations on a chip or laminate substrate.