公开(公告)号：US20190189463A1

公开(公告)日：2019-06-20

申请号：US16222592

申请日：2018-12-17

Applicant: Infineon Technologies AG

Inventor： Gerhard Schmidt ,  Mario Barusic ,  Benedikt Stoib

IPC: H01L21/322 ,  H01L27/06 ,  H01L29/32 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861 ,  H01L49/02

CPC classification number: H01L21/3223 ,  H01L27/0664 ,  H01L28/10 ,  H01L29/32 ,  H01L29/66136 ,  H01L29/66333 ,  H01L29/7395 ,  H01L29/861

Abstract: A method for forming a semiconductor device includes incorporating recombination center atoms into a semiconductor substrate. The method further includes, after incorporating the recombination center atoms into the semiconductor substrate, implanting noble gas atoms into a doping region of a diode structure and/or a transistor structure, the doping region being arranged at a surface of the semiconductor substrate.

公开(公告)号：US10079281B2

公开(公告)日：2018-09-18

申请号：US15434208

申请日：2017-02-16

Applicant: Infineon Technologies AG

Inventor： Gerhard Schmidt ,  Erwin Lercher

IPC: H01L29/78 ,  H01L21/761 ,  H01L21/266 ,  H01L21/04 ,  H01L21/34 ,  H01L21/40 ,  H01L29/06 ,  H01L29/40 ,  H01L29/10 ,  H01L21/762 ,  H01L21/225 ,  H01L29/423 ,  H01L29/739 ,  H01L29/66

CPC classification number: H01L29/1095 ,  H01L21/04 ,  H01L21/2252 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/34 ,  H01L21/40 ,  H01L21/761 ,  H01L21/76202 ,  H01L29/0619 ,  H01L29/0684 ,  H01L29/36 ,  H01L29/402 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/739 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7823

Abstract: A method for forming a semiconductor device includes incorporating dopants of a first conductivity type into a nearby body region portion of a semiconductor substrate having a base doping of the first conductivity type. The incorporation of the dopants of the first conductivity type is masked by a mask structure at at least part of an edge region of the semiconductor substrate. The method further includes forming a body region of a transistor structure of a second conductivity type in the semiconductor substrate. The nearby body region portion of the semiconductor substrate is located adjacent to the body region of the transistor structure.

公开(公告)号：US20170243940A1

公开(公告)日：2017-08-24

申请号：US15434208

申请日：2017-02-16

Applicant: Infineon Technologies AG

Inventor： Gerhard Schmidt ,  Erwin Lercher

IPC: H01L29/10 ,  H01L29/40 ,  H01L21/762 ,  H01L21/266 ,  H01L29/66 ,  H01L21/225 ,  H01L29/423 ,  H01L29/78 ,  H01L29/739 ,  H01L29/06 ,  H01L21/761

CPC classification number: H01L29/1095 ,  H01L21/04 ,  H01L21/2253 ,  H01L21/266 ,  H01L21/34 ,  H01L21/40 ,  H01L21/761 ,  H01L21/76202 ,  H01L29/0619 ,  H01L29/0684 ,  H01L29/36 ,  H01L29/402 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/739 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7823

Abstract: A method for forming a semiconductor device includes incorporating dopants of a first conductivity type into a nearby body region portion of a semiconductor substrate having a base doping of the first conductivity type. The incorporation of the dopants of the first conductivity type is masked by a mask structure at at least part of an edge region of the semiconductor substrate. The method further includes forming a body region of a transistor structure of a second conductivity type in the semiconductor substrate. The nearby body region portion of the semiconductor substrate is located adjacent to the body region of the transistor structure.

公开(公告)号：US09484221B2

公开(公告)日：2016-11-01

申请号：US14153377

申请日：2014-01-13

Applicant: Infineon Technologies AG

Inventor： Gerhard Schmidt ,  Josef Georg Bauer

IPC: H01L29/06 ,  H01L21/324 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861 ,  H01L29/08 ,  H01L21/265 ,  H01L27/07

CPC classification number: H01L21/324 ,  H01L21/26513 ,  H01L27/0727 ,  H01L27/0761 ,  H01L29/0834 ,  H01L29/66136 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/861

Abstract: A power semiconductor device has a semiconductor body having a first surface and a second surface that runs substantially parallel to the first surface. A first metallization is arranged on the first surface. A second metallization is arranged on the second surface. The semiconductor body includes an n-doped first semiconductor region spaced apart from the first metallization and having a first maximum doping concentration, an n-doped second semiconductor region having a second maximum doping concentration higher than the first maximum doping concentration and adjoining the first semiconductor region, and a third semiconductor region in ohmic contact with the second metallization, arranged between the second metallization and the second semiconductor region, and adjoining the second semiconductor region. The second semiconductor region is made of a semiconductor material which includes electrically active chalcogen impurities as donors. At least 90% of the electrically active chalcogen impurities form isolated defects in the semiconductor material.

Abstract translation: 功率半导体器件具有半导体本体，其具有基本上平行于第一表面延伸的第一表面和第二表面。 第一金属化被布置在第一表面上。 第二金属化被布置在第二表面上。 半导体本体包括与第一金属化间隔开并具有第一最大掺杂浓度的n掺杂的第一半导体区域，具有高于第一最大掺杂浓度的第二最大掺杂浓度的n掺杂的第二半导体区域并邻接第一半导体 以及与所述第二金属化欧姆接触的第三半导体区域，被布置在所述第二金属化层和所述第二半导体区域之间并邻接所述第二半导体区域。 第二半导体区域由包含作为供体的电活性硫属元素杂质的半导体材料制成。 至少90％的电活性硫族元素杂质在半导体材料中形成孤立的缺陷。

公开(公告)号：US09324783B2

公开(公告)日：2016-04-26

申请号：US14501298

申请日：2014-09-30

Applicant: Infineon Technologies AG

Inventor： Elmar Falck ,  Gerhard Schmidt

IPC: H01L29/739 ,  H01L29/06 ,  H01L21/761 ,  H01L21/765

CPC classification number: H01L29/063 ,  H01L21/761 ,  H01L21/765 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/0834 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/6606 ,  H01L29/66136 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/861 ,  H01L29/8613 ,  H01L29/872

Abstract: A semiconductor device has a semiconductor body with a first side and a second side that is arranged distant from the first side in a first vertical direction. The semiconductor device has a rectifying junction, a field stop zone of a first conduction type, and a drift zone of a first conduction type arranged between the rectifying junction and the field stop zone. The semiconductor body has a net doping concentration along a line parallel to the first vertical direction. At least one of (a) and (b) applies: (a) the drift zone has, at a first depth, a charge centroid, wherein a distance between the rectifying junction and the charge centroid is less than 37% of the thickness the drift zone has in the first vertical direction; (b) the absolute value of the net doping concentration comprises, along the straight line and inside the drift zone, a local maximum value.

Abstract translation: 半导体器件具有半导体本体，其具有在第一垂直方向上远离第一侧布置的第一侧和第二侧。 半导体器件具有整流结，第一导电类型的场阻挡区和布置在整流结与场停止区之间的第一导电类型的漂移区。 半导体体沿着与第一垂直方向平行的线具有净掺杂浓度。 （a）和（b）中的至少一个适用：（a）漂移区在第一深度处具有电荷重心，其中整流结和电荷重心之间的距离小于厚度的37％ 漂移区位于第一垂直方向; （b）净掺杂浓度的绝对值包括沿着直线和漂移区内部的局部最大值。

公开(公告)号：US20160049463A1

公开(公告)日：2016-02-18

申请号：US14457491

申请日：2014-08-12

Applicant: Infineon Technologies AG

Inventor： Karin Buchholz ,  Matteo Dainese ,  Elmar Falck ,  Hans-Joachim Schulze ,  Gerhard Schmidt ,  Frank Umbach

IPC: H01L29/06 ,  H01L29/40

CPC classification number: H01L29/0615 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0638 ,  H01L29/404 ,  H01L29/7395 ,  H01L29/74 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8611 ,  H01L29/872

Abstract: A semiconductor device has a semiconductor body including opposing bottom and top sides, a surface surrounding the semiconductor body, an active semiconductor region formed in the semiconductor body, an edge region surrounding the active semiconductor region, a first semiconductor zone of a first conduction type formed in the edge region, an edge termination structure formed in the edge region at the top side, and a shielding structure arranged on that side of the edge termination structure facing away from the bottom side. The shielding structure has a number of N1≧2 first segments and a number of N2≧1 second segments. Each of the first segments is electrically connected to each of the other first segments and to each of the second segments, and each of the second segments has an electric resistivity higher than an electric resistivity of each of the first segments.

Abstract translation: 半导体器件具有半导体本体，该半导体本体包括相对的底部和顶侧，围绕半导体本体的表面，形成在半导体本体中的有源半导体区域，围绕有源半导体区域的边缘区域，形成第一导电类型的第一半导体区域 在边缘区域中，形成在顶侧的边缘区域中的边缘终端结构以及布置在边缘终端结构的背离底侧的那一侧的屏蔽结构。 屏蔽结构具有多个N1≥2个第一段和N 2个≥1个第二段。 每个第一段电连接到每个其它第一段和每个第二段，并且每个第二段具有高于每个第一段的电阻率的电阻率。

公开(公告)号：US20150014815A1

公开(公告)日：2015-01-15

申请号：US14503749

申请日：2014-10-01

Applicant: Infineon Technologies AG

Inventor： Gerhard Schmidt ,  Daniel Schloegl

IPC: H01L27/06 ,  H01L29/66 ,  H01L29/861 ,  H01L29/06

CPC classification number: H01L27/0676 ,  H01L29/0638 ,  H01L29/0661 ,  H01L29/66136 ,  H01L29/66325 ,  H01L29/8613

Abstract: A semiconductor device and a method for forming a semiconductor device are provided. The semiconductor device includes a semiconductor body including a diode-structure with a pn-junction, and an edge-termination structure arranged in a peripheral area of the semiconductor body. The edge-termination structure includes an insulating region partially arranged in the semiconductor body adjacent the pn-junction and a semi-insulating region arranged on the insulating region and spaced apart from the semiconductor body. The semi-insulating region forms a resistor connected in parallel with the diode-structure.

Abstract translation: 提供半导体器件和形成半导体器件的方法。 半导体器件包括具有pn结的二极管结构的半导体本体和布置在半导体本体的周边区域中的边缘终端结构。 边缘终端结构包括部分地布置在邻近pn结的半导体本体中的绝缘区域和布置在绝缘区域上并与半导体本体间隔开的半绝缘区域。 半绝缘区域形成与二极管结构并联连接的电阻器。

公开(公告)号：US20210287954A1

公开(公告)日：2021-09-16

申请号：US17333107

申请日：2021-05-28

Applicant: Infineon Technologies AG

Inventor： Markus Kahn ,  Oliver Humbel ,  Philipp Sebastian Koch ,  Angelika Koprowski ,  Christian Maier ,  Gerhard Schmidt ,  Juergen Steinbrenner

IPC: H01L23/31 ,  H01L23/29 ,  H01L23/00 ,  C23C16/34 ,  H01L21/02 ,  H01L29/06

Abstract: A semiconductor device includes: a semiconductor body having an active region and an edge termination region between the active region and a side surface of the semiconductor body; a first portion including silicon and nitrogen; a second portion including silicon and nitrogen, the second portion being in direct contact with the first portion; and a front side metallization in contact with the semiconductor body in the active region. The first portion separates the second portion from the semiconductor body. An average silicon content in the first portion is higher than in the second portion. The front side metallization is interposed between the first portion and the semiconductor body in the active region but not in the edge termination region, and/or the first portion and the second portion are both present in the edge termination region but not in the active region.

公开(公告)号：US20210265468A1

公开(公告)日：2021-08-26

申请号：US17235989

申请日：2021-04-21

Applicant: Infineon Technologies AG

Inventor： Ingo Muri ,  Johannes Konrad Baumgartl ,  Oliver Hellmund ,  Jacob Tillmann Ludwig ,  Iris Moder ,  Thomas Neidhart ,  Gerhard Schmidt ,  Hans-Joachim Schulze

IPC: H01L29/36 ,  H01L21/223 ,  H01L21/02 ,  H01L21/225 ,  H01L29/167 ,  H01L21/265

Abstract: A semiconductor device includes a semiconductor substrate having a first dopant and a second dopant. A covalent atomic radius of a material of the semiconductor substrate is i) larger than a covalent atomic radius of the first dopant and smaller than a covalent atomic radius of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than the covalent atomic radius of the second dopant. The semiconductor device further includes a semiconductor layer on the semiconductor substrate and semiconductor device elements in the semiconductor layer. A vertical concentration profile of the first dopant decreases along at least 80% of a distance between an interface of the semiconductor substrate and the semiconductor layer to a surface of the semiconductor substrate opposite to the interface.

公开(公告)号：US11038028B2

公开(公告)日：2021-06-15

申请号：US16406773

申请日：2019-05-08

Applicant: Infineon Technologies AG

Inventor： Ingo Muri ,  Johannes Konrad Baumgartl ,  Oliver Hellmund ,  Jacob Tillmann Ludwig ,  Iris Moder ,  Thomas Christian Neidhart ,  Gerhard Schmidt ,  Hans-Joachim Schulze

IPC: H01L29/36 ,  H01L21/223 ,  H01L21/02 ,  H01L21/225 ,  H01L29/167 ,  H01L21/265

Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate having opposing first and second main surfaces and first and second dopants. A covalent atomic radius of a material of the substrate is i) larger than a covalent atomic radius of the first dopant and smaller than that of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than that of the second dopant. A vertical extension of the first dopant into the substrate from the first main surface ends at a bottom of a substrate portion at a first vertical distance to the first main surface. The method further includes forming a semiconductor layer on the first main surface, forming semiconductor device elements in the semiconductor layer, and reducing a thickness of the substrate by removing material from the second main surface at least up to the substrate portion.