公开(公告)号：US07960273B2

公开(公告)日：2011-06-14

申请号：US12292827

申请日：2008-11-26

Applicant: Kyu-Ha Lee ,  Cha-Je Jo ,  Jeong-Woo Park

Inventor： Kyu-Ha Lee ,  Cha-Je Jo ,  Jeong-Woo Park

IPC: H01L21/44 ,  H01L21/4763

CPC classification number: H01L23/53238 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76885 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a metal interconnection of a semiconductor device includes forming a base layer with at least one groove, the at least one groove having an open upper portion, forming a first metal layer in the at least one groove, forming a seed metal layer on the first metal layer in the at least one groove, the seed metal layer being only on a bottom surface of the at least one groove, and forming a metal pattern grown from the seed metal layer to fill the at least one grove.

Abstract translation: 一种制造半导体器件的金属互连的方法包括：形成具有至少一个沟槽的基底层，所述至少一个沟槽具有开放的上部，在所述至少一个沟槽中形成第一金属层，形成种子金属层 在所述至少一个沟槽中的所述第一金属层上，所述籽晶金属层仅在所述至少一个沟槽的底表面上，并且形成从种子金属层生长以填充所述至少一个沟槽的金属图案。

公开(公告)号：US20100278477A1

公开(公告)日：2010-11-04

申请号：US12746167

申请日：2008-06-03

Applicant: Jeong-Woo Park ,  Gyung-Ock Kim ,  Mi-Ran Park ,  Jong-Bum You

Inventor： Jeong-Woo Park ,  Gyung-Ock Kim ,  Mi-Ran Park ,  Jong-Bum You

IPC: G02B6/12 ,  G02B6/34

CPC classification number: G02F1/218 ,  G02F2001/212 ,  G02F2201/302

Abstract: Provided is a semiconductor integrated circuit. The semiconductor integrated circuit includes a semiconductor pattern disposed on a substrate and including an optical waveguide part and a pair of recessed portions. The optical waveguide part has a thickness ranging from about 0.05 m to about 0.5 μm. The recessed portions are disposed on both sides of the optical waveguide part and have a thinner thickness than the optical waveguide part. A first doped region and a second doped region are disposed in the recessed portions, respectively. The first and second doped regions are doped with a first conductive type dopant and a second conductive type dopant, respectively. An intrinsic region is formed in at least the optical waveguide part to contact the first and second doped regions.

Abstract translation: 提供了一种半导体集成电路。 半导体集成电路包括设置在基板上并且包括光波导部分和一对凹部的半导体图案。 光波导部分的厚度范围为约0.05μm至约0.5μm。 凹部设置在光波导部分的两侧，并且具有比光波导部分更薄的厚度。 第一掺杂区域和第二掺杂区域分别设置在凹部中。 第一和第二掺杂区域分别掺杂有第一导电型掺杂剂和第二导电型掺杂剂。 在至少光波导部分中形成本征区域以接触第一和第二掺杂区域。

公开(公告)号：US20090207472A1

公开(公告)日：2009-08-20

申请号：US12374261

申请日：2007-04-24

Applicant: Hyun-Soo Kim ,  Jeong-Woo Park ,  Bongki Mheen ,  Young-Ahn Leem ,  Gyungock Kim

Inventor： Hyun-Soo Kim ,  Jeong-Woo Park ,  Bongki Mheen ,  Young-Ahn Leem ,  Gyungock Kim

IPC: G02F1/015 ,  H01L29/786

CPC classification number: G02F1/025 ,  G02F2203/50 ,  G11C13/04

Abstract: Provided is an optical device having an edge effect with improved phase shift and propagation loss of light without decreasing the dynamic characteristics of the optical device. The optical device includes a first semiconductor layer which is doped with a first type of conductive impurities, and has a recessed groove in an upper portion thereof; a gate insulating layer covering the groove and a portion of the first semiconductor layer; and a second semiconductor layer which covers an upper surface of the gate insulating layer and is doped with a second type of conductive impurities opposite to the first type of conductive impurities.

Abstract translation: 提供一种具有边缘效应的光学器件，具有改善的相移和光的传播损耗，而不会降低光学器件的动态特性。 光学器件包括掺杂有第一类导电杂质的第一半导体层，并且在其上部具有凹槽; 覆盖所述沟槽和所述第一半导体层的一部分的栅极绝缘层; 以及覆盖所述栅极绝缘层的上表面并且掺杂有与所述第一类型的导电杂质相反的第二类导电杂质的第二半导体层。

公开(公告)号：US20090154868A1

公开(公告)日：2009-06-18

申请号：US12117707

申请日：2008-05-08

Applicant: Mi-Ran PARK ,  O-Kyun Kwon ,  Jeong-Woo Park ,  Gyung-Ock Kim

Inventor： Mi-Ran PARK ,  O-Kyun Kwon ,  Jeong-Woo Park ,  Gyung-Ock Kim

IPC: G02F1/295

CPC classification number: G02F1/01708 ,  B82Y20/00 ,  G02F1/025 ,  G02F2001/0152 ,  G02F2201/302 ,  G02F2201/34 ,  G02F2203/02

Abstract: Provided are semiconductor opto-electronic integrated circuits and methods of forming the same. The semiconductor opto-electronic integrated circuit includes: an optical waveguide disposed on a substrate and including an input terminal and an output terminal; an optical grating formed on the optical waveguide; and an optical active device disposed on the optical grating and receiving an optical signal from the optical waveguide through the optical grating to modulate the optical signal.

Abstract translation: 提供半导体光电集成电路及其形成方法。 半导体光电集成电路包括：设置在基板上并包括输入端子和输出端子的光波导; 形成在光波导上的光栅; 以及设置在光栅上的光学有源器件，并通过光栅从光波导接收光信号，以调制光信号。

公开(公告)号：US20080222848A1

公开(公告)日：2008-09-18

申请号：US12066351

申请日：2006-09-07

Applicant: Jeong-Woo Park

Inventor： Jeong-Woo Park

IPC: B42D3/10

CPC classification number: B42D3/10 ,  B42D5/043 ,  B42P2241/12 ,  Y10T24/11

Abstract: A multipurpose supportable cover having improved portability and usability, the cover including a front cover 20, a filler page portion 30, and a rear cover 40 that are bound by a binder 10, wherein a first iron piece 21 is installed on a lower end of the front cover 20, the rear cover 40 includes a main rear cover 42, a first sub-rear cover 43, and a second sub-rear cover 44 that are partitioned by first and second folding lines 40a and 40b, and a magnet piece 41 to be attached to the first iron piece 21 is installed on a lower end of the second sub-rear cover 44.

Abstract translation: 具有改进的便携性和可用性的多用途可支撑盖，盖包括由粘合剂10结合的前盖20，填充页部分30和后盖40，其中第一铁件21安装在 前盖20，后盖40包括由第一和第二折叠线40,4a分隔的主后盖42，第一副后盖43和第二副后盖44以及磁铁 安装在第一铁片21上的片41安装在第二副后盖44的下端。

公开(公告)号：US20080098597A1

公开(公告)日：2008-05-01

申请号：US11976072

申请日：2007-10-19

Applicant: Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

Inventor： Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

IPC: H05K3/02

CPC classification number: H05K3/20 ,  H05K3/0058 ,  H05K3/108 ,  H05K3/4611 ,  H05K3/4682 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0376 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A method of manufacturing a circuit board is disclosed. A method of manufacturing a circuit board that includes forming a first circuit pattern on the insulation layer of a carrier, in which an insulation layer and a first seed layer are stacked in order; stacking and pressing the carrier and an insulation board with the side of the carrier having the first circuit pattern facing the insulation board; removing the carrier to transfer the first circuit pattern and the insulation layer onto the insulation board; and forming a second circuit pattern on the insulation layer transferred to the insulation board, allows fine pitch circuit patterns to enable the manufacture of fine circuit patterns of high density on the board, and allows the manufacture of a multi-layer circuit board with a simple process.

Abstract translation: 公开了一种制造电路板的方法。 一种制造电路板的方法，包括在载体的绝缘层上形成第一电路图案，其中绝缘层和第一种子层依次层叠; 堆叠并按压载体和绝缘板，其中载体侧具有面向绝缘板的第一电路图案; 移除载体以将第一电路图案和绝缘层转移到绝缘板上; 并且在转移到绝缘板的绝缘层上形成第二电路图案，允许精细的间距电路图案能够在板上制造高密度的精细电路图案，并且允许制造具有简单的多层电路板 处理。

公开(公告)号：US20080098596A1

公开(公告)日：2008-05-01

申请号：US11976071

申请日：2007-10-19

Applicant: Sang-Duck Kim ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Jeong-Woo Park

Inventor： Sang-Duck Kim ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Jeong-Woo Park

IPC: H05K3/20

CPC classification number: H05K3/20 ,  H05K3/205 ,  H05K3/207 ,  H05K3/386 ,  H05K2203/0113 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49163

Abstract: A method for forming transcriptional circuits and a method for manufacturing a circuit board are disclosed. A method of forming a transcriptional circuit, which includes forming an intaglio pattern corresponding to a circuit pattern by selectively forming a resist on a mold board, filling conductive material in the intaglio pattern, and transferring the conductive material onto a carrier by pressing the carrier onto the mold board such that the carrier faces the surface of the mold board having the conductive material filled in, makes it possible to form transcriptional circuits that can be transcribed into an insulation board using existing equipment, whereby costs can be reduced.

Abstract translation: 公开了一种形成转录电路的方法及其制造方法。 一种形成转录电路的方法，其包括通过在模板上选择性地形成抗蚀剂来形成对应于电路图案的凹版图案，将导电材料填充到凹版图案中，以及通过将载体压载到载体上而将载体转移到 使得载体面向具有填充有导电材料的模板的表面的模板，使得可以形成可以使用现有设备转录成绝缘板的转录电路，由此可以降低成本。