公开(公告)号：US20150115286A1

公开(公告)日：2015-04-30

申请号：US14400365

申请日：2013-06-06

申请人： Masahiro SUGIMOTO ,  Hidefumi TAKAYA ,  Akitaka SOENO ,  Jun MORIMOTO ,  DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Yuichi Takeuchi ,  Naohiro Suzuki ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Akitaka Soeno ,  Jun Morimoto ,  Narumasa Soejima ,  Yukihiko Watanabe

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L21/308 ,  H01L29/10 ,  H01L21/04 ,  H01L21/306 ,  H01L29/66 ,  H01L29/16

CPC分类号： H01L29/7811 ,  H01L21/046 ,  H01L21/0475 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/761 ,  H01L21/8213 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/157 ,  H01L29/158 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/861 ,  H01L29/872

摘要： An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.

摘要翻译： SiC半导体器件具有包含低浓度区域和填充在形成于单元区域的沟槽中的高浓度区域的p型区域。 由低浓度区域提供p型列，并且由高浓度区域提供p +型深层。 因此，由于可以通过由n型漂移层提供的p型列和n型列来形成SJ结构，所以可以降低导通电阻。 由于漏极电位可以被p +型深层阻挡，所以在关断时，施加到栅极绝缘膜的电场可以减轻，从而可以限制栅极绝缘膜的破裂。 因此，SiC半导体器件可以实现导通电阻的降低和栅极绝缘膜的破损的限制。

公开(公告)号：US08833902B2

公开(公告)日：2014-09-16

申请号：US12941914

申请日：2010-11-08

申请人： Takaya Sato ,  Yuji Kanome ,  Hiroyuki Tanaka ,  Yoshiaki Suzuki ,  Masahiro Sugimoto ,  Seiji Suzuki ,  Susumu Hirosawa ,  Takeaki Nakano

发明人： Takaya Sato ,  Yuji Kanome ,  Hiroyuki Tanaka ,  Yoshiaki Suzuki ,  Masahiro Sugimoto ,  Seiji Suzuki ,  Susumu Hirosawa ,  Takeaki Nakano

IPC分类号： B41J2/165

CPC分类号： B41J2/16585 ,  B41J2/16538

摘要： An apparatus includes a recording head having a sealing portion arranged in proximity to nozzle arrays and protruding beyond a nozzle surface. A wiper unit configured to wipe the nozzle surface of the recording head has a first wiper blade and a second wiper blade, and the first wiper blade is arranged to be inclined by an angle θ1 (θ1>0) with respect to a direction orthogonal to the wiping direction within a plane parallel to the nozzle surface, while the second wiper blade is arranged to be inclined by an angle θ2 (θ2

摘要翻译： 一种装置包括具有密封部分的记录头，该密封部分布置在喷嘴阵列附近并突出超过喷嘴表面。 被配置为擦拭记录头的喷嘴表面的刮水器单元具有第一刮水片和第二刮水片，并且第一刮水片布置成相对于第一刮板和倾斜角倾斜1; 在与喷嘴表面平行的平面内与擦拭方向正交的方向，而第二刮片设置成相对于与擦拭方向正交的方向倾斜角度θ; 2（＆amp; the; 2; 0） 飞机。

公开(公告)号：US08716121B2

公开(公告)日：2014-05-06

申请号：US13384850

申请日：2010-08-04

申请人： Akinori Seki ,  Masahiro Sugimoto ,  Akira Kawahashi ,  Yasuo Takahashi ,  Masakatsu Maeda

发明人： Akinori Seki ,  Masahiro Sugimoto ,  Akira Kawahashi ,  Yasuo Takahashi ,  Masakatsu Maeda

IPC分类号： H01L29/161 ,  H01L21/28 ,  H01L29/45

CPC分类号： H01L29/7802 ,  H01L21/0485 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/7395 ,  H01L29/78

摘要： An ohmic electrode for a p-type SiC semiconductor, and a method of forming the ohmic electrode. The ohmic electrode has an ohmic electrode layer, which has an amorphous structure and which is made of a Ti(1-x-y)Si(x)C(y) ternary film of which a composition ratio is within a composition range that is surrounded by two lines and two curves expressed by an expression x=0 (0.35≦y≦0.5), an expression y=−1.120x+0.5200 (0.1667≦x≦0.375), an expression y=1.778(x−0.375)2+0.1 (0≦x≦0.375) and an expression y=−2.504x2−0.5828x+0.5 (0≦x≦0.1667) and that excludes the line expressed by the expression x=0. The ohmic layer is directly laminated on a surface of a p-type SiC semiconductor.

摘要翻译： 用于p型SiC半导体的欧姆电极，以及形成欧姆电极的方法。 欧姆电极具有欧姆电极层，其具有非晶结构，并且由Ti（1-xy）Si（x）C（y）三元膜制成，其组成比在由 由表达式x = 0（0.35＆nlE; y＆nlE; 0.5）表示的两行和两条曲线，表达式y = -1.120x + 0.5200（0.1667＆nlE; x＆lt; lI; 0.375），表达式y = 1.778（x-0.375）2 +0.1（0＆nlE; x＆nlE; 0.375），并且表达式y = -2.504x2-0.5828x + 0.5（0＆nlE; x＆nlE; 0.1667），并且排除由表达式x = 0表示的行。 欧姆层直接层压在p型SiC半导体的表面上。

公开(公告)号：US20130116148A1

公开(公告)日：2013-05-09

申请号：US13805170

申请日：2011-05-17

申请人： Tomoyoshi Soga ,  Masahiro Sugimoto ,  Makoto Suematsu ,  Takafumi Saito ,  Sumio Kawata

发明人： Tomoyoshi Soga ,  Masahiro Sugimoto ,  Makoto Suematsu ,  Takafumi Saito ,  Sumio Kawata

IPC分类号： G01N33/68

CPC分类号： G01N33/576 ,  G01N33/5767 ,  G01N2800/085 ,  G01N2800/7009

摘要： Disclosed is a method for promptly identifying a liver disease. A normal person or a liver disease such as drug-induced liver injury, asymptomatic hepatitis B carrier, chronic hepatitis B, hepatitis C with persistently normal ALT, chronic hepatitis C, cirrhosis type C, hepatocellular carcinoma, simple steatosis, or non-alcoholic steatohepatitis is identified by measuring the concentration of a γ-Glu-X (wherein X represents an amino acid or an amine) peptide or the level of AST or ALT in blood and carrying out, for example, a multiple logistic regression based on the measured value.

摘要翻译： 公开了一种迅速鉴别肝脏疾病的方法。 正常人或肝脏疾病如药物诱导的肝损伤，无症状乙型肝炎携带者，慢性乙型肝炎，丙型肝炎持续ALT正常，慢性丙型肝炎，C型肝硬化，肝细胞癌，单纯脂肪变性或非酒精性脂肪性肝炎 通过测量γ-Glu-X（其中X表示氨基酸或胺）肽的浓度或血液中AST或ALT的水平进行鉴定，并且基于测量值进行多重逻辑回归 。

公开(公告)号：US20110273510A1

公开(公告)日：2011-11-10

申请号：US12965763

申请日：2010-12-10

申请人： Masahiro Sugimoto ,  Akira Kida ,  Masaharu Ueda

发明人： Masahiro Sugimoto ,  Akira Kida ,  Masaharu Ueda

IPC分类号： B41J2/165

CPC分类号： B41J2/16585 ,  B41J2/16552 ,  B41J3/543 ,  B41J2002/16502

摘要： A plurality of recording head units are supported by a holder in an integrated manner. The recording head units and pairs of rollers which hold a sheet are arranged alternately along a sheet conveying direction. An elastic member is disposed in a clearance between the holder and each of the recording head units supported by the holder in an elastically deformed manner to form an airtight seal. The airtight seal prevents upward leakage, from the clearance, of the humidifying gas introduced into the narrow space to which ink nozzles of the recording head units are exposed.

摘要翻译： 多个记录头单元由保持器以一体的方式支撑。 保持片材的记录头单元和辊对沿着纸张传送方向交替布置。 弹性构件设置在保持器和由保持器以弹性变形方式支撑的每个记录头单元之间的间隙中以形成气密密封。 气密密封件防止从引入到记录头单元的墨喷嘴的狭窄空间中的加湿气体的间隙向上泄漏。

公开(公告)号：US07879705B2

公开(公告)日：2011-02-01

申请号：US12440939

申请日：2007-09-21

申请人： Akira Kawahashi ,  Masahiro Sugimoto ,  Akinori Seki ,  Masakatsu Maeda ,  Yasuo Takahashi

发明人： Akira Kawahashi ,  Masahiro Sugimoto ,  Akinori Seki ,  Masakatsu Maeda ,  Yasuo Takahashi

IPC分类号： H01L21/28 ,  H01L21/44

CPC分类号： H01L29/7802 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/78 ,  Y10S438/931

摘要： A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form Al3Ti, and the second temperature is the minimum temperature of a temperature zone at which the Al3Ti reacts with SiC to form Ti3SiC2. As a result of this maintaining of temperature step, an Al3Ti-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the Al3Ti-layer to a temperature that is higher than the second temperature. As a result of this step of further heating the SiC substrate reacts with Al3Ti of the Al3Ti-layer to form a Ti3SiC2-layer on the surface of the SiC substrate.

摘要翻译： 阐述了在SiC半导体层上形成具有良好特性的欧姆电极的方法。 在该方法中，在SiC衬底的表面上形成Ti层和Al层。 具有Ti层和Al层的SiC衬底保持在高于或等于第一温度并低于第二温度的温度，直到Ti层中的所有Ti都与Al反应。 第一个温度是Ti与Al反应形成Al3Ti的温度区的最低温度，第二个温度是Al3Ti与SiC反应形成Ti3SiC2的温度区的最低温度。 由于这种维持温度步骤的结果，在SiC衬底的表面上形成Al 3 Ti层。 该方法还包括将具有Al 3 Ti层的SiC衬底进一步加热到高于第二温度的温度。 作为进一步加热的步骤的结果，SiC衬底与Al 3 Ti层的Al 3 Ti反应以在SiC衬底的表面上形成Ti 3 SiC 2层。

公开(公告)号：US20080090395A1

公开(公告)日：2008-04-17

申请号：US11902087

申请日：2007-09-19

申请人： Masahiro Sugimoto ,  Masakazu Kanechika ,  Daigo Kikuta ,  Osamu Ishiguro ,  Tsutomu Uesugi ,  Tetsu Kachi

发明人： Masahiro Sugimoto ,  Masakazu Kanechika ,  Daigo Kikuta ,  Osamu Ishiguro ,  Tsutomu Uesugi ,  Tetsu Kachi

IPC分类号： H01L21/225

CPC分类号： H01L21/2258 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/7828 ,  H01L29/808 ,  H01L29/861 ,  H01L33/325

摘要： The present invention provides a p-type group III nitride semiconductor production method which is excellent in terms of reliability and reproducibility. A photoresist mask is formed on a surface of an n−-GaN layer. Subsequently, an Mg film is formed so as to cover the n−-GaN layer and the photoresist mask, and an Ni/Pt metal film is formed on the Mg film. Thereafter, the photoresist mask is removed, whereby the Mg film and the metal film remain only on a portion of the n−-GaN layer where a p-type region is formed. Subsequently, when thermal treatment is performed in an ammonia atmosphere at 900° C. for three hours, Mg is diffused in the n−-GaN layer while being activated. Therefore, a p-type region is formed. Thereafter, the Mg film and the metal film are removed by use of aqua regia.

摘要翻译： 本发明提供了可靠性和再现性优异的p型III族氮化物半导体制造方法。 光刻胶掩模形成在n + O-GaN层的表面上。 随后，形成Mg膜，以覆盖n + SUP-GaN层和光致抗蚀剂掩模，并且在Mg膜上形成Ni / Pt金属膜。 此后，除去光致抗蚀剂掩模，由此Mg膜和金属膜仅保留在形成p型区域的n + O - GaN层的一部分上。 随后，当在900℃的氨气氛中进行3小时的热处理时，Mg在被激活的同时在n + SUP-GaN层中扩散。 因此，形成p型区域。 此后，通过使用王水去除Mg膜和金属膜。

公开(公告)号：US4742024A

公开(公告)日：1988-05-03

申请号：US076762

申请日：1987-07-23

申请人： Masahiro Sugimoto ,  Yasumasa Wakasugi ,  Shigeki Harada

发明人： Masahiro Sugimoto ,  Yasumasa Wakasugi ,  Shigeki Harada

IPC分类号： H01L23/04 ,  H01L23/02 ,  H01L23/055 ,  H01L23/34 ,  H01L23/367 ,  H01L39/02

CPC分类号： H01L23/055 ,  H01L23/3675 ,  H01L2224/32225 ,  H01L2924/01079 ,  Y10T29/4913 ,  Y10T29/53174 ,  Y10T29/53178

摘要： A semiconductor device comprises a substrate, a semiconductor element mounted on the substrate, a cap having an opening smaller than the external size of the semiconductor element for covering the semiconductor element to provide a hermetic seal, and a heatsink member mounted on the cap to cover the opening and to make contact with the semiconductor element via the opening, so that heat generated by the semiconductor element is conducted directly to the heatsink member. A method of producing the semiconductor device comprises the steps of mounting the semiconductor element on the substrate, covering the semiconductor element by the cap which is fixed to the substrate, and mounting the heatsink member on the cap to cover the opening and to make contact with the semiconductor element via the opening.

公开(公告)号：US4724472A

公开(公告)日：1988-02-09

申请号：US6347

申请日：1987-01-14

申请人： Masahiro Sugimoto ,  Tetsushi Wakabayashi ,  Kiyoshi Muratake

发明人： Masahiro Sugimoto ,  Tetsushi Wakabayashi ,  Kiyoshi Muratake

IPC分类号： H01L23/12 ,  H01L23/057 ,  H01L23/498 ,  H01L23/538 ,  H05K3/34 ,  H01L23/02

CPC分类号： H01L24/32 ,  H01L23/057 ,  H01L23/49811 ,  H01L23/5385 ,  H05K3/3426 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/351 ,  H05K2201/10704 ,  H05K2201/10909 ,  H05K2201/2081 ,  Y02P70/613

摘要： A semiconductor device to be mounted on a circuit board, including a semiconductor chip, a package for mounting the semiconductor chip, a plurality of conductor pads provided on the outer surface of the package, and a plurality of conductor pins, connected to the conductor pads in a substantially vertical contact condition, for connecting to the circuit board in accordance with a contacting condition.

摘要翻译： 一种半导体器件，其安装在电路板上，包括半导体芯片，用于安装半导体芯片的封装，设置在封装外表面上的多个导体焊盘以及连接到导体焊盘的多个导体引脚 在基本垂直的接触状态下，根据接触条件连接到电路板。

公开(公告)号：US4688077A

公开(公告)日：1987-08-18

申请号：US822964

申请日：1986-01-28

申请人： Tetsushi Wakabayashi ,  Masahiro Sugimoto ,  Kiyoshi Muratake

发明人： Tetsushi Wakabayashi ,  Masahiro Sugimoto ,  Kiyoshi Muratake

IPC分类号： H01L23/36 ,  H01L23/367 ,  H05K13/00 ,  H01L23/02

CPC分类号： H01L23/367 ,  H01L2224/48091 ,  H01L2224/73265

摘要： A semiconductor device having a semiconductor package and a radiator. The semiconductor package houses a semiconductor chip therein. The radiator includes a pillar which has a plurality of fins thereon. One end of the pillar is bonded to the semiconductor package. A hole is formed in the other end of the pillar and extends the longitudinal direction of the pillar.

摘要翻译： 一种具有半导体封装和散热器的半导体器件。 半导体封装在其中容纳半导体芯片。 散热器包括在其上具有多个翅片的支柱。 柱的一端接合到半导体封装。 在柱的另一端形成孔，并且延伸柱的纵向方向。