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13 条记录 (耗时 0.019 秒)

    Integrated circuit device having package with bypass capacitor
    3.
    发明授权
    Integrated circuit device having package with bypass capacitor 失效
    具有旁路电容器封装的集成电路器件

    公开(公告)号：US4598307A

    公开(公告)日：1986-07-01

    申请号：US530046

    申请日：1983-09-07

    申请人： Tetsushi Wakabayashi ,  Kiyoshi Muratake

    发明人： Tetsushi Wakabayashi ,  Kiyoshi Muratake

    IPC分类号： H01L25/00 ,  E04B2/56 ,  H01L23/12 ,  H01L23/495 ,  H01L23/50 ,  H01L23/16 ,  H01L23/48

    CPC分类号： H01L23/495 ,  H01L23/49589 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/30107

    摘要： In order to protect ICs from noise it is necessary to mount a bypass capacitor as close as possible to the IC die or chip. The package must seal the die from the environment, but there are marginal spaces at the ends of a dual in line type package (DIP type package) which are not needed for the sealing function. An opening is made in the lid of the package at such a marginal area, and a chip capacitor is mounted in the opening. An additional post is provided on the lead frame. A portion of this additional post and a portion of another lead provided by the frame are exposed through the opening in the lid. The chip capacitor is soldered to the exposed portions to mechanically and electrically connect the capacitor. The additional post is scored at the edge of the package to permit easy removal of the portion thereof that would otherwise extend outside the package.

    摘要翻译： 为了保护IC免受噪声的影响，必须将旁路电容器尽可能靠近IC芯片或芯片安装。 包装必须将模具与环境密封，但在密封功能不需要的双列直插式包装（DIP型包装）的端部存在边缘空间。 在这样一个边缘区域的封装盖上形成一个开口，并在开口中安装一个片状电容器。 在引线框架上提供一个附加的柱。 该附加柱的一部分和由框架提供的另一个引线的一部分通过盖中的开口暴露。 芯片电容器被焊接到暴露的部分以机械地和电连接电容器。 附加柱在包装的边缘刻痕，以便容易地移除否则将在包装外部延伸的部分。

    Heat sink for a semiconductor device
    8.
    发明授权
    Heat sink for a semiconductor device 失效
    散热器用于半导体器件

    公开(公告)号：US4535384A

    公开(公告)日：1985-08-13

    申请号：US620522

    申请日：1984-06-12

    申请人： Tetsushi Wakabayashi ,  Norio Honda ,  Osamu Sakuma

    发明人： Tetsushi Wakabayashi ,  Norio Honda ,  Osamu Sakuma

    IPC分类号： H01L23/36 ,  H01L23/367 ,  H05K7/20

    CPC分类号： H01L23/367 ,  H01L2924/0002

    摘要： A semiconductor device comprising at least one heat sink joined to a plurality of IC packages mounted on a mother board. Plural individual heat sinks are joined to respectively corresponding IC packages each comprising a central shaft joined to and extending in substantially perpendicular relationship from a respective said package and plural, parallel spaced fins extending outwardly from and in perpendicular relationship to the shaft. A common heat sink for plural IC packages comprises a base board portion, a heat conducting shaft portion arranged perpendicular to the base board portion and a plurality of heat dissipating fins arranged perpendicular to said heat conducting shaft portion and in parallel, spaced relationship to each other, the common heat sink having one or more slits which are formed parallel to and extending through the heat conducting shaft from the base board portion to midway of the height of the heat conducting shaft and defining a plurality of sections of the base board portion, respectively, joined to the plurality of IC packages.

    摘要翻译： 一种半导体器件，包括连接到安装在母板上的多个IC封装的至少一个散热器。 多个独立的散热器连接到分别对应的IC封装，每个封装包括一个中心轴，该中心轴与相应的所述封装相接合并基本垂直地延伸，并且与从轴垂直的方向向外延伸多个平行隔开的翅片。 用于多个IC封装的公共散热器包括基板部分，垂直于基板部分布置的导热轴部分和垂直于所述导热轴部分布置并且彼此间隔开的多个散热片 所述共用散热器具有一个或多个狭缝，所述狭缝与所述导热轴平行并且从所述基板部分延伸到所述导热轴的高度的中间并且分别限定所述基板部分的多个部分， 连接到多个IC封装。

    Integrated circuit carrier having lead-socket array with various inner dimensions
    9.
    发明授权
    Integrated circuit carrier having lead-socket array with various inner dimensions 失效
    集成电路载体，具有各种内部尺寸的导线插座阵列

    公开(公告)号：US5763297A

    公开(公告)日：1998-06-09

    申请号：US597113

    申请日：1996-02-06

    申请人： Kazuhiro Tashiro ,  Tetsushi Wakabayashi

    发明人： Kazuhiro Tashiro ,  Tetsushi Wakabayashi

    IPC分类号： H01L23/00 ,  G01R1/04 ,  H05K3/30 ,  H05K7/10 ,  H01L21/60

    CPC分类号： G01R1/0433 ,  H05K7/1084 ,  H05K3/306

    摘要： An IC carrier on which an integrated circuit (IC) package is loaded when electric testing of the IC package is carried out is described. The present invention enables an IC package to be loaded on or unloaded from the IC carrier smoothly without bending any of closely arranged fine leads, and prevents the lead from being deformed by falling impact when it is dropped. According to the present invention, an IC carrier for an IC package having an array of leads comprises an array of socket means for mating with the array of leads, wherein selected one of said socket means differs in an inner dimension from the other ones in the same array. The technique is applicable to both a flat IC package (QFP or SOP) and a pin grid array IC package (PGA).

    摘要翻译： 描述了在IC封装的电测试执行时装载集成电路（IC）封装的IC载体。 本发明使得IC封装能够平稳地装载或卸载IC载体，而不会弯曲任何紧密排列的细导线，并且防止引线在跌落时由于冲击而变形。 根据本发明，用于具有引线阵列的IC封装的集成电路载体包括用于与导线阵列配合的插座装置阵列，其中所述插座装置中选定的一个在内部尺寸上与 相同的数组。 该技术适用于扁平IC封装（QFP或SOP）和引脚格栅阵列IC封装（PGA）。