公开(公告)号：US07323731B2

公开(公告)日：2008-01-29

申请号：US11003444

申请日：2004-12-06

申请人： Hiroshi Yuzurihara ,  Ryuichi Mishima ,  Takanori Watanabe ,  Takeshi Ichikawa ,  Seiichi Tamura

发明人： Hiroshi Yuzurihara ,  Ryuichi Mishima ,  Takanori Watanabe ,  Takeshi Ichikawa ,  Seiichi Tamura

IPC分类号： H01L31/113

CPC分类号： H01L27/14687 ,  H01L27/14603 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14643

摘要： A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2

摘要翻译： 一种光电转换装置，包括第一导电类型的半导体衬底和具有第一导电类型的杂质区和与第一导电类型相反的第二导电类型的多个杂质区的光电转换元件。 多个第二导电型杂质区域至少包括第一杂质区域，设置在第一杂质区域和衬底表面之间的第二杂质区域和设置在第二杂质区域和第二杂质区域的表面之间的第三杂质区域 底物。 对应于第一杂质区域中的杂质浓度的峰值的浓度C 1，与第二杂质区域中的杂质浓度的峰值对应的浓度C 2和与第二杂质区域中的杂质浓度的峰值相对应的浓度C 3 第三杂质区满足以下关系：<？in-line-formula description =“In-line formula”end =“lead”？> C2

公开(公告)号：US07247899B2

公开(公告)日：2007-07-24

申请号：US10937382

申请日：2004-09-10

申请人： Hideshi Kuwabara ,  Hiroshi Yuzurihara ,  Takayuki Kimura ,  Mahito Shinohara

发明人： Hideshi Kuwabara ,  Hiroshi Yuzurihara ,  Takayuki Kimura ,  Mahito Shinohara

IPC分类号： H01L31/062 ,  H01L31/113

CPC分类号： H01L27/14687 ,  H01L27/1463 ,  H01L27/14632

摘要： In a photoelectric conversion device having a buried layer in a part of an anode and a cathode of a photodiode, such as a CCD having a sensor structure and a CMOS sensor, well of the same conduction type as the conduction type of the buried layer can be disposed in a peripheral circuit and the potential of each well is independently controlled.In a photoelectric conversion device which is constructed in such a manner that on the whole area of a substrate of a specific conduction type there are disposed a buried layer of a conduction type opposite to the conduction type of the substrate and an epitaxial layer of the same conduction type as the conduction type of the substrate and that well of a conduction type opposite to the conduction type of the substrate are present in a part of the epitaxial layer, buried layer for well isolation of the same conduction type as the conduction type of the substrate which have a higher concentration than the epitaxial layer is disposed between the lower part of the well and the buried layer.

摘要翻译： 在具有在阳极的一部分中的掩埋层和具有传感器结构的CCD的诸如CCD的CMOS光电二极管的光电转换装置中，与掩埋层的导电类型相同的导电类型 设置在外围电路中，并且每个阱的电位被独立地控制。 在以这样的方式构成的光电转换装置中，在特定导电类型的基板的整个区域上设置有与基板的导电类型相反的导电类型的掩埋层和与其相同的外延层 导电类型作为衬底的导电类型，并且与衬底的导电类型相反的导电类型的阱存在于外延层的一部分中，用于良好隔离导电类型的导电类型的掩埋层 具有比外延层更高的浓度的衬底设置在阱的下部和掩埋层之间。

公开(公告)号：US20060124929A1

公开(公告)日：2006-06-15

申请号：US11291955

申请日：2005-12-02

申请人： Shigeru Nishimura ,  Seiichi Tamura ,  Hiroshi Yuzurihara

发明人： Shigeru Nishimura ,  Seiichi Tamura ,  Hiroshi Yuzurihara

IPC分类号： H01L31/0376

CPC分类号： H01L27/146 ,  H01L27/14698 ,  H01L31/03682 ,  H01L31/182 ,  Y02P70/521

摘要： A semiconductor substrate for forming a pixel area provided surfacially with a plurality of pixels for photoelectric conversion, the semiconductor substrate, including a polysilicon film of a thickness of 0.5-2.0, on a rear surface of the pixel area-bearing surface, and having an oxygen concentration of 1.3-1.5E+18 atom/cm3 (old ASTM).

摘要翻译： 一种用于形成像素区域的半导体衬底，其具有多个用于光电转换的像素，所述半导体衬底包括厚度为0.5-2.0的多晶硅膜，在像素区域承载表面的后表面上，并且具有 氧浓度为1.3E18-1.5E18原子/ cm 3（旧ASTM）。

公开(公告)号：US20060043442A1

公开(公告)日：2006-03-02

申请号：US11214846

申请日：2005-08-31

申请人： Hiroshi Yuzurihara ,  Seiichi Tamura ,  Ryuichi Mishima

发明人： Hiroshi Yuzurihara ,  Seiichi Tamura ,  Ryuichi Mishima

IPC分类号： H01L31/062

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/14621 ,  H01L27/14636 ,  H01L27/14643 ,  H01L31/035281 ,  H01L31/03529

摘要： An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate,voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).

摘要翻译： 本发明的目的是提供一种光电转换装置，其中，当从电荷存储区域输出电荷时的电荷转移特性的提高和电荷存储期间的暗电流产生的抑制相互兼容。 该目的通过在电源电压（V）的零到一半的范围内形成电荷存储区域的耗尽电压来实现，在电荷转移期间形成转移MOS晶体管的栅极电压，范围为1 电源电压的一半与电源电压（V）成正比，并且在从电源电压的负一半到零（V）的范围内的电荷存储期间形成转移MOS晶体管的栅极电压。

公开(公告)号：US5612230A

公开(公告)日：1997-03-18

申请号：US417901

申请日：1995-04-06

申请人： Hiroshi Yuzurihara ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Tetsunobu Kochi

发明人： Hiroshi Yuzurihara ,  Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Tetsunobu Kochi

IPC分类号： G11C17/16 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/112 ,  H01L27/12 ,  H01L29/06 ,  H01L29/78 ,  H01L29/786 ,  H01L21/265 ,  H01L21/20

CPC分类号： H01L29/7851 ,  G11C17/16 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/8238 ,  H01L21/823821 ,  H01L29/0653 ,  H01L29/66651 ,  H01L29/66795 ,  H01L29/7834 ,  H01L29/78612 ,  H01L29/78639 ,  H01L27/112 ,  H01L27/1211 ,  Y10S257/901

摘要： An insulated gate type transistor includes a plurality of major electrode regions, a channel region provided between the plurality of major electrode regions, a gate electrode provided on the channel region with a gate insulating film therebetween, and a semiconductor region provided in contact with the channel region, the semiconductor region having the same conductivity type as that of the channel region and a higher impurity concentration than the channel region. The gate electrode has at least two opposing portions. The plurality of major electrode regions are provided on an substrate insulating film. The transistor is activated in a state where the semiconductor region is maintained at a predetermined voltage. A semiconductor device includes a plurality of memory cells, each of which includes the aforementioned insulated gate type transistor and an electrically breakable memory element provided on one of the major electrode regions.

摘要翻译： 绝缘栅型晶体管包括多个主电极区域，设置在多个主电极区域之间的沟道区域，设置在沟道区域上的栅极电极之间的栅极绝缘膜，以及设置成与沟道接触的半导体区域 区域，具有与沟道区相同的导电类型和比沟道区更高的杂质浓度的半导体区。 栅电极具有至少两个相对的部分。 多个主电极区域设置在基板绝缘膜上。 晶体管在半导体区域保持在预定电压的状态下被激活。 半导体器件包括多个存储单元，每个存储单元包括上述绝缘栅型晶体管和设置在其中一个主电极区上的电可破坏存储元件。

公开(公告)号：US5527730A

公开(公告)日：1996-06-18

申请号：US425081

申请日：1995-04-19

申请人： Yuzo Kayaoka ,  Tetsuo Asaba ,  Kenji Makino ,  Hiroshi Yuzurihara ,  Kei Fujita ,  Seiji Kamei ,  Yutaka Akino ,  Yutaka Yuge ,  Mineo Shimotsusa ,  Hideshi Kuwabara

发明人： Yuzo Kayaoka ,  Tetsuo Asaba ,  Kenji Makino ,  Hiroshi Yuzurihara ,  Kei Fujita ,  Seiji Kamei ,  Yutaka Akino ,  Yutaka Yuge ,  Mineo Shimotsusa ,  Hideshi Kuwabara

IPC分类号： H01L21/02 ,  H01L21/285 ,  H01L21/8246 ,  H01L27/112 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L28/40 ,  H01L21/28537 ,  H01L27/112 ,  H01L27/11226 ,  Y10S148/14 ,  Y10S438/974

摘要： An insulating film is formed on the surface of the base of a semiconductor, and a portion of the insulating film is removed to cause the surface to appear outside. The exposed surface is terminated with hydrogen, and then energy beams are applied to selectively remove the terminating hydrogen. Metal is selectively deposited on the portion terminated with left hydrogen atoms.

摘要翻译： 在半导体基体的表面上形成绝缘膜，除去绝缘膜的一部分，使表面出现在外部。 暴露的表面用氢终止，然后施加能量束以选择性地除去终止的氢。 金属被选择性地沉积在以左氢原子终止的部分上。

公开(公告)号：US08304278B2

公开(公告)日：2012-11-06

申请号：US12904269

申请日：2010-10-14

申请人： Hiroaki Naruse ,  Takashi Okagawa ,  Ryuichi Mishima ,  Nobuhiko Sato ,  Hiroshi Yuzurihara

发明人： Hiroaki Naruse ,  Takashi Okagawa ,  Ryuichi Mishima ,  Nobuhiko Sato ,  Hiroshi Yuzurihara

IPC分类号： H01L31/18

CPC分类号： H01L27/14636 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76829 ,  H01L21/76834 ,  H01L23/53238 ,  H01L27/14621 ,  H01L27/14632 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/14689 ,  H01L2924/0002 ,  H01L2924/00

摘要： A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.

摘要翻译： 光电转换装置包括：设置在半导体衬底上的第一层间绝缘膜; 第一插头，其设置在第一层间绝缘膜中的第一孔中，并且用于电连接多个MOS晶体管的栅电极之间或者在有源区和栅极之间设置在半导体衬底中的多个有源区之间 MOS晶体管的电极，不通过布线层的布线; 以及设置在所述第一层间绝缘膜中的第二孔中的第二插头，所述第二插头电连接到所述有源区域，其中布置在所述第二插头上并且最靠近所述第二插头的布线电连接到所述第二插头，以及 电连接到第二插头的布线形成双镶嵌结构的一部分。 通过这样的结构，可以提高光到光电转换元件的入射效率。

公开(公告)号：US07977760B2

公开(公告)日：2011-07-12

申请号：US12435756

申请日：2009-05-05

申请人： Seiichi Tamura ,  Hiroshi Yuzurihara ,  Shigeru Nishimura ,  Ryuichi Mishima ,  Yasushi Nakata

发明人： Seiichi Tamura ,  Hiroshi Yuzurihara ,  Shigeru Nishimura ,  Ryuichi Mishima ,  Yasushi Nakata

IPC分类号： H01L31/101

CPC分类号： H01L27/14689 ,  H01L27/14603

摘要： A manufacturing method is provided for a photoelectric conversion device in which no plane channeling is produced. The photoelectric conversion device includes a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate that forms an off-angle θ with at least two planes perpendicular to a reference (1 0 0) plane within a range of 3.5°≦θ≦4.5°, and an ion injecting direction for forming a semiconductor region constituting the photoelectric conversion element forms an angle θ to a direction perpendicular to the principal plane within a range of 0°

摘要翻译： 提供了一种其中不产生平面沟道的光电转换装置的制造方法。 光电转换装置在硅基板的一个主平面上形成硅基板和光电转换元件，其形成偏角度; 其中至少两个平面垂直于参考（10）平面的平面在3.5°和11“之间;而且用于形成构成光电转换元件的半导体区域的离子注入方向形成角度; 在0°<＆phgr;＆lt; nlE; 45°的范围内垂直于主平面的方向，并且离子注入方向相对于主平面的突出方向进一步与两个平面方向成一角度α 0°<α<90°。

公开(公告)号：US20100230728A1

公开(公告)日：2010-09-16

申请号：US12784567

申请日：2010-05-21

申请人： Takashi Okagawa ,  Hiroaki Naruse ,  Hiroshi Yuzurihara ,  Shigeru Nishimura ,  Takeshi Aoki ,  Yuya Fujino

发明人： Takashi Okagawa ,  Hiroaki Naruse ,  Hiroshi Yuzurihara ,  Shigeru Nishimura ,  Takeshi Aoki ,  Yuya Fujino

IPC分类号： H01L27/148

CPC分类号： H01L27/14689 ,  H01L21/76877 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14612 ,  H01L27/14636 ,  H01L27/14643

摘要： A noise generated by a constitution of widening an incident aperture of light of a photoelectric conversion element is reduced. In a manufacturing method of a photoelectric conversion device, first electroconductor arranged in a first hole arranged in the first interlayer insulation layer electrically connects a first semiconductor region to a gate electrode of an amplifying MOS transistor not through wirings included in a wiring layer. Moreover, a second electroconductor electrically connects a second semiconductor region different from the first semiconductor region to a wiring. In a constitution of that second electroconductor, a third electroconductor arranged in a second hole arranged in the first interlayer insulation layer and a fourth electroconductor arranged in a third hole arranged in the second interlayer insulation layer are stacked and electrically connected to each other. And the step of forming the first electroconductor, and the step of forming the third electroconductor are performed simultaneously.

摘要翻译： 由光电转换元件的光的入射孔径变宽的结构产生的噪声降低。 在光电转换装置的制造方法中，布置在布置在第一层间绝缘层中的第一孔中的第一导电体不是通过布线层中包含的布线将第一半导体区域电连接到放大MOS晶体管的栅电极。 此外，第二电导体将不同于第一半导体区域的第二半导体区域电连接到布线。 在该第二电导体的结构中，布置在布置在第一层间绝缘层中的第二孔中的第三导电体和布置在布置在第二层间绝缘层中的第三孔中的第四导电体彼此堆叠并电连接。 并且同时进行形成第一导电体的步骤和形成第三导电体的步骤。

公开(公告)号：US07393715B2

公开(公告)日：2008-07-01

申请号：US11275672

申请日：2006-01-24

申请人： Koichi Tazoe ,  Sakae Hashimoto ,  Akira Ohtani ,  Hiroshi Yuzurihara

发明人： Koichi Tazoe ,  Sakae Hashimoto ,  Akira Ohtani ,  Hiroshi Yuzurihara

IPC分类号： H01L21/00

CPC分类号： H01L27/14643 ,  H01L27/1462 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14685 ,  H01L27/14689

摘要： In an image pickup device, a step of forming an embedded plug includes a step of forming a connecting hole in the insulation film in which the embedded plug is to be formed, a metal layer deposition step of depositing a metal layer on the insulation film in which the connecting hole is formed, thereby covering an interior of the connecting hole and at least a part of an upper surface of the insulation film in a laminating direction thereof, and a metal layer removing step of polishing the upper surface of the insulation film on which the metal layer is deposited thereby removing the metal layer except for the interior of the connecting hole, an etch-back method performed on the embedded plug in at least an insulation film, and a chemical mechanical polishing method performed on the embedded plug in another insulation film.

摘要翻译： 在图像拾取装置中，形成嵌入式插头的步骤包括在要形成嵌入式插头的绝缘膜中形成连接孔的步骤，在绝缘膜上沉积金属层的金属层沉积步骤 所述连接孔形成，从而覆盖所述连接孔的内部和所述绝缘膜的层叠方向的上表面的至少一部分，以及金属层除去工序，对所述绝缘膜的上表面进行研磨 其中沉积金属层，从而除去连接孔内部的金属层，在至少绝缘膜上对嵌入式插塞执行的回蚀方法以及在嵌入式插头上执行的化学机械抛光方法 绝缘膜。