公开(公告)号：US20240222303A1

公开(公告)日：2024-07-04

申请号：US18226589

申请日：2023-07-26

申请人： Samsung Electronics Co., Ltd.

发明人： Daehyun KIM ,  KUNSIL LEE

IPC分类号： H01L23/00 ,  H01L23/498

CPC分类号： H01L24/14 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/11 ,  H01L24/17 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L25/18 ,  H01L2224/05073 ,  H01L2224/05144 ,  H01L2224/05555 ,  H01L2224/0557 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/0613 ,  H01L2224/06181 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/1413 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81815

摘要： Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a first substrate having first pads on a first surface of the first substrate, a second substrate on the first substrate and having a plurality of second pads on a second surface of the second substrate, and connection terminals between the first substrate and the second substrate and correspondingly coupling the first pad to the second pads. Each of the connection terminals has a first major axis and a first minor axis that are parallel to the first surface of the first substrate and are orthogonal to each other. When viewed in a plan view, the first minor axis of each of the connection terminals is directed toward a center of the first substrate.

公开(公告)号：US20240203919A1

公开(公告)日：2024-06-20

申请号：US18082285

申请日：2022-12-15

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： JOHN CARLO CRUZ MOLINA ,  RAFAEL JOSE LIZARES GUEVARA

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31

CPC分类号： H01L24/13 ,  H01L21/561 ,  H01L21/78 ,  H01L23/31 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02175 ,  H01L2224/02185 ,  H01L2224/0219 ,  H01L2224/03013 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05647 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13147 ,  H01L2224/13551 ,  H01L2224/136

摘要： An electronic device that includes a semiconductor substrate and a conductive structure disposed over the semiconductor substrate. An insulator layer overlies the semiconductor substrate and includes a tapered opening that overlies a portion of the conductive structure. A flanged conductive column that includes a base portion is disposed in the tapered opening and is coupled to the portion of the conductive structure. The flanged conductive column further includes a flanged portion that is configured to be exposed to provide a conductive contact to the electronic device.

公开(公告)号：US20240203913A1

公开(公告)日：2024-06-20

申请号：US18532793

申请日：2023-12-07

申请人： PAC TECH - PACKAGING TECHNOLOGIES GMBH

发明人： Matthias Fettke

IPC分类号： H01L23/00

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03312 ,  H01L2224/03318 ,  H01L2224/03505 ,  H01L2224/05124 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647

摘要： A chip comprising a non-conductive substrate layer and at least one conductor path disposed on the substrate layer, the solder contact surface being at least partially formed on the conductor path, and a method for producing the solder contact surface on the chip including the steps of: applying a sinter paste to a contact location at least partially located on the conductor path, the sinter paste comprising particles of at least one soft-solderable and conductive material and at least one solvent; and evaporating the solvent.

公开(公告)号：US20240194261A1

公开(公告)日：2024-06-13

申请号：US18331821

申请日：2023-06-08

申请人： SK hynix Inc.

发明人： Eun Seok CHOI

IPC分类号： G11C16/04 ,  H01L23/00 ,  H01L23/522 ,  H01L23/528 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

CPC分类号： G11C16/0483 ,  H01L23/5226 ,  H01L23/5283 ,  H01L24/05 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40 ,  H01L2224/0557 ,  H01L2224/05647

摘要： A semiconductor memory device includes a source bonding structure including a first source layer and a second source layer bonded to each other, a first memory cell array structure connected to the first source layer of the source bonding structure, and a second memory cell array structure connected to the second source layer of the source bonding structure. The source bonding structure includes at least one of a semiconductor bonding area and a metal bonding area.

公开(公告)号：US20240178265A1

公开(公告)日：2024-05-30

申请号：US18522042

申请日：2023-11-28

申请人： CANON KABUSHIKI KAISHA

发明人： HIROSHI SEKINE ,  KAZUHIRO MORIMOTO ,  KOSEI UEHIRA

IPC分类号： H01L27/146 ,  H01L23/00

CPC分类号： H01L27/1469 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L27/14634 ,  H01L27/14636 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/80357 ,  H01L2224/80896

摘要： A semiconductor device manufacturing method including: preparing a first substrate having a first plane and a second plane facing the first plane; preparing a second substrate having a third plane and a fourth plane facing the third plane; forming a first semiconductor device and a first wiring layer near the first plane in the first substrate; forming an insulating region near the third plane in the second substrate; after the forming the insulating region, forming a second semiconductor device and a second wiring layer near the third plane; after the forming the second semiconductor device and the second wiring layer, thinning the second substrate from the fourth plane to expose the insulating region; after exposing, forming a through-electrode configured to penetrate through the insulating region and be connected to the second wiring layer; and joining the first and second substrates so as to be electrically connected to each other.

公开(公告)号：US20240170428A1

公开(公告)日：2024-05-23

申请号：US18549211

申请日：2022-03-04

申请人： Atotech Deutschland GmbH & Co. KG

发明人： Ralf SCHMIDT

IPC分类号： H01L23/00

CPC分类号： H01L24/08 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L2224/03462 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896

摘要： The invention relates to method for copper-to-copper direct bonding comprising the steps:



a) providing a first substrate comprising a first pure copper deposit having a bonding surface;
b) providing a second substrate comprising a second pure copper deposit having a bonding surface;
c) connecting the bonding surface of the first deposit with the bonding surface of the second deposit and obtaining a connected deposit; and
d) converting the first deposit and the second deposit of the connected deposit into a connected and converted deposit,
wherein the first deposit and the second deposit are formed by an electrochemical copper deposition step and having copper grains with a grain size which is smaller than a grain size after the converting in step d),
wherein the connected and converted deposit is having grains with a grain size which is larger than the grain size of the first deposit and the second deposit before the converting in step d); and to an assembly and a device produced by the method. (FIG. 1)

公开(公告)号：US20240162402A1

公开(公告)日：2024-05-16

申请号：US18089563

申请日：2022-12-28

申请人： AUO Corporation

发明人： Chia-Hui Pai ,  Wen-Hsien Tseng ,  Chien-Hung Kuo

IPC分类号： H01L33/62 ,  H01L23/00 ,  H01L25/16

CPC分类号： H01L33/62 ,  H01L24/05 ,  H01L24/13 ,  H01L24/29 ,  H01L25/167 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/05686 ,  H01L2224/13021 ,  H01L2224/16057 ,  H01L2224/16145 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29139 ,  H01L2224/32057 ,  H01L2224/32145 ,  H01L2224/73153 ,  H01L2224/81224 ,  H01L2224/83224 ,  H01L2224/9221 ,  H01L2924/0132 ,  H01L2924/0549

摘要： A display device includes a circuit substrate, a plurality of pad sets and a plurality of light-emitting elements. The plurality of pad sets is disposed on the circuit substrate, and each pad set includes a first pad and a second pad surrounding the first pad. The plurality of light-emitting elements is disposed above the circuit substrate, and each light-emitting element includes a first electrode, a second electrode and a light-emitting stack between the first electrode and the second electrode, wherein the first electrode is electrically connected to the first pad, the second electrode is electrically connected to the second pad, and an orthographic projection of the second electrode on the circuit substrate is overlapped with an orthographic projection of the first pad on the circuit substrate.

公开(公告)号：US20240153902A1

公开(公告)日：2024-05-09

申请号：US18367609

申请日：2023-09-13

申请人： NANYA TECHNOLOGY CORPORATION

发明人： SHENG-FU HUANG ,  SHING-YIH SHIH

IPC分类号： H01L23/00

CPC分类号： H01L24/08 ,  H01L24/05 ,  H01L24/80 ,  H01L2224/0215 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05663 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/0568 ,  H01L2224/05684 ,  H01L2224/08145 ,  H01L2224/80379 ,  H01L2224/80895 ,  H01L2224/80896

摘要： A semiconductor device structure and method for manufacturing the same are provided. The semiconductor device structure includes a substrate, a dielectric structure, a pad, a conductive structure, and a buffer structure. The dielectric structure is disposed on the substrate. The pad is embedded in the dielectric structure. The conductive structure is disposed on the pad. The buffer structure is disposed on the pad and separates the conductive structure from the dielectric structure. A coefficient of thermal expansion (CTE) of the buffer structure ranges between a CTE of the dielectric structure and a CTE of the conductive structure.

公开(公告)号：US20240136347A1

公开(公告)日：2024-04-25

申请号：US18404516

申请日：2024-01-04

申请人： ROHM CO., LTD.

发明人： Isamu NISHIMURA

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L23/538

CPC分类号： H01L25/18 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/08235 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/49175

摘要： A semiconductor device includes: a first semiconductor element; a second semiconductor element; an insulating element including a first coil; a second coil magnetically coupled to the first coil; and a support substrate on which the first semiconductor element and the second semiconductor element are mounted. The support substrate includes an insulating base member, and a substrate wiring formed on the base member. The substrate wiring includes a first wiring member electrically interposed between the first semiconductor element and the first coil, and a second wiring member electrically interposed between the second semiconductor element and the second coil. The second coil is arranged between the first coil and the base member. The insulating element is supported by the support substrate.

公开(公告)号：US20240136313A1

公开(公告)日：2024-04-25

申请号：US18348365

申请日：2023-07-06

申请人： National Yang Ming Chiao Tung University

发明人： Chih CHEN ,  Shih-Chi YANG

IPC分类号： H01L23/00 ,  H01L25/065

CPC分类号： H01L24/08 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L25/0657 ,  H01L2224/02165 ,  H01L2224/03462 ,  H01L2224/05647 ,  H01L2224/0801 ,  H01L2224/08121 ,  H01L2224/08148 ,  H01L2224/80895 ,  H01L2225/06524 ,  H01L2924/2064

摘要： An electrical connection includes a first driving substrate, a first adhesive layer, a first bonding pad a first bonding pad and a second bonding pad. The first driving substrate includes a first substrate and a first dielectric layer on the first substrate. The first adhesive layer is at a sidewall of the first dielectric layer of the first driving substrate. The first bonding pad is on the first substrate of the first driving substrate and in contact with the first adhesive layer, and the first bonding pad includes a plurality of grains, the grains are connected with each other, the grains include [111]-oriented copper grains, and a maximum width of the first bonding pad is equal to or less than 8 microns. The second bonding pad is on the first bonding pad.