公开(公告)号：US20240290826A1

公开(公告)日：2024-08-29

申请号：US18362976

申请日：2023-08-01

申请人： SK hynix Inc.

发明人： Il Do KIM ,  Ji Hee YU ,  Seung Bum KIM

IPC分类号： H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H10B12/00

CPC分类号： H01L29/0607 ,  H01L29/42356 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/495 ,  H01L29/4966 ,  H10B12/312 ,  H10B12/482 ,  H10B12/485 ,  H10B12/488

摘要： A semiconductor device may include: a lower structure; a horizontal layer spaced apart from the lower structure and extending along a direction parallel to the lower structure; a vertical conductive line extending along a direction perpendicular to the lower structure and coupled to a first side end of the horizontal layer; a data storage element coupled to a second side end of the horizontal layer; and a horizontal conductive line extending along a direction crossing the horizontal layer and including a sloped side facing the vertical conductive line.

公开(公告)号：US20240287385A1

公开(公告)日：2024-08-29

申请号：US18573719

申请日：2022-06-29

申请人： MITSUBISHI GAS CHEMICAL COMPANY, INC.

发明人： Toshiyuki OIE ,  Tomoyuki ADANIYA ,  Chih-Liang YANG ,  Po-Hung WANG

IPC分类号： C09K13/08 ,  H01L29/49 ,  H10B12/00

CPC分类号： C09K13/08 ,  H01L29/495 ,  H10B12/02 ,  H10B12/488

摘要： Provided is an etching composition for a semiconductor substrate for a memory element capable of providing a semiconductor substrate for a memory element having improved performance. The etching composition for a semiconductor substrate for a memory element comprises: (A) an oxidizing agent; (B) a fluorine compound; and (C) a metal tungsten corrosion inhibitor, wherein (C) the metal tungsten corrosion inhibitor contains at least one selected from the group consisting of an ammonium salt represented by formula (1) and a heteroaryl salt having a C14-C30 alkyl group.

公开(公告)号：US12074071B2

公开(公告)日：2024-08-27

申请号：US18178640

申请日：2023-03-06

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Min Liu ,  Hsueh-Chang Sung ,  Li-Li Su ,  Yee-Chia Yeo

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L29/08 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823864 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/4983 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor device includes a first device region and a second device region. The first device region includes a first source/drain region extending from a substrate and a first and a second pair of spacers. The first source/drain region extends between the first pair of spacers and the second pair of spacers. The first pair of spacers and the second pair of spacers have a first height. The second device region includes a second and a third source/drain region extending from the substrate and a third and a fourth pair of spacers. The third source/drain region is separate from the second source/drain region. The second source/drain region extends between the third pair of spacers. The third source/drain region extends between the fourth pair of spacers. The third pair of spacers and the fourth pair of spacers have a second height greater than the first height.

公开(公告)号：US12068388B2

公开(公告)日：2024-08-20

申请号：US17676380

申请日：2022-02-21

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsin-Yi Lee ,  Hsuan-Yu Tung ,  Chin-You Hsu ,  Cheng-Lung Hung

IPC分类号： H01L29/49 ,  H01L21/28 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L21/28247 ,  H01L21/823431 ,  H01L21/82345 ,  H01L21/823468 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

摘要： Semiconductor devices and methods of manufacturing semiconductor devices are provided. In embodiments a passivation process is utilized in order to reduce dangling bonds and defects within work function layers within a gate stack. The passivation process introduces a passivating element which will react with the dangling bonds to passivate the dangling bonds. Additionally, in some embodiments the passivating elements will trap other elements and reduce or prevent them from diffusing into other portions of the structure.

公开(公告)号：US12068387B2

公开(公告)日：2024-08-20

申请号：US17505583

申请日：2021-10-19

申请人： International Business Machines Corporation

发明人： Ruqiang Bao

IPC分类号： H01L21/027 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L29/4966 ,  H01L21/0274 ,  H01L29/4908 ,  H01L29/785

摘要： A semiconductor structure includes a common semiconductor substrate; a first field effect transistor (FET) gate formed on the substrate, which has a first threshold voltage and comprises a first work function metal and a first barrier layer, and a second FET gate formed on the substrate, which has a second threshold voltage and comprises the first work function metal, the first barrier layer, and a second work function metal.

公开(公告)号：US20240274476A1

公开(公告)日：2024-08-15

申请号：US18644657

申请日：2024-04-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Sung-En Lin ,  Chi On Chui ,  Fang-Yi Liao ,  Chunyao Wang ,  Yung-Cheng Lu

IPC分类号： H01L21/8238 ,  H01L21/28 ,  H01L21/762 ,  H01L21/764 ,  H01L27/092 ,  H01L29/06 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823878 ,  H01L21/28088 ,  H01L21/76224 ,  H01L21/764 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/823871 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

摘要： A method includes patterning a trench and depositing a first insulating material along sidewalls and a bottom surface of the trench using a conformal deposition process. Depositing the first insulating material includes forming a first seam between a first portion of the first insulating material on a first sidewall of the trench and a second portion of the first insulating material on a second sidewall of the trench. The method further includes etching the first insulating material below a top of the trench and depositing a second insulating material over the first insulating material and in the trench using a conformal deposition process. Depositing the second insulating material comprises forming a second seam between a first portion of the second insulating material on the first sidewall of the trench and a second portion of the second insulating material on a second sidewall of the trench.

公开(公告)号：US12062707B2

公开(公告)日：2024-08-13

申请号：US17739177

申请日：2022-05-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Lun Min ,  Chang-Miao Liu ,  Xu-Sheng Wu

IPC分类号： H01L21/3115 ,  H01L21/265 ,  H01L21/285 ,  H01L21/762 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/417 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/4983 ,  H01L21/26586 ,  H01L21/28512 ,  H01L21/31155 ,  H01L21/76224 ,  H01L21/76834 ,  H01L21/823468 ,  H01L29/0653 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

摘要： Field effect transistor and manufacturing method thereof are disclosed. The field effect transistor includes a substrate, fins, a gate structure, a first spacer and a second spacer. The fins protrude from the substrate and extend in a first direction. The gate structure is disposed across and over the fins and extends in a second direction perpendicular to the first direction. The first spacer is disposed on sidewalls of the gate structure. The second spacer is disposed on the first spacer and surrounds the gate structure. The first spacer is fluorine-doped and includes fluorine dopants.

公开(公告)号：US12062663B2

公开(公告)日：2024-08-13

申请号：US18232409

申请日：2023-08-10

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Hidekazu Miyairi ,  Takeshi Osada ,  Shunpei Yamazaki

IPC分类号： H01L27/14 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  G02F1/1362 ,  H10K59/121

CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1255 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/7869 ,  G02F1/1362 ,  H10K59/1213

摘要： As a display device has higher definition, the number of pixels is increased and thus, the number of gate lines and signal lines is increased. When the number of gate lines and signal lines is increased, it is difficult to mount IC chips including driver circuits for driving the gate lines and the signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided on the same substrate, and at least part of the driver circuit comprises a thin film transistor including an oxide semiconductor sandwiched between gate electrodes. A channel protective layer is provided between the oxide semiconductor and a gate electrode provided over the oxide semiconductor. The pixel portion and the driver circuit are provided on the same substrate, which leads to reduction of manufacturing cost.

公开(公告)号：US20240258373A1

公开(公告)日：2024-08-01

申请号：US18162854

申请日：2023-02-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ta-Yuan Kung ,  Chen-Liang Chu ,  Chih-Wen Albert Yao ,  Fei-Yun Chen ,  Ming-Ta Lei ,  Ruey-Hsin Liu ,  Yu-Chang Jong

IPC分类号： H01L29/08 ,  H01L21/302 ,  H01L29/06 ,  H01L29/40 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/0847 ,  H01L21/302 ,  H01L29/0692 ,  H01L29/402 ,  H01L29/4983 ,  H01L29/66689 ,  H01L29/7833

摘要： An integrated chip including a first source/drain region and a second source/drain region in a semiconductor substrate and laterally spaced apart along a top surface of the substrate. A gate dielectric layer is over the substrate and extends laterally between the first source/drain region and the second source/drain region. A thickness of the gate dielectric layer along a first sidewall of the gate dielectric layer is less than an average thickness of the gate dielectric layer. A trench isolation layer extends along gate dielectric layer. A first sidewall of the trench isolation layer extends along the first sidewall of the gate dielectric layer. A gate layer is directly over the gate dielectric layer and between the first source/drain region and the second source/drain region. A first sidewall of the gate layer is directly over the gate dielectric layer and laterally setback from the first sidewall of the gate dielectric layer.

公开(公告)号：US20240258324A1

公开(公告)日：2024-08-01

申请号：US18632631

申请日：2024-04-11

申请人： INNOLUX CORPORATION

发明人： Kuan-feng LEE ,  Chandra LIUS ,  Nai-Fang HSU

IPC分类号： H01L27/12 ,  H01L21/02 ,  H01L29/24 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L21/02164 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/02595 ,  H01L27/1222 ,  H01L27/1237 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/51 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/78675 ,  H01L29/7869 ,  H01L29/518

摘要： An electronic device is provided. The electronic device includes a substrate, a first active layer, a second active layer, a first gate electrode, a first insulator, a second gate electrode, a second insulator, a first electrode electrically connected to the second active layer, and a second electrode. The first active layer is different from the second active layer in material. The first insulator is disposed between the first active layer and the first gate electrode. The second insulator is disposed between the second active layer and the second gate electrode. The second gate electrode is disposed between the first electrode and the second active layer. The second electrode is overlapped with at least part of the second active layer. The second electrode and the first gate electrode are the same in material.