公开(公告)号：US20240079231A1

公开(公告)日：2024-03-07

申请号：US18388578

申请日：2023-11-10

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Robert Vyne

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/24 ,  C23C16/455 ,  H01J37/32

CPC classification number: H01L21/02532 ,  C23C16/0245 ,  C23C16/24 ,  C23C16/455 ,  H01J37/32449 ,  H01J37/32899 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01J37/32357 ,  H01J2237/332 ,  H01J2237/334

Abstract: A method for forming a layer on a substrate includes providing a substrate in a reactor of a semiconductor processing system, the reactor having a divider separating an upper chamber from a lower chamber and a substrate holder therein, the substrate having upper and lower surfaces. The wafer is positioned within the reactor using the substrate holder such that the upper surface bounds the upper chamber, a silicon-containing gas is flowed through the upper chamber to deposit a layer of the upper surface, and a halogen-containing gas is flowed through the lower chamber to etch a deposited film on at least one wall bounding the lower chamber while flowing the silicon-containing gas through the upper chamber. Semiconductor processing systems are also described.

公开(公告)号：US20230145240A1

公开(公告)日：2023-05-11

申请号：US18147916

申请日：2022-12-29

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis ,  David Kohen

IPC: H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  C23C16/458 ,  C23C16/02 ,  C23C16/30 ,  C23C16/52 ,  C23C16/22 ,  C23C16/44 ,  C23C16/46 ,  C23C16/455

CPC classification number: H01L21/02576 ,  H01L21/02661 ,  H01L29/0847 ,  H01L29/66795 ,  H01L21/02532 ,  C23C16/4583 ,  C23C16/0227 ,  C23C16/30 ,  H01L21/02639 ,  C23C16/52 ,  C23C16/22 ,  C23C16/44 ,  C23C16/46 ,  C23C16/0209 ,  C23C16/455 ,  H01L21/0262 ,  H01L21/02609

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

公开(公告)号：US20220367175A1

公开(公告)日：2022-11-17

申请号：US17875907

申请日：2022-07-28

Applicant: ASM IP Holding B.V.

Inventor： Xing Lin ,  Peipei Gao ,  Fei Wang ,  John Tolle ,  Bubesh Babu Jotheeswaran ,  Vish Ramanathan ,  Eric Hill

IPC: H01L21/02 ,  B08B7/00 ,  B08B5/00 ,  H01L21/67 ,  H01J37/32 ,  H01L21/311

Abstract: A system and method for removing both carbon-based contaminants and oxygen-based contaminants from a semiconductor substrate within a single process chamber is disclosed. The invention may comprise utilization of remote plasma units and multiple gas sources to perform the process within the single process chamber.

公开(公告)号：US11004977B2

公开(公告)日：2021-05-11

申请号：US16679885

申请日：2019-11-11

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/167 ,  H01L29/36 ,  H01L29/165 ,  H01L29/08 ,  H01L29/45 ,  H01L29/66

Abstract: A method for depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include: providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include: exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA dopant precursor; wherein the at least one Group IIIA dopant precursor comprises a borohydride, an organic borohydride, a halide, or an organohalide. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US20210035802A1

公开(公告)日：2021-02-04

申请号：US16932275

申请日：2020-07-17

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis ,  David Kohen

IPC: H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  C23C16/458 ,  C23C16/02 ,  C23C16/30

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

公开(公告)号：US20200340138A1

公开(公告)日：2020-10-29

申请号：US16849793

申请日：2020-04-15

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joseph P. Margetis

IPC: C30B25/14 ,  C30B25/08 ,  C30B25/18 ,  C30B25/16

Abstract: Gas-phase reactor systems and methods suitable for use with precursors that are solid phase at room temperature and pressure are disclosed. The systems and methods as described herein can be used to, for example, form amorphous, polycrystalline, or epitaxial layers (e.g., one or more doped semiconductor layers) on a surface of a substrate.

公开(公告)号：US10685834B2

公开(公告)日：2020-06-16

申请号：US15985261

申请日：2018-05-21

Applicant: ASM IP Holding B.V.

Inventor： Nupur Bhargava ,  Joe Margetis ,  John Tolle

IPC: H01L21/02 ,  C23C16/40 ,  C23C16/02 ,  C23C16/14 ,  C23C16/28 ,  C23C16/455 ,  C23C16/24

Abstract: A method for forming a forming a silicon germanium tin (SiGeSn) layer is disclosed. The method may include, providing a substrate within a reaction chamber, exposing the substrate to a pre-deposition precursor pulse, which comprises tin tetrachloride (SnCl4), exposing the substrate to a deposition precursor gas mixture comprising a hydrogenated silicon source, germane (GeH4), and tin tetrachloride (SnCl4), and depositing the silicon germanium tin (SiGeSn) layer over a surface of the substrate. Semiconductor device structures including a silicon germanium tin (SiGeSn) layer formed by the methods of the disclosure are also provided.

公开(公告)号：US20200083375A1

公开(公告)日：2020-03-12

申请号：US16679885

申请日：2019-11-11

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis

IPC: H01L29/78 ,  H01L29/36 ,  H01L29/167 ,  H01L21/02 ,  H01L29/08 ,  H01L29/165

Abstract: A method for depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include: providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include: exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA dopant precursor; wherein the at least one Group IIIA dopant precursor comprises a borohydride, an organic borohydride, a halide, or an organohalide. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US10541333B2

公开(公告)日：2020-01-21

申请号：US15985298

申请日：2018-05-21

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/167 ,  H01L29/36 ,  H01L29/45 ,  H01L29/66

Abstract: A method for depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include: providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include: exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA dopant precursor; wherein the at least one Group IIIA dopant precursor comprises a borohydride, an organic borohydride, a halide, or an organohalide. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US20190304780A1

公开(公告)日：2019-10-03

申请号：US15940801

申请日：2018-03-29

Applicant: ASM IP Holding B.V.

Inventor： David Kohen ,  John Tolle

IPC: H01L21/02 ,  H01L23/12

Abstract: Methods for depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber are provided. The method may include: heating the substrate to a deposition temperature of less than 550° C.; simultaneously contacting the substrate with a silicon precursor, a n-type dopant precursor, and a p-type dopant precursor; and depositing the co-doped polysilicon film on the surface of the substrate. Related semiconductor structures are also disclosed.