公开(公告)号：US10249502B2

公开(公告)日：2019-04-02

申请号：US15004751

申请日：2016-01-22

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Oleg Gluschenkov ,  Zuoguang Liu ,  Shogo Mochizuki ,  Hiroaki Niimi ,  Tenko Yamashita ,  Chun-chen Yeh

IPC: H01L21/336 ,  H01L21/285 ,  H01L29/08 ,  H01L29/24 ,  H01L29/267 ,  H01L29/78 ,  H01L29/66 ,  H01L21/768

Abstract: Techniques for forming a metastable phosphorous P-doped silicon Si source drain contacts are provided. In one aspect, a method for forming n-type source and drain contacts includes the steps of: forming a transistor on a substrate; depositing a dielectric over the transistor; forming contact trenches in the dielectric that extend down to source and drain regions of the transistor; forming an epitaxial material in the contact trenches on the source and drain regions; implanting P into the epitaxial material to form an amorphous P-doped layer; and annealing the amorphous P-doped layer under conditions sufficient to form a crystalline P-doped layer having a homogenous phosphorous concentration that is greater than about 1.5×1021 atoms per cubic centimeter (at./cm3). Transistor devices are also provided utilizing the present P-doped Si source and drain contacts.

公开(公告)号：US10153201B2

公开(公告)日：2018-12-11

申请号：US15417848

申请日：2017-01-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GlobalFoundries, Inc. ,  The Research Foundation for The State University of New York

Inventor： Huiming Bu ,  Hui-feng Li ,  Vijay Narayanan ,  Hiroaki Niimi ,  Tenko Yamashita

IPC: H01L21/768 ,  H01L21/8238 ,  H01L23/535 ,  H01L23/528 ,  H01L23/532 ,  H01L29/66 ,  H01L29/78 ,  H01L21/285 ,  H01L23/485 ,  H01L29/08 ,  H01L27/092

Abstract: A transistor device includes a substrate; a source region and a drain region formed over the substrate; and a source/drain contact formed in contact with at least one of the source region and the drain region, the source/drain contact including a conductive metal and a bilayer disposed between the conductive metal and the at least one of the source and drain region, the bilayer including a metal oxide layer in contact with the conductive metal, and a silicon dioxide layer in contact with the at least one of the source and drain region.

公开(公告)号：US20180331040A1

公开(公告)日：2018-11-15

申请号：US16040752

申请日：2018-07-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GlobalFoundries, Inc.

Inventor： Takashi Ando ,  Hiroaki Niimi ,  Tenko Yamashita

IPC: H01L23/535 ,  H01L21/768 ,  H01L21/02 ,  H01L29/51 ,  H01L21/8238 ,  H01L27/092

CPC classification number: H01L23/535 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02192 ,  H01L21/285 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76846 ,  H01L21/76877 ,  H01L21/823871 ,  H01L23/485 ,  H01L27/092 ,  H01L29/517 ,  H01L29/66545

Abstract: A method of making a semiconductor device includes forming a first source/drain trench and a second source/drain trench over a first and second source/drain region, respectively; forming a first silicon dioxide layer in the first source/drain trench and a second silicon dioxide layer in the second source/drain trench; forming a first source/drain contact over the first source/drain region, the first source/drain contact including a first tri-layer contact disposed between the first silicon dioxide layer and a first conductive material; and forming a second source/drain contact over the second source/drain region, the second source/drain contact including a second tri-layer contact disposed between the second silicon dioxide layer and a second conductive material; wherein the first tri-layer contact includes a first metal oxide layer in contact with the first silicon dioxide layer, and the second tri-layer contact includes a second metal oxide layer in contact with the second silicon dioxide layer.

公开(公告)号：US20180006141A1

公开(公告)日：2018-01-04

申请号：US15597650

申请日：2017-05-17

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Jody Fronheiser ,  Shogo Mochizuki ,  Hiroaki Niimi ,  Balasubramanian Pranatharthiharan ,  Mark Raymond ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L21/768 ,  H01L21/285 ,  H01L23/535 ,  H01L21/02

CPC classification number: H01L21/76895 ,  H01L21/02068 ,  H01L21/285 ,  H01L21/28525 ,  H01L21/76814 ,  H01L21/76831 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/0895 ,  H01L29/41791 ,  H01L29/456 ,  H01L29/66795 ,  H01L29/785

Abstract: Forming a contact is disclosed. A trench through an interlayer dielectric layer is opened down to a substrate. The interlayer dielectric layer is formed on the substrate such that the substrate is the bottom surface of the trench. A cleaning process of the trench is performed. The bottom surface of the trench is recessed. A trench contact epitaxial layer is formed in the trench. An oxide layer is formed on top of the trench contact epitaxial layer in the trench. A metal oxide layer is formed on top of the oxide layer in the trench. A metal contact is formed on top of the metal oxide layer, where the oxide layer and the metal oxide layer together form a dipole layer.

公开(公告)号：US20170372949A1

公开(公告)日：2017-12-28

申请号：US15687455

申请日：2017-08-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Min Gyu Sung ,  Kwanyong Lim ,  Hiroaki Niimi

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/485 ,  H01L29/417 ,  H01L23/532

CPC classification number: H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L23/485 ,  H01L23/53266 ,  H01L29/41766 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Aspects of the present invention relate to approaches for forming a narrow source-drain contact in a semiconductor device. A contact trench can be etched to a source-drain region of the semiconductor device. A titanium liner can be deposited in this contact trench such that it covers substantially an entirety of the bottom and walls of the contact trench. An x-metal layer can be deposited over the titanium liner on the bottom of the contact trench. A titanium nitride liner can then be formed on the walls of the contact trench. The x-metal layer prevents the nitriding of the titanium liner on the bottom of the contact trench during the formation of the nitride liner.

公开(公告)号：US20170301767A1

公开(公告)日：2017-10-19

申请号：US15641861

申请日：2017-07-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

Inventor： Hiroaki Niimi ,  Shariq Siddiqui ,  Tenko Yamashita

IPC: H01L29/45 ,  H01L21/02 ,  H01L29/08 ,  H01L27/092 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/285 ,  H01L29/161 ,  H01L29/417

CPC classification number: H01L21/76843 ,  H01L21/02244 ,  H01L21/02252 ,  H01L21/02255 ,  H01L21/285 ,  H01L21/28512 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/32134 ,  H01L21/32136 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76895 ,  H01L21/823814 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L23/535 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41725 ,  H01L29/41783 ,  H01L29/45 ,  H01L29/665 ,  H01L29/66628 ,  H01L29/7848

Abstract: An electrical device including a first semiconductor device having a silicon and germanium containing source and drain region, and a second semiconductor device having a silicon containing source and drain region. A first device contact to at least one of said silicon and germanium containing source and drain region of the first semiconductor device including a metal liner of an aluminum titanium and silicon alloy and a first tungsten fill. A second device contact is in contact with at least one of the silicon containing source and drain region of the second semiconductor device including a material stack of a titanium oxide layer and a titanium layer. The second device contact may further include a second tungsten fill.

公开(公告)号：US20170133265A1

公开(公告)日：2017-05-11

申请号：US15417848

申请日：2017-01-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GlobalFoundries, Inc. ,  The Research Foundation for The State University of New York

Inventor： Huiming Bu ,  Hui-feng Li ,  Vijay Narayanan ,  Hiroaki Niimi ,  Tenko Yamashita

IPC: H01L21/768 ,  H01L29/78 ,  H01L23/535 ,  H01L29/66 ,  H01L23/532

CPC classification number: H01L21/76832 ,  H01L21/285 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/823821 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/535 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0895 ,  H01L29/66795 ,  H01L29/7851

Abstract: A transistor device includes a substrate; a source region and a drain region formed over the substrate; and a source/drain contact formed in contact with at least one of the source region and the drain region, the source/drain contact including a conductive metal and a bilayer disposed between the conductive metal and the at least one of the source and drain region, the bilayer including a metal oxide layer in contact with the conductive metal, and a silicon dioxide layer in contact with the at least one of the source and drain region.

公开(公告)号：US09640636B1

公开(公告)日：2017-05-02

申请号：US15171795

申请日：2016-06-02

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Steven J. Bentley ,  John H. Zhang ,  Kwan-Yong Lim ,  Hiroaki Niimi

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/06 ,  H01L29/417 ,  H01L29/08 ,  H01L21/306 ,  H01L21/02

CPC classification number: H01L29/66666 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823487 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/41741 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/7827

Abstract: One illustrative method disclosed herein includes, among other things, forming an initial vertically oriented channel semiconductor structure having a first height above a substrate, forming a sacrificial spacer structure adjacent the initial vertically oriented channel semiconductor structure and, with the sacrificial spacer in position, performing at least one process operation to define a self-aligned bottom source/drain region for the device that is self-aligned with respect to the sacrificial spacer structure, forming an isolation region in the trench and forming a bottom source/drain electrode above the isolation region. The method also includes removing the sacrificial spacer structure and forming a bottom spacer material around the vertically oriented channel semiconductor structure above the bottom source/drain electrode.

公开(公告)号：US09224638B2

公开(公告)日：2015-12-29

申请号：US14275448

申请日：2014-05-12

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hiroaki Niimi ,  Kisik Choi ,  Hoon Kim ,  Andy Wei ,  Guillaume Bouche

IPC: H01L21/768 ,  H01L23/522

CPC classification number: H01L23/535 ,  H01L21/285 ,  H01L21/28568 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/823431 ,  H01L21/823821 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53266 ,  H01L27/0886 ,  H01L27/0924 ,  H01L2221/1063 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Devices and methods for forming semiconductor devices with metal-titanium oxide contacts are provided. One intermediate semiconductor device includes, for instance: a substrate, at least one field-effect transistor disposed on the substrate, a first contact region positioned over at least a first portion of the at least one field-effect transistor between a spacer and an interlayer dielectric, and a second contact region positioned over at least a second portion of the at least one field-effect transistor between a spacer and an interlayer dielectric. One method includes, for instance: obtaining an intermediate semiconductor device and forming at least one contact on the intermediate semiconductor device.

Abstract translation: 提供了用金属 - 氧化钛触点形成半导体器件的器件和方法。 一个中间半导体器件包括例如：衬底，设置在衬底上的至少一个场效应晶体管，位于至少一个场效应晶体管的至少第一部分之间的第一接触区域，位于间隔物和中间层之间 电介质和位于至少一个场效应晶体管的至少一个第二部分之间的第二接触区域在间隔物和层间电介质之间。 一种方法包括例如获得中间半导体器件并在中间半导体器件上形成至少一个接触。