公开(公告)号：US20140021614A1

公开(公告)日：2014-01-23

申请号：US13554817

申请日：2012-07-20

申请人： Chen-Hua Yu ,  Tien-I Bao

发明人： Chen-Hua Yu ,  Tien-I Bao

IPC分类号： H01L23/485 ,  H01L21/28

CPC分类号： H01L23/5226 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/53219 ,  H01L23/53223 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device includes a first low-k dielectric layer, and a copper-containing via in the first low-k dielectric layer. The device further includes a second low-k dielectric layer over the first low-k dielectric layer, and an aluminum-containing metal line over and electrically coupled to the copper-containing via. The aluminum-containing metal line is in the second low-k dielectric layer.

摘要翻译： 器件包括第一低k电介质层和第一低k电介质层中的含铜通孔。 该器件还包括位于第一低k电介质层上的第二低k电介质层和在含铜通孔上电耦合的含铝金属线。 含铝金属线在第二低k电介质层中。

公开(公告)号：US08030781B2

公开(公告)日：2011-10-04

申请号：US12233974

申请日：2008-09-19

申请人： Chen-Hua Yu ,  Tien-I Bao

发明人： Chen-Hua Yu ,  Tien-I Bao

IPC分类号： H01L23/485

CPC分类号： H01L24/05 ,  H01L23/5226 ,  H01L24/06 ,  H01L24/45 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05097 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48666 ,  H01L2224/48684 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48766 ,  H01L2224/48784 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48866 ,  H01L2224/48881 ,  H01L2224/48884 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2224/48781 ,  H01L2224/48681

摘要： A semiconductor structure is provided. In one embodiment, a bond pad is formed above one or more underlying layers of a substrate. A plurality of dummy plugs are spaced around the bond pad, the plurality of dummy plugs substantially vertically traversing the one or more underlying layers, wherein the plurality of dummy plugs anchor at least two of the underlying layers together to achieve improved mechanical strength.

摘要翻译： 提供半导体结构。 在一个实施例中，在衬底的一个或多个下层上方形成接合焊盘。 多个虚拟插头围绕接合焊盘间隔开，多个虚拟插头基本垂直地穿过一个或多个下层，其中多个虚拟插头将至少两个下面的层固定在一起以实现改进的机械强度。

公开(公告)号：US07968451B2

公开(公告)日：2011-06-28

申请号：US12509039

申请日：2009-07-24

申请人： Chung-Chi Ko ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Tien-I Bao ,  Chen-Hua Yu

发明人： Chung-Chi Ko ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Tien-I Bao ,  Chen-Hua Yu

IPC分类号： H01L21/4763

CPC分类号： H01L23/53295 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76831 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A method for fabricating an integrated circuit comprises forming a low-k dielectric layer over a semiconductor substrate, etching the low-k dielectric layer to form an opening, and treating the low-k dielectric layer with a gaseous organic chemical to cause a reaction between the low-k dielectric layer and the gaseous organic chemical. The gaseous organic chemical is free from silicon.

摘要翻译： 一种用于制造集成电路的方法包括在半导体衬底上形成低k电介质层，蚀刻低k电介质层以形成开口，并且用气体有机化学品处理低k电介质层以引起第 低k电介质层和气态有机化学品。 气态有机化学物质不含硅。

公开(公告)号：US07723226B2

公开(公告)日：2010-05-25

申请号：US11654427

申请日：2007-01-17

申请人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

发明人： Chen-Hua Yu ,  Yung-Cheng Lu ,  Pei-Ren Jeng ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Chung-Chi Ko ,  Tien-I Bao ,  Shwang-Ming Jeng

IPC分类号： H01L21/4763

CPC分类号： H01L21/7682 ,  H01L21/76807 ,  H01L21/76835 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A bilayer porous low dielectric constant (low-k) interconnect structure and methods of fabricating the same are presented. A preferred embodiment having an effective dielectric constant of about 2.2 comprises a bottom deposited dielectric layer and a top deposited dielectric layer in direct contact with the former. The bottom layer and the top layer have same atomic compositions, but a higher dielectric constant value k. The bottom dielectric layer serves as an etch stop layer for the top dielectric layer, and the top dielectric layer can act as CMP stop layer. One embodiment of making the structure includes forming a bottom dielectric layer having a first porogen content and a top dielectric layer having a higher porogen content. A curing process leaves lower pore density in the bottom dielectric layer than that left in the top dielectric layer, which leads to higher dielectric value k in the bottom dielectric layer.

摘要翻译： 提出了双层多孔低介电常数（低k）互连结构及其制造方法。 具有约2.2的有效介电常数的优选实施例包括与前者直接接触的底部沉积的介电层和顶部沉积的介电层。 底层和顶层具有相同的原子组成，但是较高的介电常数值k。 底部介电层用作顶部介电层的蚀刻停止层，并且顶部介电层可以用作CMP停止层。 制造该结构的一个实施方案包括形成具有第一致孔剂含量的底部电介质层和具有较高致孔剂含量的顶部电介质层。 固化过程在底部电介质层中留下的孔隙密度低于顶部介电层中留下的孔密度，这导致底部介电层中较高的介电常数k。

公开(公告)号：US20090286394A1

公开(公告)日：2009-11-19

申请号：US12509039

申请日：2009-07-24

申请人： Chung-Chi Ko ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Tien-I Bao ,  Chen-Hua Yu

发明人： Chung-Chi Ko ,  Chia-Cheng Chou ,  Keng-Chu Lin ,  Tien-I Bao ,  Chen-Hua Yu

IPC分类号： H01L21/768 ,  H01L21/306

CPC分类号： H01L23/53295 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76831 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A method for fabricating an integrated circuit comprises forming a low-k dielectric layer over a semiconductor substrate, etching the low-k dielectric layer to form an opening, and treating the low-k dielectric layer with a gaseous organic chemical to cause a reaction between the low-k dielectric layer and the gaseous organic chemical. The gaseous organic chemical is free from silicon.

摘要翻译： 一种用于制造集成电路的方法包括在半导体衬底上形成低k电介质层，蚀刻低k电介质层以形成开口，并且用气体有机化学品处理低k电介质层以引起第 低k电介质层和气态有机化学品。 气态有机化学物质不含硅。

公开(公告)号：US06734101B1

公开(公告)日：2004-05-11

申请号：US09998787

申请日：2001-10-31

申请人： Tien-I Bao ,  Jeng Shwang-Ming ,  Syun-Ming Jang ,  Chen-Hua Yu ,  Kuen-Chyr Lee

发明人： Tien-I Bao ,  Jeng Shwang-Ming ,  Syun-Ming Jang ,  Chen-Hua Yu ,  Kuen-Chyr Lee

IPC分类号： H01L214763

CPC分类号： H01L21/76832 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76838

摘要： A new method of reducing copper hillocks in copper metallization is described. An opening is made through a dielectric layer overlying a substrate on a wafer. A copper layer is formed overlying the dielectric layer and completely filling the opening. The copper layer is polished back to leave the copper layer only within the opening. Copper hillocks are reduced by: coating an oxide layer over the copper layer and the dielectric layer, thereafter heating the wafer using NH3 plasma, and thereafter depositing a capping layer overlying the oxide layer wherein the time lapse between polishing back the copper layer and depositing the capping layer is less than one day (24 hours).

摘要翻译： 描述了一种在铜金属化中减少铜小丘的新方法。 通过覆盖晶片上的衬底的电介质层形成开口。 形成覆盖在电介质层上并完全填充开口的铜层。 铜层被抛光回去，仅在开口内留下铜层。 通过以下方式减少铜小丘：在氧化层和电介质层上涂覆氧化层，然后使用NH 3等离子体加热晶片，然后沉积覆盖氧化物层的覆盖层，其中抛光铜层和沉积 覆盖层不到一天（24小时）。

公开(公告)号：US08710660B2

公开(公告)日：2014-04-29

申请号：US13554817

申请日：2012-07-20

申请人： Chen-Hua Yu ,  Tien-I Bao

发明人： Chen-Hua Yu ,  Tien-I Bao

IPC分类号： H01L23/52 ,  H01L21/768

CPC分类号： H01L23/5226 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/53219 ,  H01L23/53223 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device includes a first low-k dielectric layer, and a copper-containing via in the first low-k dielectric layer. The device further includes a second low-k dielectric layer over the first low-k dielectric layer, and an aluminum-containing metal line over and electrically coupled to the copper-containing via. The aluminum-containing metal line is in the second low-k dielectric layer.

公开(公告)号：US07465676B2

公开(公告)日：2008-12-16

申请号：US11409658

申请日：2006-04-24

申请人： Fang Wen Tsai ,  I-I Chen ,  Zhen-Cheng Wu ,  Chih-Lung Lin ,  Tien-I Bao ,  Shwang-Ming Jeng ,  Chen-Hua Yu

发明人： Fang Wen Tsai ,  I-I Chen ,  Zhen-Cheng Wu ,  Chih-Lung Lin ,  Tien-I Bao ,  Shwang-Ming Jeng ,  Chen-Hua Yu

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76832 ,  H01L21/76843

摘要： A semiconductor structure having improved adhesion between a low-k dielectric layer and the underlying layer and a method for forming the same are provided. The semiconductor substrate includes a dielectric layer over a semiconductor substrate, an adhesion layer on the dielectric layer wherein the adhesion layer comprises a transition sub-layer over an initial sub-layer, and wherein the transition sub-layer has a composition that gradually changes from a lower portion to an upper portion. A low-k dielectric layer is formed on the adhesion layer. Damascene openings are formed in the low-k dielectric layer. A top portion of the transition sub-layer has a composition substantially similar to a composition of the low-k dielectric layer. A bottom portion of the transition sub-layer has a composition substantially similar to a composition of the initial sub-layer.

摘要翻译： 提供了具有改善的低k电介质层和下层之间的粘附性的半导体结构及其形成方法。 所述半导体衬底包括半导体衬底上的电介质层，所述电介质层上的粘合层，其中所述粘合层包含初始子层上的过渡子层，并且其中所述过渡子层具有逐渐从 下部到上部。 在粘合层上形成低k电介质层。 在低k电介质层中形成镶嵌开口。 过渡子层的顶部具有与低k电介质层的组成基本相似的组成。 过渡子层的底部具有与初始子层的组成基本相似的组成。

公开(公告)号：US20080188074A1

公开(公告)日：2008-08-07

申请号：US11728623

申请日：2007-03-27

申请人： I-I Chen ,  Fang Wen Tsai ,  Zhen-Cheng Wu ,  Tien-I Bao ,  Shwang-Ming Jeng ,  Chen-Hua Yu

发明人： I-I Chen ,  Fang Wen Tsai ,  Zhen-Cheng Wu ,  Tien-I Bao ,  Shwang-Ming Jeng ,  Chen-Hua Yu

IPC分类号： H01L21/4763

CPC分类号： H01L21/7682 ,  H01L21/76829 ,  H01L21/76835 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for forming a cap layer for an interconnect structure is provided. The method includes providing a substrate; depositing a low-k dielectric layer comprising a first porogen over the substrate; depositing a low-k cap layer comprising a second porogen on the low-k dielectric layer; and curing the low-k dielectric layer and the low-k cap layer simultaneously to remove the first and the second porogens, so that a first porosity in the low-k dielectric layer and a second porosity in the low-k cap layer are created. The second porosity is preferably less than the first porosity. Preferably, the low-k dielectric layer and the low-k cap layer comprise a common set of precursors and porogens, and are in-situ performed.

摘要翻译： 提供一种用于形成互连结构的盖层的方法。 该方法包括提供基板; 在衬底上沉积包含第一致孔剂的低k电介质层; 在低k电介质层上沉积包含第二致孔剂的低k覆盖层; 并且同时固化低k电介质层和低k覆盖层以除去第一和第二致孔剂，从而产生低k电介质层中的第一孔隙和低k覆盖层中的第二孔隙率 。 第二孔隙率优选小于第一孔隙率。 优选地，低k电介质层和低k覆盖层包含一组共同的前体和致孔剂，并且原位进行。

公开(公告)号：US20070202676A1

公开(公告)日：2007-08-30

申请号：US11361331

申请日：2006-02-24

申请人： Ming Yeh ,  Chen-Hua Yu ,  Keng-Chu Lin ,  Tien-I Bao ,  Shwang-Ming Cheng

发明人： Ming Yeh ,  Chen-Hua Yu ,  Keng-Chu Lin ,  Tien-I Bao ,  Shwang-Ming Cheng

IPC分类号： H01L21/44

CPC分类号： H01L21/76834 ,  H01L21/02063 ,  H01L21/02126 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31633 ,  H01L21/31695 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76846

摘要： A semiconductor structure having an opening formed in a porous dielectric layer is provided. The exposed pores of the dielectric layer along the sidewalls of the opening are sealed. The sealing may comprise a selective or a non-selective deposition method. The sealing layer has a substantially uniform thickness in one portion of the opening and a non-uniform thickness in another portion of the opening. A damascene interconnect structure having a pore sealing layer is provided as is its method of manufacture.

摘要翻译： 提供了一种形成在多孔电介质层中的开口的半导体结构。 沿着开口的侧壁的电介质层的暴露的孔被密封。 密封可以包括选择性或非选择性沉积方法。 密封层在开口的一部分中具有基本均匀的厚度，并且在开口的另一部分中具有不均匀的厚度。 如其制造方法那样提供具有孔密封层的镶嵌互连结构。