公开(公告)号：US09305876B2

公开(公告)日：2016-04-05

申请号：US13757346

申请日：2013-02-01

申请人： Infineon Technologies Austria AG

发明人： Khalil Hosseini ,  Joachim Mahler

IPC分类号： H05K7/00 ,  H01L23/50 ,  H01L21/58 ,  H01L23/00 ,  H01L23/495 ,  H01L25/07

CPC分类号： H01L23/50 ,  H01L21/56 ,  H01L23/49531 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/2919 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48671 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48771 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48869 ,  H01L2224/48871 ,  H01L2224/4899 ,  H01L2224/4903 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01023 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/01014

摘要： A device includes a carrier, a first semiconductor chip arranged over the carrier and a first electrically conductive element arranged over the carrier. The device further includes a first wire electrically coupled to the first electrically conductive element and a second wire electrically coupled to the first electrically conductive element and to the first semiconductor chip. The first electrically conductive element is configured to forward an electrical signal between the first wire and the second wire.

摘要翻译： 装置包括载体，布置在载体上的第一半导体芯片和布置在载体上的第一导电元件。 该器件还包括电耦合到第一导电元件的第一线和电耦合到第一导电元件和第一半导体芯片的第二线。 第一导电元件被配置为在第一线和第二线之间转发电信号。

公开(公告)号：US20160035683A1

公开(公告)日：2016-02-04

申请号：US14845247

申请日：2015-09-03

申请人： FUJI ELECTRIC CO., LTD.

发明人： Takashi SAITO ,  Fumihiko MOMOSE ,  Kazumasa KIDO ,  Yoshitaka NISHIMURA

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0381 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05655 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48755 ,  H01L2224/48855 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/92147 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/01015 ,  H01L2924/01005 ,  H01L2924/014 ,  H01L2924/01026 ,  H01L2924/2076 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2224/43

摘要： A highly reliable semiconductor device capable of heavy current conduction and high temperature operation has a module structure in which a semiconductor chip and a circuit pattern are electrically connected via a wire. A front surface metal film is formed on a front surface electrode of the chip, and the wire is bonded to the front surface metal film by wire bonding. The chip has a front surface electrode on the front surface of an Si substrate or an SiC substrate, and has a rear surface substrate on the rear surface thereof. The front surface metal film is a Ni film or a Ni alloy film of having a thickness ranging from 3 μm to 7 μm. The wire is an Al wire having an increased recrystallizing temperature and improved strength due to controlling the crystal grain sizes before wire bonding to a range of 1 μm to 20 μm.

摘要翻译： 具有高电流导通和高温操作的高度可靠的半导体器件具有其中半导体芯片和电路图案经由导线电连接的模块结构。 在芯片的前表面电极上形成正面金属膜，并且通过引线接合将导线接合到前表面金属膜。 芯片在Si衬底或SiC衬底的前表面上具有前表面电极，并且在其后表面上具有后表面衬底。 表面金属膜是厚度为3μm〜7μm的Ni膜或Ni合金膜。 该线是由于在引线键合之前将晶粒尺寸控制在1μm至20μm的范围内，具有增加的再结晶温度和改善的强度的Al线。

公开(公告)号：US09240368B2

公开(公告)日：2016-01-19

申请号：US14829422

申请日：2015-08-18

申请人： Renesas Electronics Corporation

发明人： Yoshiharu Kaneda

IPC分类号： H01L23/00 ,  H01L23/495

CPC分类号： H01L23/49503 ,  H01L21/4842 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/48639 ,  H01L2224/48655 ,  H01L2224/48739 ,  H01L2224/48755 ,  H01L2224/48839 ,  H01L2224/48855 ,  H01L2224/4903 ,  H01L2224/49505 ,  H01L2224/73265 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85455 ,  H01L2224/92247 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/2076 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/01046

摘要： A semiconductor device includes a die pad having an upper surface and a lower surface opposite to the upper surface, a semiconductor chip having a main surface and a back surface opposite to the main surface so that a plurality of electrode pads are formed on the main surface and being mounted on the die pad so that the back surface is opposite to the upper surface of the die pad, a plurality of leads arranged to be aligned on a side of the die pad, a first wire electrically connecting between a first electrode pad among the plurality of electrode pads of the semiconductor chip and a first lead among the plurality of leads, and a second wire having a diameter thicker than a diameter of the first wire and electrically connecting between a second electrode pad among the plurality of electrode pads of the semiconductor chip.

摘要翻译： 半导体器件包括具有上表面和与上表面相对的下表面的管芯焊盘，半导体芯片具有主表面和与主表面相对的后表面，使得多个电极焊盘形成在主表面上 并且被安装在所述管芯焊盘上，使得所述后表面与所述管芯焊盘的上表面相对;多个引线，被布置为在所述管芯焊盘的一侧对齐;第一焊丝，电连接在第一电极焊盘之间， 所述多个引线中的所述多个电极焊盘和所述多个引线中的第一引线，以及具有比所述第一引线的直径更大的直径的第二引线，并且电连接所述多个引线的所述多个电极焊盘之间的第二电极焊盘 半导体芯片

公开(公告)号：US09231068B2

公开(公告)日：2016-01-05

申请号：US14530533

申请日：2014-10-31

申请人： Skyworks Solutions, Inc.

发明人： Hong Shen

IPC分类号： H01L29/02 ,  H01L29/45 ,  H01L21/768 ,  H01L29/20 ,  H01L33/12 ,  H01L27/02 ,  H01L21/8252 ,  H01L23/00

CPC分类号： H01L29/452 ,  H01L21/76898 ,  H01L21/8252 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/97 ,  H01L27/02 ,  H01L29/20 ,  H01L33/12 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/13101 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83815 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/83205 ,  H01L2924/00012

摘要： Systems, apparatuses, and methods related to the design, fabrication, and manufacture of gallium arsenide (GaAs) integrated circuits are disclosed. Copper can be used as the contact material for a GaAs integrated circuit. Metallization of the wafer and through-wafer vias can be achieved through copper plating processes disclosed herein. To avoid warpage, the tensile stress of a conductive layer deposited onto a GaAs substrate can be offset by depositing a compensating layer having negative stress over the GaAs substrate. GaAs integrated circuits can be singulated, packaged, and incorporated into various electronic devices.

摘要翻译： 公开了与砷化镓（GaAs）集成电路的设计，制造和制造相关的系统，装置和方法。 铜可以用作GaAs集成电路的接触材料。 通过本文公开的铜电镀工艺可以实现晶片和晶片通孔的金属化。 为了避免翘曲，沉积在GaAs衬底上的导电层的拉伸应力可以通过在GaAs衬底上沉积具有负应力的补偿层来抵消。 GaAs集成电路可以单片化，封装并结合到各种电子设备中。

公开(公告)号：US20150357264A1

公开(公告)日：2015-12-10

申请号：US14829422

申请日：2015-08-18

申请人： Renesas Electronics Corporation

发明人： Yoshiharu KANEDA

IPC分类号： H01L23/495 ,  H01L23/00

CPC分类号： H01L23/49503 ,  H01L21/4842 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/48639 ,  H01L2224/48655 ,  H01L2224/48739 ,  H01L2224/48755 ,  H01L2224/48839 ,  H01L2224/48855 ,  H01L2224/4903 ,  H01L2224/49505 ,  H01L2224/73265 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85455 ,  H01L2224/92247 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/2076 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/01046

摘要： A semiconductor device includes a die pad having an upper surface and a lower surface opposite to the upper surface, a semiconductor chip having a main surface and a back surface opposite to the main surface so that a plurality of electrode pads are formed on the main surface and being mounted on the die pad so that the back surface is opposite to the upper surface of the die pad, a plurality of leads arranged to be aligned on a side of the die pad, a first wire electrically connecting between a first electrode pad among the plurality of electrode pads of the semiconductor chip and a first lead among the plurality of leads, and a second wire having a diameter thicker than a diameter of the first wire and electrically connecting between a second electrode pad among the plurality of electrode pads of the semiconductor chip.

摘要翻译： 半导体器件包括具有上表面和与上表面相对的下表面的管芯焊盘，半导体芯片具有主表面和与主表面相对的后表面，使得多个电极焊盘形成在主表面上 并且被安装在所述管芯焊盘上，使得所述后表面与所述管芯焊盘的上表面相对;多个引线，被布置为在所述管芯焊盘的一侧对齐;第一焊丝，电连接在第一电极焊盘之间， 所述多个引线中的所述多个电极焊盘和所述多个引线中的第一引线，以及具有比所述第一引线的直径更大的直径的第二引线，并且电连接所述多个引线的所述多个电极焊盘之间的第二电极焊盘 半导体芯片

公开(公告)号：US20150348946A1

公开(公告)日：2015-12-03

申请号：US14822253

申请日：2015-08-10

申请人： Panasonic Corporation

发明人： SHIGEFUMI DOHI

IPC分类号： H01L25/065 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/96 ,  H01L24/97 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05553 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/08501 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32221 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48221 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48611 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48711 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48811 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2224/05552

摘要： Provided is a small and thin semiconductor device while preventing contamination of a wire bonding terminal caused by creeping-up of a die bond. The semiconductor device includes: a first semiconductor chip having a main surface formed with electrodes; an extension part extended outward from a side end surface of the first semiconductor chip; a rewiring layer formed from the main surface of the first semiconductor chip to a first surface of the extension part; a connection terminal provided on the rewiring layer of the extension part; a die bond that fixes the first semiconductor chip and the extension part to a substrate; and in the extension part, a step outside the connection terminal.

摘要翻译： 提供一种小而薄的半导体器件，同时防止由于晶片键合的爬行引起的引线接合端子的污染。 半导体器件包括：具有形成有电极的主表面的第一半导体芯片; 从所述第一半导体芯片的侧端面向外延伸的延伸部; 从所述第一半导体芯片的主表面到所述延伸部的第一表面形成的再布线层; 连接端子，设置在所述延伸部的重新布线层上; 将第一半导体芯片和延伸部固定到基板的芯片键; 并且在延伸部分中，连接端子外部的台阶。

公开(公告)号：US20150325530A1

公开(公告)日：2015-11-12

申请号：US14801404

申请日：2015-07-16

申请人： Kabushiki Kaisha Toshiba

发明人： Keiju YAMADA ,  Masaaki Ishida

IPC分类号： H01L23/552 ,  H01L23/528 ,  H01L23/522 ,  H01L23/498 ,  H01L23/31

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5226 ,  H01L23/5286 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor device includes a circuit substrate, a semiconductor element, a sealing resin layer, and a conductive shielding layer. The circuit substrate includes an insulating layer, a plurality of interconnections forming first interconnection layers provided on an upper surface side of the insulating layer, a plurality of interconnections forming second interconnection layers provided on a lower surface side of the insulating layer, and a plurality of vias penetrating from the upper surface to the lower surface of the insulating layer. The semiconductor element is mounted on the upper surface side of the circuit substrate. The conductive shielding layer covers the sealing resin layer and part of an end portion of the circuit substrate. Any of the plurality of vias and the conductive shielding layer are electrically connected.

摘要翻译： 根据一个实施例，半导体器件包括电路基板，半导体元件，密封树脂层和导电屏蔽层。 电路基板包括绝缘层，形成设置在绝缘层的上表面侧的第一互连层的多个互连，形成设置在绝缘层的下表面侧的第二互连层的多个互连，以及多个 从绝缘层的上表面到下表面穿透的通孔。 半导体元件安装在电路基板的上表面侧。 导电屏蔽层覆盖密封树脂层和电路基板端部的一部分。 多个通孔和导电屏蔽层中的任何一个电连接。

公开(公告)号：US09177938B2

公开(公告)日：2015-11-03

申请号：US14453922

申请日：2014-08-07

申请人： FUJITSU LIMITED

发明人： Motoaki Tani ,  Keishiro Okamoto

IPC分类号： H01L21/00 ,  H01L23/00 ,  H01L21/78 ,  H01L23/367 ,  H01L23/31 ,  H01L23/13 ,  H01L23/14 ,  H01L23/373 ,  H01L23/498 ,  H01L23/66

CPC分类号： H01L24/83 ,  H01L21/78 ,  H01L23/13 ,  H01L23/142 ,  H01L23/3121 ,  H01L23/367 ,  H01L23/3737 ,  H01L23/49822 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05558 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/06155 ,  H01L2224/06181 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/2912 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/32225 ,  H01L2224/3224 ,  H01L2224/32245 ,  H01L2224/33183 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48599 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48699 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48799 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/1026 ,  H01L2924/1033 ,  H01L2924/10344 ,  H01L2924/1047 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/13064 ,  H01L2924/142 ,  H01L2924/15153 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2924/00

摘要： A semiconductor apparatus includes: a semiconductor device including a first electrode; a substrate including a second electrode and a recess; and a heat-dissipating adhesive material to set the semiconductor device in the recess so as to arrange the first electrode close to the second electrode, wherein the first electrode is coupled to the second electrode and the heat-dissipating adhesive material covers a bottom surface and at least part of a side surface of the semiconductor device.

摘要翻译： 半导体装置包括：半导体器件，包括第一电极; 包括第二电极和凹部的基板; 以及散热粘合剂材料，用于将所述半导体器件设置在所述凹部中，以将所述第一电极布置成靠近所述第二电极，其中所述第一电极耦合到所述第二电极，并且所述散热粘合剂材料覆盖底表面， 半导体器件的侧表面的至少一部分。

公开(公告)号：US09111869B2

公开(公告)日：2015-08-18

申请号：US13194585

申请日：2011-07-29

申请人： Victor Hugo Cruz ,  David Francis Courtney

发明人： Victor Hugo Cruz ,  David Francis Courtney

IPC分类号： H01L29/12 ,  H01L23/495 ,  H01L23/29 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L23/291 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/34 ,  H01L24/36 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05639 ,  H01L2224/05655 ,  H01L2224/06181 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/32245 ,  H01L2224/37184 ,  H01L2224/37639 ,  H01L2224/37655 ,  H01L2224/40247 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/48247 ,  H01L2224/4847 ,  H01L2224/48699 ,  H01L2224/48739 ,  H01L2224/48755 ,  H01L2224/83439 ,  H01L2224/83455 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/85439 ,  H01L2224/85455 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/097 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/17738 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/201 ,  H01L2924/20111 ,  H01L2224/84 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01049 ,  H01L2924/00014 ,  H01L2924/01005

摘要： A high temperature, non-cavity package for non-axial electronics is designed using a glass ceramic compound with that is capable of being assembled and operating continuously at temperatures greater that 300-400° C. Metal brazes, such as silver, silver colloid or copper, are used to connect the semiconductor die, lead frame and connectors. The components are also thermally matched such that the packages can be assembled and operating continuously at high temperatures and withstand extreme temperature variations without the bonds failing or the package cracking due to a thermal mismatch.

摘要翻译： 用于非轴向电子器件的高温非空腔封装是使用玻璃陶瓷化合物设计的，其能够在高于300-400℃的温度下连续组装和操作。金属钎焊，例如银，银胶体或 铜，用于连接半导体管芯，引线框架和连接器。 这些部件也是热匹配的，使得封装可以在高温下连续地组装和操作，并且可承受极端的温度变化，而不会发生键失效或者由于热失配引起的封装破裂。

公开(公告)号：US09111782B2

公开(公告)日：2015-08-18

申请号：US14252740

申请日：2014-04-14

申请人： IXYS Corporation

发明人： Nathan Zommer

IPC分类号： H01L29/72 ,  H01L23/00 ,  B23K1/20 ,  B23K31/02 ,  H01L23/373 ,  H01L23/488 ,  H01L23/495 ,  H01L23/52 ,  H01L25/065 ,  H01L25/00 ,  B23K20/233

CPC分类号： H01L24/09 ,  B23K1/20 ,  B23K20/2333 ,  B23K31/02 ,  B23K2101/34 ,  B23K2103/10 ,  B23K2103/18 ,  B23K2103/56 ,  H01L23/3735 ,  H01L23/488 ,  H01L23/49513 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/52 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/80 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/031 ,  H01L2224/03312 ,  H01L2224/0332 ,  H01L2224/035 ,  H01L2224/03505 ,  H01L2224/0381 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05639 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/0589 ,  H01L2224/08225 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/275 ,  H01L2224/27505 ,  H01L2224/29139 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/2939 ,  H01L2224/32227 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48229 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/49111 ,  H01L2224/49112 ,  H01L2224/49171 ,  H01L2224/49176 ,  H01L2224/73265 ,  H01L2224/80203 ,  H01L2224/80439 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83455 ,  H01L2224/83464 ,  H01L2224/85181 ,  H01L2224/85424 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2224/9222 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/80 ,  H01L2224/85 ,  H01L2224/03 ,  H01L2224/83 ,  H01L2224/05164 ,  H01L2924/00 ,  H01L2924/00012

摘要： A DBA-based power device includes a DBA (Direct Bonded Aluminum) substrate. An amount of silver nanoparticle paste of a desired shape and size is deposited (for example by micro-jet deposition) onto a metal plate of the DBA. The paste is then sintered, thereby forming a sintered silver feature that is in electrical contact with an aluminum plate of the DBA. The DBA is bonded (for example, is ultrasonically welded) to a lead of a leadframe. Silver is deposited onto the wafer back side and the wafer is singulated into dice. In a solderless silver-to-silver die attach process, the silvered back side of a die is pressed down onto the sintered silver feature on the top side of the DBA. At an appropriate temperature and pressure, the silver of the die fuses to the sintered silver of the DBA. After wirebonding, encapsulation and lead trimming, the DBA-based power device is completed.

摘要翻译： 基于DBA的功率器件包括DBA（直接键合铝）基板。 将一定量的所需形状和尺寸的银纳米颗粒糊剂（例如通过微喷射沉积）沉积到DBA的金属板上。 然后将浆料烧结，从而形成与DBA的铝板电接触的烧结银特征。 DBA被焊接（例如，被超声波焊接）到引线框的引线。 将银沉积在晶片背面，并将晶片分成骰子。 在无焊银镀银贴片工艺中，模具的镀银背面被压到DBA顶面的烧结银特征上。 在适当的温度和压力下，模具的银熔化到DBA的烧结银上。 在引线接合，封装和引线修整之后，完成了基于DBA的功率器件。