公开(公告)号：US20180342472A1

公开(公告)日：2018-11-29

申请号：US15771982

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Javier A. FALCON ,  Yoshihiro TOMITA ,  Vijay K. NAIR

IPC: H01L23/66 ,  H01L23/00 ,  H01L25/18

Abstract: Embodiments of the invention include a microelectronic device that includes a first die formed with a silicon based substrate and a second die coupled to the first die. The second die is formed with compound semiconductor materials in a different substrate (e.g., compound semiconductor substrate, group III-V substrate). An antenna unit is coupled to the second die. The antenna unit transmits and receives communications at a frequency of approximately 4 GHz or higher.

公开(公告)号：US20180212322A1

公开(公告)日：2018-07-26

申请号：US15745681

申请日：2015-09-24

Applicant: Intel Corporation

Inventor： Adel A. ELSHERBINI ,  Telesphor KAMGAING ,  Sasha N. OSTER ,  Georgios C. DOGIAMIS

IPC: H01Q1/52 ,  H01Q1/22

CPC classification number: H01Q1/521 ,  H01Q1/2266 ,  H01Q1/2283 ,  H01Q1/38 ,  H01Q1/525 ,  H01Q21/28

Abstract: Embodiments of the invention may include packaged device that may be used for reducing cross-talk between neighboring antennas. In an embodiment the packaged device may comprise a first package substrate that is mounted to a printed circuit board (PCB). A plurality of first antennas may also be formed on the first package. Embodiments may also include a second package substrate that is mounted to the PCB, and the second package substrate may include a second plurality of antennas. According to an embodiment, the cross-talk between the first and second plurality of antennas is reduced by forming a guiding structure between the first and second packages. In an embodiment the guiding structure comprises a plurality of fins that define a plurality of pathways between the first antennas and the second antennas.

公开(公告)号：US20180097693A1

公开(公告)日：2018-04-05

申请号：US15283129

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Shawna M. LIFF ,  Adel A. ELSHERBINI ,  Sasha N. OSTER ,  Feras EID ,  Georgios C. DOGIAMIS ,  Thomas L. SOUNART ,  Johanna M. SWAN

IPC: H04L12/24 ,  H01H57/00 ,  H01L41/047 ,  H01L41/187 ,  A61B5/0205 ,  A61B5/00

CPC classification number: H04L41/0816 ,  A61B5/02055 ,  A61B5/021 ,  A61B5/02405 ,  A61B5/08 ,  A61B5/145 ,  A61B5/4266 ,  A61B5/4824 ,  A61B5/7282 ,  A61B5/7285 ,  A61B2560/0462 ,  H01H57/00 ,  H01L41/0471 ,  H01L41/187 ,  H01L41/1873 ,  H01L41/1876 ,  H04L41/0886

Abstract: Embodiments of the invention include a physiological sensor system. According to an embodiment the sensor system may include a package substrate, a plurality of sensors formed on the substrate, a second electrical component, and an encryption bank formed along a data transmission path between the plurality of sensors and the second electrical component. In an embodiment the encryption bank may include a plurality of portions that each have one or more switches integrated into the package substrate. In an embodiment each sensor transmits data to the second electrical component along different portions of the encryption bank. In some embodiments, the switches may be piezoelectrically actuated. In other embodiments the switches may be actuated by thermal expansion. Additional embodiments may include tri- or bi-stable mechanical switches.

公开(公告)号：US20170288635A1

公开(公告)日：2017-10-05

申请号：US15088814

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Adel A. ELSHERBINI ,  Feras EID ,  Baris BICEN ,  Telesphor KAMGAING ,  Vijay K. NAIR ,  Johanna M. SWAN ,  Georgios C. DOGIAMIS ,  Valluri R. RAO

IPC: H03H9/02 ,  H03H9/17

CPC classification number: H03H9/02259 ,  H03H9/17 ,  H03H9/2463 ,  H03H2009/02291 ,  H03H2009/155

Abstract: Embodiments of the invention include a piezoelectric resonator which includes an input transducer having a first piezoelectric material, a vibrating structure coupled to the input transducer, and an output transducer coupled to the vibrating structure. In one example, the vibrating structure is positioned above a cavity of an organic substrate. The output transducer includes a second piezoelectric material. In operation the input transducer causes an input electrical signal to be converted into mechanical vibrations which propagate across the vibrating structure to the output transducer.

公开(公告)号：US20170286731A1

公开(公告)日：2017-10-05

申请号：US15586820

申请日：2017-05-04

Applicant: Intel Corporation

Inventor： Adel A. ELSHERBINI ,  Telesphor KAMGAING ,  Feras EID ,  Vijay K. NAIR ,  Georgios C. DOGIAMIS ,  Johanna M. SWAN ,  Valluri R. RAO

IPC: G06K7/10 ,  H03H9/17 ,  H03H9/205 ,  H03H9/30

CPC classification number: G06K7/10297 ,  G06K7/10316 ,  G06K19/0672 ,  G06K19/0675 ,  H03H9/30

Abstract: Embodiments of the invention include delay line circuitry that is integrated with an organic substrate. Organic dielectric material and a plurality of conductive layers form the organic substrate. The delay line circuitry includes a piezoelectric transducer to receive a guided electromagnetic wave signal and to generate an acoustic wave signal to be transmitted with an acoustic transmission medium. An acoustic reflector is communicatively coupled to the acoustic transmission medium. The acoustic reflector receives a plurality of acoustic wave signals from the acoustic transmission medium and reflects acoustic wave signals to the piezoelectric transducer using the acoustic transmission medium. The transducer converts the reflected acoustic signals into electromagnetic waves which are then transmitted back through the antenna and decoded by the reader.

公开(公告)号：US20250007145A1

公开(公告)日：2025-01-02

申请号：US18216315

申请日：2023-06-29

Applicant: Intel Corporation

Inventor： Peter BAUMGARTNER ,  Richard GEIGER ,  Georgios C. DOGIAMIS ,  Steven CALLENDER ,  Telesphor KAMGAING ,  Jonathan C. JENSEN ,  Harald GOSSNER

IPC: H01Q1/22 ,  H01L25/10 ,  H01Q21/24

Abstract: Embodiments disclosed herein include communication dies for mm-wave and/or sub-terahertz wavelength communications. In an embodiment, a communications die comprises a substrate with a first face and a second face. In an embodiment, edge surfaces connect the first face to the second face. In an embodiment, a circuitry element is on the first face, and an antenna on at least one of the edge surfaces.

公开(公告)号：US20240429117A1

公开(公告)日：2024-12-26

申请号：US18338176

申请日：2023-06-20

Applicant: Intel Corporation

Inventor： Harshit DHAKAD ,  Georgios C. DOGIAMIS ,  Georg SEIDEMANN ,  Bernd WAIDHAS ,  Thomas WAGNER ,  Manisha DUTTA ,  Michael LANGENBUCH

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/42 ,  H01L23/498 ,  H01L23/552

Abstract: Embodiments herein relate to systems, apparatuses, techniques or processes for reducing the capacitance of a package that includes a die by at least partially surrounding the die within a mold compound and a dielectric material with different dielectric constants. Other embodiments may be described and/or claimed.

公开(公告)号：US20240006735A1

公开(公告)日：2024-01-04

申请号：US17853597

申请日：2022-06-29

Applicant: Intel Corporation

Inventor： Georgios C. DOGIAMIS ,  Neelam PRABHU GAUNKAR ,  Nada SEKELJIC

IPC: H04B1/40 ,  H01P3/16 ,  H01P11/00

CPC classification number: H04B1/40 ,  H01P11/006 ,  H01P3/16

Abstract: Embodiments herein relate to systems, apparatuses, or processes for packages that include transceivers that are at least partly positioned underneath a waveguide launcher array to decrease the maximum signal transmission time between the transceiver and the waveguide launcher array. This configuration may increase the overall data transmission rate between a die and waveguides coupled with the waveguide launcher array. Other embodiments may be described and/or claimed.

公开(公告)号：US20230197646A1

公开(公告)日：2023-06-22

申请号：US17557948

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Neelam PRABHU GAUNKAR ,  Veronica STRONG ,  Brandon RAWLINGS ,  Andrew P. COLLINS ,  Arghya SAIN ,  Sivaseetharaman PANDI

IPC: H01L23/66 ,  H01L23/15 ,  H01L23/498 ,  H01P3/08

CPC classification number: H01L23/66 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49838 ,  H01P3/081 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6638

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a substrate with a first surface and a second surface opposite from the first surface, where the substrate comprises glass. In an embodiment, the electronic package further comprises a trace embedded in the substrate, where a width of the trace is less than a height of the trace. In an embodiment, the electronic package further comprises a first layer on the first surface of the substrate, where the first layer is a dielectric buildup film, and a second layer on the second surface of the substrate, where the second layer is the dielectric buildup film.

公开(公告)号：US20220416391A1

公开(公告)日：2022-12-29

申请号：US17356023

申请日：2021-06-23

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Neelam PRABHU GAUNKAR ,  Veronica STRONG ,  Aleksandar ALEKSOV

IPC: H01P3/00 ,  H01L23/15 ,  H01L23/498 ,  H01L23/66 ,  H01L21/48 ,  H01P11/00

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to positioning signal and ground vias, or ground planes, in a glass core to control impedance within a package. Laser-assisted etching processes may be used to create vertical controlled impedance lines to enhance bandwidth and bandwidth density of high-speed signals on a package. Other embodiments may be described and/or claimed.