公开(公告)号：US08436482B2

公开(公告)日：2013-05-07

申请号：US12792036

申请日：2010-06-02

申请人： Tadashi Yamaguchi

发明人： Tadashi Yamaguchi

IPC分类号： H01L23/544 ,  H01L23/48

CPC分类号： H01L23/3192 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/525 ,  H01L23/544 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L2223/54433 ,  H01L2223/54453 ,  H01L2224/0231 ,  H01L2224/0236 ,  H01L2224/02375 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/27416 ,  H01L2924/14 ,  H01L2924/00

摘要： There is provided a semiconductor device including: an insulating layer provided on a substrate and formed with plural cavities; wiring lines provided on the insulating layer; plural branched wiring lines that branch from the wiring lines so as to respectively overlap with the plural cavities when seen in plan view; a conductive portion formed on the wiring lines; an external terminal formed on the conductive portion; and a sealing resin layer that seals the wiring lines and the conductive portion.

摘要翻译： 提供一种半导体器件，包括：绝缘层，设置在基板上并形成有多个空腔; 设在绝缘层上的布线; 多个分支布线从布线分支，以在平面图中看到时分别与多个空腔重叠; 形成在布线上的导电部分; 形成在所述导电部上的外部端子; 以及密封树脂层，其密封布线和导电部。

公开(公告)号：US08354302B2

公开(公告)日：2013-01-15

申请号：US12975624

申请日：2010-12-22

申请人： Tadashi Yamaguchi

发明人： Tadashi Yamaguchi

IPC分类号： H01L21/00

CPC分类号： H01L24/11 ,  H01L2223/5448 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A semiconductor device includes a semiconductor chip having a plurality of electrode pads, and a rewiring pattern having a plurality of interconnects connected to the electrode pads and extending over insulation film. The semiconductor device includes a plurality of columnar electrodes each having a main body section and a protrusion section, and a sealing section having a top face having a height the same as the top faces of the protrusion sections. The semiconductor device includes solder balls formed on the protrusion sections and has a plurality of trenches in the sealing section. Each trench has a depth which reaches the boundary between the main body and protrusion of the electrode. The side faces of the protrusion section are exposed by the trenches. Each solder ball is electrically connected to the top and side faces of the protrusion section of each electrode.

摘要翻译： 半导体器件包括具有多个电极焊盘的半导体芯片和具有连接到电极焊盘并在绝缘膜上延伸的多个互连的重新布线图案。 半导体器件包括多个柱状电极，每个柱状电极具有主体部分和突出部分，以及密封部分，其具有与突出部分的顶面相同的高度的顶面。 半导体器件包括形成在突出部分上的焊球，并且在密封部分中具有多个沟槽。 每个沟槽的深度达到主体和电极突起之间的边界。 突起部分的侧面由沟槽露出。 每个焊球与每个电极的突出部分的顶面和侧面电连接。

公开(公告)号：US08148248B2

公开(公告)日：2012-04-03

申请号：US13053733

申请日：2011-03-22

申请人： Toshiaki Tsutsumi ,  Tomonori Okudaira ,  Keiichiro Kashihara ,  Tadashi Yamaguchi

发明人： Toshiaki Tsutsumi ,  Tomonori Okudaira ,  Keiichiro Kashihara ,  Tadashi Yamaguchi

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L23/485 ,  H01L21/28518 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a semiconductor device having a metal silicide layer which can suppress the malfunction and the increase in power consumption of the device. The semiconductor device has a semiconductor substrate containing silicon and having a main surface, first and second impurity diffusion layers formed in the main surface of the semiconductor substrate, a metal silicide formed over the second impurity diffusion layer, and a silicon nitride film and a first interlayer insulation film sequentially stacked over the metal silicide. In the semiconductor device, a contact hole penetrating through the silicon nitride film and the first interlayer insulation film, and reaching the surface of the metal silicide is formed. The thickness of a portion of the metal silicide situated immediately under the contact hole is smaller than the thickness of a portion of the metal silicide situated around the contact hole.

摘要翻译： 提供了具有金属硅化物层的半导体器件，其可以抑制器件的故障和功率消耗的增加。 半导体器件具有包含硅并具有主表面的半导体衬底，形成在半导体衬底的主表面中的第一和第二杂质扩散层，形成在第二杂质扩散层上的金属硅化物，以及氮化硅膜和第一 层间绝缘膜依次层叠在金属硅化物上。 在半导体器件中，形成穿过氮化硅膜和第一层间绝缘膜并到达金属硅化物表面的接触孔。 位于接触孔正下方的金属硅化物的一部分的厚度小于位于接触孔周围的金属硅化物的一部分的厚度。

公开(公告)号：US20110092037A1

公开(公告)日：2011-04-21

申请号：US12977573

申请日：2010-12-23

申请人： Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

发明人： Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

IPC分类号： H01L21/336

CPC分类号： H01L21/76802 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76837 ,  H01L23/53295 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/00

摘要： In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film.

摘要翻译： 为了阻止通过HDP-CVD等形成层间绝缘膜时产生的氢离子，从而抑制氢离子对器件的不利影响，在包括接触层，金属互连和层间绝缘的半导体器件中 在其上形成有栅电极的半导体衬底上，通过使用含氢原子的气体的偏压施加等离子体CVD在金属互连上形成层间绝缘膜，并且在金属互连的底层设置氮氧化硅膜， 层间绝缘膜。

公开(公告)号：US20110092022A1

公开(公告)日：2011-04-21

申请号：US12975624

申请日：2010-12-22

申请人： Tadashi Yamaguchi

发明人： Tadashi Yamaguchi

IPC分类号： H01L21/60

CPC分类号： H01L24/11 ,  H01L2223/5448 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A semiconductor device includes a semiconductor chip having a plurality of electrode pads, and a rewiring pattern having a plurality of interconnects which are connected to the electrode pads and extend over an insulation film. The semiconductor device also includes a plurality of columnar electrodes each of which has a main body section and a protrusion section, and a sealing section which has a top face having a height the same as the top faces of the protrusion sections. The semiconductor device also includes solder balls formed on the protrusion sections. The semiconductor device also has a plurality of trenches in the sealing section. Each trench has a depth which reaches the boundary between the main body and protrusion of the electrode. The side faces of the protrusion section are exposed face defined by the trenches. Each solder ball is electrically connected to the top face and side faces of the protrusion section of each electrode.

摘要翻译： 半导体器件包括具有多个电极焊盘的半导体芯片，以及具有连接到电极焊盘并延伸在绝缘膜上的多个互连的重新布线图案。 半导体器件还包括多个柱状电极，每个柱状电极具有主体部分和突出部分，以及具有与突出部分的顶面相同的顶面的密封部分。 半导体器件还包括形成在突出部分上的焊球。 半导体器件还在密封部分中具有多个沟槽。 每个沟槽的深度达到主体和电极突起之间的边界。 突出部分的侧面是由沟槽限定的露出面。 每个焊球与每个电极的突出部分的顶面和侧面电连接。

公开(公告)号：US07349300B2

公开(公告)日：2008-03-25

申请号：US10840021

申请日：2004-05-06

申请人： Takashi Miyamoto ,  Tadashi Yamaguchi

发明人： Takashi Miyamoto ,  Tadashi Yamaguchi

IPC分类号： G11B7/00

CPC分类号： G11B19/08 ,  G11B19/18 ,  G11B19/26

摘要： An optical disk apparatus which varies a rotational speed of an optical disk through use of a sound volume controller. A controller of the optical disk apparatus causes a sound volume controller to act as a rotational speed controller upon receipt of a READ command from a host apparatus. The controller detects a set position of the sound volume controller on the basis of a signal output from the same and controls a spindle motor in accordance with a detected position, thereby changing a rotational speed of said optical disk. When wind sound or the like, of the optical disk is obtrusive for the user, the user can diminish noise by means of decreasing the rotational speed through actuation of the sound volume controller.

摘要翻译： 一种光盘装置，其通过使用音量控制器来改变光盘的旋转速度。 光盘装置的控制器使得音量控制器在从主机装置接收到READ命令时用作转速控制器。 控制器基于从其输出的信号检测音量控制器的设定位置，并根据检测位置控制主轴电机，从而改变所述光盘的转速。 当光盘的风声等对用户来说是突出的，用户可以通过致动音量控制器来降低旋转速度来减小噪音。

公开(公告)号：US20070077736A1

公开(公告)日：2007-04-05

申请号：US11537208

申请日：2006-09-29

申请人： Tadashi Yamaguchi ,  Keiichiro Kashihara ,  Tomonori Okudaira ,  Toshiaki Tsutsumi

发明人： Tadashi Yamaguchi ,  Keiichiro Kashihara ,  Tomonori Okudaira ,  Toshiaki Tsutsumi

IPC分类号： H01L21/04

CPC分类号： H01L21/823814 ,  H01L21/26506 ,  H01L21/823835 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： An N-type source region and an N-type drain region of N-channel type MISFETs are implanted with ions (containing at least one of F, Si, C, Ge, Ne, Ar and Kr) with P-channel type MISFETs being covered by a mask layer. Then, each gate electrode, source region and drain region of the N- and P-channel type MISFETs are subjected to silicidation (containing at least one of Ni, Ti, Co, Pd, Pt and Er). This can suppress a drain-to-body off-leakage current (substrate leakage current) in the N-channel type MISFETs without degrading the drain-to-body off-leakage current in the P-channel type MISFETs.

摘要翻译： 离子（含有F，Si，C，Ge，Ne，Ar和Kr中的至少一个）注入N沟道型MISFET的N型源极区域和N型漏极区域，P沟道型MISFET为 被掩模层覆盖。 然后，对N沟道型MISFET和P沟道型MISFET的各栅电极，源极区和漏极区进行硅化（含有Ni，Ti，Co，Pd，Pt和Er中的至少一种）。 这可以抑制N沟道型MISFET中的漏 - 漏泄漏电流（衬底泄漏电流），而不会降低P沟道型MISFET中的漏 - 漏泄漏电流。

公开(公告)号：US20060154447A1

公开(公告)日：2006-07-13

申请号：US11330996

申请日：2006-01-13

申请人： Yoshimasa Kushima ,  Tadashi Yamaguchi

发明人： Yoshimasa Kushima ,  Tadashi Yamaguchi

IPC分类号： H01L21/78 ,  H01L21/301

CPC分类号： H01L21/78 ,  H01L2224/96

摘要： A method for manufacturing a semiconductor device comprises the steps of forming protruded electrodes on a plurality chip areas of a semiconductor wafer having the plurality of chip areas and boundary regions formed among the chip areas, both being provided in a surface of the semiconductor wafer, forming a surface-side protective member so as to cover the surface of the semiconductor wafer and the protruded electrodes, removing the semiconductor wafer corresponding to the boundary regions and forming trenches which expose the surface-side protective member, forming a back-side protective member with which the trenches are filled and which covers the back of the semiconductor wafer, and dividing the semiconductor wafer in the boundary regions with widths thinner than those of the trenches in such a manner that the surface-side protective member and the back-side protective member charged into the trenches are left in cut sections.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在具有形成在芯片区域之间的多个芯片区域和边界区域的半导体晶片的多个芯片区域上形成突起电极，两者设置在半导体晶片的表面中，形成 表面侧保护构件，以覆盖半导体晶片和突出电极的表面，去除对应于边界区域的半导体晶片，并形成暴露表面侧保护构件的沟槽，形成背面保护构件，形成背面保护构件 沟槽被填充并且覆盖半导体晶片的背面，并且以这样的方式将半导体晶片划分在具有比沟槽更薄的边界区域的边界区域中，使得表面侧保护构件和背面保护构件 装入沟槽的部分留在切割部分。

公开(公告)号：US07022552B2

公开(公告)日：2006-04-04

申请号：US10748258

申请日：2003-12-31

申请人： Tadashi Yamaguchi

发明人： Tadashi Yamaguchi

IPC分类号： H01L21/44

CPC分类号： H01L23/3114 ,  H01L21/56 ,  H01L21/561 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1064 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/18162 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/03

摘要： A semiconductor device includes a semiconductor chip having an electrode pad electrically connected to an integrated circuit and a conducting part electrically connected to the electrode pad; an insulating material formed on a side of the semiconductor chip; and a conductive pattern to extend from a top of a front side of the insulating material to the conducting part of the semiconductor chip.

摘要翻译： 半导体器件包括具有电连接到集成电路的电极焊盘和与该电极焊盘电连接的导电部分的半导体芯片; 形成在所述半导体芯片的一侧上的绝缘材料; 以及从绝缘材料的前侧的顶部延伸到半导体芯片的导通部的导电图案。

公开(公告)号：US20050116324A1

公开(公告)日：2005-06-02

申请号：US10798555

申请日：2004-03-12

申请人： Tadashi Yamaguchi

发明人： Tadashi Yamaguchi

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/56 ,  H01L23/02 ,  H01L23/12 ,  H01L23/13 ,  H01L23/31 ,  H01L23/538

CPC分类号： H01L24/19 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/5389 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/15311

摘要： A plurality of semiconductor chips (14) each having a first main surface (14b) formed with electrode pads (21) and a second main surface (14c) opposite to the first main surface are respectively mounted on a chip mounting surface (12a) larger in area than the second main surface, of a wafer-shaped mounting substrate (12) at equal intervals so as to extend along first and second trenches (18a, 18b) defined in the chip mounting surface with these trenches as target lines. Thereafter, solder balls (25) electrically connected to the electrode pads of the semiconductor chips are disposed on their corresponding wiring patterns 34 that extend from above first regions (100) located above the semiconductor chips, of a surface region of an encapsulating layer (32) covering the semiconductor chips to above second regions (200) that surround the first regions. Afterwards, the encapsulating layer and the mounting substrate are cut and thereby fractionized into semiconductor devices each having a fan-out structure.

摘要翻译： 每个具有形成有电极焊盘（21）的第一主表面（14b）和与第一主表面相对的第二主表面（14c）的多个半导体芯片（14）分别安装在芯片安装表面（12）上 a）相对于晶片状安装基板（12）的面积大于第二主表面的距离，以等间隔延伸，以便以这些沟槽限定在芯片安装表面中的第一和第二沟槽（18a，18b）延伸为 目标线。 此后，电连接到半导体芯片的电极焊盘的焊球（25）设置在它们对应的布线图案34上，该布线图案34从位于半导体芯片上方的第一区域（100）延伸到封装层（32）的表面区域 ）覆盖半导体芯片到围绕第一区域的第二区域（200）。 然后，封装层和安装基板被切割，从而分成半扇形，每个都具有扇出结构。