公开(公告)号：US07989948B2

公开(公告)日：2011-08-02

申请号：US12472359

申请日：2009-05-26

申请人： Jui-Ching Hsieh ,  Pin Chang ,  Chung-De Chen ,  Li-Chi Pan ,  Yu-Jen Wang ,  Chin-Horng Wang

发明人： Jui-Ching Hsieh ,  Pin Chang ,  Chung-De Chen ,  Li-Chi Pan ,  Yu-Jen Wang ,  Chin-Horng Wang

IPC分类号： H01L21/50

CPC分类号： H01L23/3672 ,  H01L23/42 ,  H01L31/052 ,  H01L33/62 ,  H01L33/641 ,  H01L33/642 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/16 ,  Y02E10/50 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/013

摘要： A chip package structure including a heat dissipation substrate, a chip and a heterojunction heat conduction buffer layer is provided. The chip is disposed on the heat dissipation substrate. The heterojunction heat conduction buffer layer is disposed between the heat dissipation substrate and the chip. The heterojunction heat conduction buffer layer includes a plurality of pillars perpendicular to the heat dissipation substrate. The aspect ratio of each pillar is between about 3:1 and 50:1.

摘要翻译： 提供了包括散热基板，芯片和异质结导热缓冲层的芯片封装结构。 芯片设置在散热基板上。 异质结导热缓冲层设置在散热基板和芯片之间。 异质结导热缓冲层包括垂直于散热基板的多个支柱。 每个柱的纵横比在约3:1至50:1之间。

公开(公告)号：US07834410B2

公开(公告)日：2010-11-16

申请号：US12422579

申请日：2009-04-13

申请人： Yu-Jen Wang ,  Ya-Chen Kao ,  Chun-Jung Lin

发明人： Yu-Jen Wang ,  Ya-Chen Kao ,  Chun-Jung Lin

IPC分类号： H01L29/82 ,  G11C11/02

CPC分类号： H01L43/08 ,  G11C11/161 ,  H01L27/228 ,  H01L43/12

摘要： The present disclosure provides a semiconductor memory device. The device includes a bottom electrode over a semiconductor substrate; an anti-ferromagnetic layer disposed over the bottom electrode; a pinned layer disposed over the anti-ferromagnetic layer; a barrier layer disposed over the pinned layer; a first ferromagnetic layer disposed over the barrier layer; a buffer layer disposed over the first ferromagnetic layer, the buffer layer including tantalum; a second ferromagnetic layer disposed over the buffer layer; and a top electrode disposed over the second ferromagnetic layer.

摘要翻译： 本公开提供一种半导体存储器件。 该器件包括在半导体衬底上的底部电极; 设置在底部电极上的反铁磁层; 设置在反铁磁层上的钉扎层; 设置在被钉扎层上的阻挡层; 设置在阻挡层上的第一铁磁层; 设置在所述第一铁磁层上的缓冲层，所述缓冲层包括钽; 设置在所述缓冲层上的第二铁磁层; 以及设置在第二铁磁层上的顶电极。

公开(公告)号：US20100193891A1

公开(公告)日：2010-08-05

申请号：US12756743

申请日：2010-04-08

申请人： Yung-Hung Wang ,  Yu-Jen Wang ,  Mark Juang ,  Chia-Shiung Tsai

发明人： Yung-Hung Wang ,  Yu-Jen Wang ,  Mark Juang ,  Chia-Shiung Tsai

IPC分类号： H01L29/82

CPC分类号： H01L27/228 ,  G11C11/161 ,  G11C11/1657 ,  G11C11/1659 ,  H01L43/08 ,  H01L43/12

摘要： A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.

摘要翻译： 形成集成电路的方法包括形成磁隧道结（MTJ）层; 蚀刻MTJ层以形成MTJ电池; 以及在MTJ电池的侧壁上形成电介质覆盖层，其中形成电介质覆盖层的步骤是用蚀刻MTJ层的步骤进行的。

公开(公告)号：US07692230B2

公开(公告)日：2010-04-06

申请号：US11674581

申请日：2007-02-13

申请人： Jhon Jhy Liaw ,  Yu-Jen Wang ,  Chia-Shiung Tsai

发明人： Jhon Jhy Liaw ,  Yu-Jen Wang ,  Chia-Shiung Tsai

IPC分类号： H01L27/108

CPC分类号： H01L43/12 ,  B82Y10/00 ,  G11C11/1655 ,  G11C11/1657 ,  G11C11/1659 ,  H01L27/228 ,  H01L43/08

摘要： Disclosed herein is an improved memory device wherein the area occupied by a conventional landing pad is significantly reduced to around 50% to 10% of the area occupied by conventional landing pads. This is accomplished by removing the landing pad from the cell structure, and instead forming a conductive via structure that provides the electrical connection from the memory stack or device in the structure to an under-metal layer. By forming only this via structure, rather than separate vias formed on either side of a landing pad, the overall width occupied by the connective via structure from the memory stack to an under-metal layer is substantially reduced, and thus the via structure and under-metal layer may be formed closer to the memory stack (or conductors associated with the stack) so as to reduce the overall width of the cell structure.

摘要翻译： 这里公开了一种改进的存储装置，其中由常规着陆垫占据的面积显着地减小到常规着陆垫占据的面积的大约50％至10％。 这是通过从电池结构中移除着陆焊盘而实现的，而是形成导电通孔结构，其提供从结构中的存储器堆或器件到下金属层的电连接。 通过仅形成该通孔结构，而不是形成在着陆焊盘的任一侧上的分离的通孔，结构通孔结构从存储器堆叠到下金属层占据的总宽度大大减小，因此通孔结构和下面 金属层可以形成为更靠近存储器堆叠（或与堆叠相关联的导体），以便减小电池结构的整体宽度。

公开(公告)号：US07688616B2

公开(公告)日：2010-03-30

申请号：US11764618

申请日：2007-06-18

申请人： Yu-Jen Wang ,  Hsu-Chen Chang ,  Denny Tang

发明人： Yu-Jen Wang ,  Hsu-Chen Chang ,  Denny Tang

IPC分类号： G11C11/00

CPC分类号： G11C11/1693 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675

摘要： Thus, the present disclosure provides a method of programming a memory array. At least one memory cell including a magnetic element is provided. At least one current source coupled to the magnetic element is provided. A unipolar current is supplied from the at least one current source to the magnetic element at a plurality of non-zero current levels.

摘要翻译： 因此，本公开提供了一种对存储器阵列进行编程的方法。 提供包括磁性元件的至少一个存储单元。 提供耦合到磁性元件的至少一个电流源。 单极电流从多个非零电流电平从至少一个电流源提供给磁性元件。

公开(公告)号：US07683447B2

公开(公告)日：2010-03-23

申请号：US11854478

申请日：2007-09-12

申请人： Yu-Jen Wang ,  Young-Shying Chen ,  Ya-Chen Kao ,  Chun-Jung Lin

发明人： Yu-Jen Wang ,  Young-Shying Chen ,  Ya-Chen Kao ,  Chun-Jung Lin

IPC分类号： H01L29/92

CPC分类号： B82Y10/00 ,  G11C11/15 ,  H01L27/228

摘要： A method for fabricating a magnetoresistive random access memory (MRAM) device having a plurality of memory cells includes: forming a fixed magnetic layer having magnetic moments fixed in a predetermined direction; forming a tunnel layer over the fixed magnetic layer; forming a free magnetic layer, having magnetic moments aligned in a direction that is adjustable by applying an electromagnetic field, over the tunnel layer; forming a hard mask on the free magnetic layer partially covering the free magnetic layer; and unmagnetizing portions of the free magnetic layer uncovered by the hard mask for defining one or more magnetic tunnel junction (MTJ) units.

摘要翻译： 一种制造具有多个存储单元的磁阻随机存取存储器（MRAM）器件的方法包括：形成具有固定在预定方向上的磁矩的固定磁性层; 在固定磁性层上形成隧道层; 在隧道层上形成具有通过施加电磁场可调整方向的磁矩的自由磁性层; 在部分覆盖自由磁性层的自由磁性层上形成硬掩模; 以及由硬掩模未覆盖的自由磁性层的非磁化部分，用于限定一个或多个磁性隧道结（MTJ）单元。

公开(公告)号：US20100067169A1

公开(公告)日：2010-03-18

申请号：US12209210

申请日：2008-09-12

申请人： Yu-Jen Wang

发明人： Yu-Jen Wang

IPC分类号： H01G4/002

CPC分类号： H01L23/5223 ,  H01L27/0207 ,  H01L28/87 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

摘要： A capacitor structure is disclosed. The capacitor structure includes at least a D1+ first-level array. The D1+ first-level array comprises three first D1+ conductive pieces and a second D1+ conductive piece. Two of the first D1+ conductive pieces are disposed in a first row of the D1+ first-level array, and the remaining first D1+ conductive piece and the second D1+ conductive piece are disposed in a second row of the D1+ first-level array from left to right. The adjacent first D1+ conductive pieces are connected to each other, and the first D1+ conductive pieces are not connected to the second D1+ conductive piece.

摘要翻译： 公开了一种电容器结构。 电容器结构至少包括一个D1 +一级阵列。 D1 +第一级阵列包括三个第一D1 +导电片和第二D1 +导电片。 第一D1 +导电片中的两个被布置在D1 +第一电平阵列的第一行中，并且剩余的第一D1 +导电片和第二D1 +导电片从左至右布置在D1 +第一电平阵列的第二行中 对。 相邻的第一D1 +导电片彼此连接，并且第一D1 +导电片不连接到第二D1 +导电片。

公开(公告)号：US20090141232A1

公开(公告)日：2009-06-04

申请号：US12266546

申请日：2008-11-06

申请人： Rung-Sheng Cheng ,  Yu-Jen Wang ,  Chien-Shien Yeh ,  Chao-Chang Hu

发明人： Rung-Sheng Cheng ,  Yu-Jen Wang ,  Chien-Shien Yeh ,  Chao-Chang Hu

IPC分类号： G02F1/1333 ,  G02F1/13 ,  G02B15/04

CPC分类号： G02B15/04 ,  G02B3/14 ,  G02B27/0025 ,  G02F1/29 ,  G02F2001/294

摘要： An optical lens module includes a support frame, a liquid crystal lens group, and a aberration compensation lens group. The aberration compensation lens compensates aberrations generated by the liquid crystal lenses. The liquid crystal lens group and the fixed aberration compensation lens group are disposed on the same optical axis. The optical lens module is power-saving, easily assembling, and has a small volume, which is helpful for miniaturizing and thinning optical lens modules, and thus further helpful for miniaturizing and thinning small-size or portable devices.

摘要翻译： 光学透镜模块包括支撑框架，液晶透镜组和像差补偿透镜组。 像差补偿透镜补偿由液晶透镜产生的像差。 液晶透镜组和固定像差补偿透镜组设置在相同的光轴上。 光学透镜模块省电，容易组装，体积小，有助于光学透镜模块的小型化和薄型化，从而进一步有助于小型化和小型化或便携式设备的小型化和薄型化。

公开(公告)号：US20090085132A1

公开(公告)日：2009-04-02

申请号：US11863130

申请日：2007-09-27

申请人： Ya Chen Kao ,  Chun-Jung Lin ,  Yu-Jen Wang ,  Hsu-Chen Cheng ,  Feng-Jia Shiu ,  Yung-Tao Lin

发明人： Ya Chen Kao ,  Chun-Jung Lin ,  Yu-Jen Wang ,  Hsu-Chen Cheng ,  Feng-Jia Shiu ,  Yung-Tao Lin

IPC分类号： H01L29/82

CPC分类号： H01L43/12 ,  B82Y10/00 ,  B82Y25/00 ,  G11C11/16 ,  H01L43/08

摘要： A MRAM cell structure includes a bottom electrode; a magnetic tunnel junction unit disposed on the bottom electrode; a top electrode disposed on the magnetic tunnel junction unit; and a blocking layer disposed on the top electrode, wherein the blocking layer is wider than the magnetic tunnel junction unit for preventing against formation of a short circuit between a contact and the magnetic tunnel junction unit.

摘要翻译： MRAM单元结构包括底电极; 设置在所述底部电极上的磁性隧道结单元; 设置在磁隧道结单元上的顶电极; 以及设置在所述顶部电极上的阻挡层，其中所述阻挡层比所述磁性隧道结单元宽，以防止在触点和所述磁性隧道结单元之间形成短路。

公开(公告)号：US20090065883A1

公开(公告)日：2009-03-12

申请号：US11854478

申请日：2007-09-12

申请人： Yu-Jen Wang ,  Young-Shying Chen ,  Ya-Chen Kao ,  Chun-Jung Lin

发明人： Yu-Jen Wang ,  Young-Shying Chen ,  Ya-Chen Kao ,  Chun-Jung Lin

IPC分类号： H01L29/82 ,  H01L21/00

CPC分类号： B82Y10/00 ,  G11C11/15 ,  H01L27/228

摘要： A method for fabricating a magnetoresistive random access memory (MRAM) device having a plurality of memory cells includes: forming a fixed magnetic layer having magnetic moments fixed in a predetermined direction; forming a tunnel layer over the fixed magnetic layer; forming a free magnetic layer, having magnetic moments aligned in a direction that is adjustable by applying an electromagnetic field, over the tunnel layer; forming a hard mask on the free magnetic layer partially covering the free magnetic layer; and unmagnetizing portions of the free magnetic layer uncovered by the hard mask for defining one or more magnetic tunnel junction (MTJ) units.

摘要翻译： 一种制造具有多个存储单元的磁阻随机存取存储器（MRAM）器件的方法包括：形成具有固定在预定方向上的磁矩的固定磁性层; 在固定磁性层上形成隧道层; 在隧道层上形成具有通过施加电磁场可调整方向的磁矩的自由磁性层; 在部分覆盖自由磁性层的自由磁性层上形成硬掩模; 以及由硬掩模未覆盖的自由磁性层的非磁化部分，用于限定一个或多个磁性隧道结（MTJ）单元。