CONNECTION SYSTEM OF SEMICONDUCTOR PACKAGES
    41.
    发明申请

    公开(公告)号:US20190043847A1

    公开(公告)日:2019-02-07

    申请号:US15973927

    申请日:2018-05-08

    Abstract: A connection system of semiconductor packages includes: a printed circuit board; a first semiconductor package disposed on a first surface of the printed circuit board and connected to the printed circuit board through first electrical connection structures; a second semiconductor package disposed on a second surface of the printed circuit board and connected to the printed circuit board through second electrical connection structures; and a third semiconductor package disposed on the first semiconductor package and connected to the first semiconductor package through third electrical connection structures. The first semiconductor package includes an application processor (AP), the second semiconductor package includes a memory, and the third semiconductor package includes a power management integrated circuit (PMIC).

    FAN-OUT SEMICONDUCTOR PACKAGE MODULE
    42.
    发明申请

    公开(公告)号:US20190013300A1

    公开(公告)日:2019-01-10

    申请号:US15882440

    申请日:2018-01-29

    Abstract: A fan-out semiconductor package module includes: a core member having a first through hole and a second through hole; a semiconductor chip disposed in the first through hole, and having an active surface and an inactive surface opposite the active surface, the active surface having a connection pad disposed thereon; at least one first passive component disposed in the second through hole; a first encapsulant encapsulating the core member encapsulating at least a portion of each of the core member and the at least one first passive component; a second encapsulant encapsulating at least a portion of the inactive surface of the semiconductor chip; and a connection member disposed on the core member, the active surface of the semiconductor chip, and the at least one first passive component, and including a redistribution layer electrically connected to the connection pad and the at least one first passive component.

    FAN-OUT SEMICONDUCTOR PACKAGE
    43.
    发明申请

    公开(公告)号:US20180331054A1

    公开(公告)日:2018-11-15

    申请号:US16042644

    申请日:2018-07-23

    Abstract: A fan-out semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, an encapsulant sealing at least a portion of the inactive surface, a first connection member disposed on the active surface and including a redistribution layer and a first via electrically connecting the connection pad to the redistribution layer, a passivation layer disposed on the first connection member, and an under-bump metal layer including an external connection pad disposed on the passivation layer and a second via connecting the external connection pad to the redistribution layer. In a vertical direction, the first and second vias are disposed within the external connection pad and do not overlap each other.

    FAN-OUT SEMICONDUCTOR PACKAGE
    44.
    发明申请

    公开(公告)号:US20180233454A1

    公开(公告)日:2018-08-16

    申请号:US15955230

    申请日:2018-04-17

    Abstract: The present disclosure relates to a fan-out semiconductor package in which a plurality of semiconductor chips are stacked and packaged, and are disposed in a special form to be thus electrically connected to a redistribution layer of a connection member through vias rather than wires. The fan-out semiconductor package can further include a connection member having a through-hole, and at least one of the semiconductor chips can be disposed in the through-hole.

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