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78 条记录 (耗时 0.018 秒)

    CMOS-INVERTER-TYPE FREQUENCY DIVIDER CIRCUIT, AND MOBILE PHONE INCLUDING THE CMOS-INVERTER-TYPE FREQUENCY DIVIDER CIRCUIT
    51.
    发明申请
    CMOS-INVERTER-TYPE FREQUENCY DIVIDER CIRCUIT, AND MOBILE PHONE INCLUDING THE CMOS-INVERTER-TYPE FREQUENCY DIVIDER CIRCUIT 有权
    CMOS反相器型频率分路电路，以及包含CMOS变频器型频率分路电路的移动电话

    公开(公告)号：US20120058804A1

    公开(公告)日：2012-03-08

    申请号：US13321009

    申请日：2010-04-08

    申请人： Masakatsu Maeda ,  Mikihiro Shimada

    发明人： Masakatsu Maeda ,  Mikihiro Shimada

    IPC分类号： H04W88/02 ,  H03B19/12

    CPC分类号： H03K23/68 ,  G06F7/68 ,  H03K23/667

    摘要： The present invention provides a CMOS-inverter-type frequency divider circuit that can further reduce power consumption.The CMOS-inverter-type frequency divider circuit includes: a plurality of CMOS inverters that contribute to realizing a frequency division function; a frequency division control section for performing control such that some or all of the plurality of CMOS inverters are intermittently driven at the respective different timings in accordance with an input signal; and a drive power supplying section for supplying powers for driving the plurality of CMOS inverters, and for, based on state information indicating whether VCO sub band selection or normal transmission is performed, switching some or all of the powers for the plurality of CMOS inverters between the VCO sub band selection and the normal transmission.

    摘要翻译： 本发明提供一种可以进一步降低功耗的CMOS反相器型分频器电路。 CMOS反相器型分频器电路包括：有助于实现分频功能的多个CMOS反相器; 分频控制部分，用于执行控制，使得多个CMOS反相器中的一些或全部根据输入信号在各个不同的定时被间歇地驱动; 以及用于提供用于驱动多个CMOS反相器的电力的驱动电力供应部分，并且基于指示是否执行VCO子带选择还是正常传输的状态信息，将多个CMOS反相器的部分或全部功率切换到 VCO子频段选择和正常传输。

    Semiconductor devices and manufacturing method thereof
    53.
    发明授权
    Semiconductor devices and manufacturing method thereof 有权
    半导体器件及其制造方法

    公开(公告)号：US07879705B2

    公开(公告)日：2011-02-01

    申请号：US12440939

    申请日：2007-09-21

    申请人： Akira Kawahashi ,  Masahiro Sugimoto ,  Akinori Seki ,  Masakatsu Maeda ,  Yasuo Takahashi

    发明人： Akira Kawahashi ,  Masahiro Sugimoto ,  Akinori Seki ,  Masakatsu Maeda ,  Yasuo Takahashi

    IPC分类号： H01L21/28 ,  H01L21/44

    CPC分类号： H01L29/7802 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/78 ,  Y10S438/931

    摘要： A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form Al3Ti, and the second temperature is the minimum temperature of a temperature zone at which the Al3Ti reacts with SiC to form Ti3SiC2. As a result of this maintaining of temperature step, an Al3Ti-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the Al3Ti-layer to a temperature that is higher than the second temperature. As a result of this step of further heating the SiC substrate reacts with Al3Ti of the Al3Ti-layer to form a Ti3SiC2-layer on the surface of the SiC substrate.

    摘要翻译： 阐述了在SiC半导体层上形成具有良好特性的欧姆电极的方法。 在该方法中，在SiC衬底的表面上形成Ti层和Al层。 具有Ti层和Al层的SiC衬底保持在高于或等于第一温度并低于第二温度的温度，直到Ti层中的所有Ti都与Al反应。 第一个温度是Ti与Al反应形成Al3Ti的温度区的最低温度，第二个温度是Al3Ti与SiC反应形成Ti3SiC2的温度区的最低温度。 由于这种维持温度步骤的结果，在SiC衬底的表面上形成Al 3 Ti层。 该方法还包括将具有Al 3 Ti层的SiC衬底进一步加热到高于第二温度的温度。 作为进一步加热的步骤的结果，SiC衬底与Al 3 Ti层的Al 3 Ti反应以在SiC衬底的表面上形成Ti 3 SiC 2层。

    PLL oscillation circuit, polar transmitting circuit, and communication device
    54.
    发明授权
    PLL oscillation circuit, polar transmitting circuit, and communication device 失效
    PLL振荡电路，极性发射电路和通信装置

    公开(公告)号：US07839230B2

    公开(公告)日：2010-11-23

    申请号：US12469252

    申请日：2009-05-20

    申请人： Masakatsu Maeda ,  Takayuki Tsukizawa ,  Hiroyuki Yoshikawa ,  Shunsuke Hirano

    发明人： Masakatsu Maeda ,  Takayuki Tsukizawa ,  Hiroyuki Yoshikawa ,  Shunsuke Hirano

    IPC分类号： H03L5/00

    CPC分类号： H03L7/099 ,  H03C3/04 ,  H03C3/0925 ,  H03C3/0933 ,  H03C5/00 ,  H03L5/00

    摘要： Provided is a PLL oscillation circuit that can reduce the variability of modulation sensitivity of a VCO 101 and obtain a desired output amplitude quickly with high precision. An amplitude detector 103 detects an output amplitude of the VCO 101. An amplitude controller 105 controls a current value of a variable current source 109 so as to have an output amplitude of the VCO 101 detected by the amplitude detector 103 to be a desired amplitude. A LPF 108 is connected between the amplitude controller 105 and the variable current source 109. A switch 107 connects or disconnects the LPF 108 between the amplitude controller 105 and the variable current source 109. The amplitude controller 105 is connected to the variable current source 109 through either the LPF 108 or the switching switch 107.

    摘要翻译： 提供了一种PLL振荡电路，其可以降低VCO 101的调制灵敏度的可变性，并以高精度快速获得期望的输出幅度。 振幅检测器103检测VCO 101的输出幅度。振幅控制器105控制可变电流源109的电流值，使振幅检测器103检测到的VCO 101的输出幅度为期望幅度。 LPF 108连接在振幅控制器105和可变电流源109之间。开关107连接或断开振幅控制器105和可变电流源109之间的LPF108。振幅控制器105连接到可变电流源109 通过LPF 108或切换开关107。

    Modulation apparatus capable of correcting non-linearity of voltage controlled oscillator
    57.
    发明申请
    Modulation apparatus capable of correcting non-linearity of voltage controlled oscillator 失效
    能够校正压控振荡器的非线性的调制装置

    公开(公告)号：US20090010372A1

    公开(公告)日：2009-01-08

    申请号：US11822369

    申请日：2007-07-05

    申请人： Masakatsu Maeda

    发明人： Masakatsu Maeda

    IPC分类号： H03D3/24

    CPC分类号： H03C5/00 ,  H03C3/08

    摘要： A modulation apparatus 24 comprises a monitoring section 207 operable to monitor information about a control voltage applied to a VCO 201 as control voltage information, during any period, when a low-frequency signal having a frequency within a loop band of a PLL circuit is input at least before an LPF 209, a correction table storing section 206 operable to associate the control voltage information monitored by the monitoring section 207 as information about a control voltage after correction with information about a control voltage before correction, and store the associated information as a correction table, and a correction section 204 operable to correct a control voltage applied to the VCO 201 based on the correction table stored in the correction table storing section.

    摘要翻译： 调制装置24包括监视部207，该监视部207在输入了具有在PLL电路的环带内的频率的低频信号输入的任何时间段期间，监视与施加到VCO 201的控制电压有关的信息作为控制电压信息 至少在LPF 209之前，校正表存储部分206可操作以将由监视部分207监视的控制电压信息作为关于校正后的控制电压的信息与关于校正前的控制电压的信息相关联，并将相关信息存储为 校正表，以及校正部204，用于根据存储在校正表存储部中的校正表来校正施加到VCO201的控制电压。

    DIRECT MODULATION TYPE VOLTAGE-CONTROLLED OSCILLATOR USING MOS VARICAP
    58.
    发明申请
    DIRECT MODULATION TYPE VOLTAGE-CONTROLLED OSCILLATOR USING MOS VARICAP 有权
    使用MOS VARICAP的直接调制型电压控制振荡器

    公开(公告)号：US20080150648A1

    公开(公告)日：2008-06-26

    申请号：US11953345

    申请日：2007-12-10

    申请人： Masakatsu MAEDA

    发明人： Masakatsu MAEDA

    IPC分类号： H03B5/12

    CPC分类号： H03C3/225 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1253

    摘要： Transistors M11 and M12 are cross-coupled to each other so as to form a negative resistance circuit. First and second variable capacitor sections 10 and 20 are connected in parallel with an inductor circuit so as to form a parallel resonant circuit. A first reference voltage Vref1 and a control voltage VT1 corresponding to a carrier wave component are fed to both terminals, respectively, of each of variable capacitors VC11 and VC12 included in the first variable capacitor section 10. A second reference voltage Vref2 and a control voltage VT2 corresponding to a modulated wave component are fed to both terminals, respectively, of each of variable capacitors VC21 and VC22 included in the second variable capacitor section 20. ADC control section 30 includes a resistance R31 interposed between the second reference voltage Vref2 and a common connection point of resistances R21 and R22, and a capacitor C31 for feeding only an AC component included in the modulated wave component to the common connection point of the resistances R21 and R22. Thus, a DC voltage, on which the AC component included in the modulated wave component is superimposed, is changed from a certain DC bias to a DC bias of the second reference voltage Vref2.

    摘要翻译： 晶体管M 11和M 12彼此交叉耦合以形成负电阻电路。 第一和第二可变电容器部分10和20与电感器电路并联连接以形成并联谐振电路。 第一参考电压Vref 1和对应于载波分量的控制电压VT1分别馈送到包括在第一可变电容器部分10中的每个可变电容器VC 11和VC 12的两个端子。第二参考电压Vref 2和对应于调制波分量的控制电压VT 2分别馈送到包括在第二可变电容器部分20中的每个可变电容器VC 21和VC 22的两个端子.ADC控制部分30包括插入的电阻器R31 在第二参考电压Vref 2和电阻R 21和R 22的公共连接点之间，以及用于仅将包含在调制波分量中的AC分量馈送到电阻R 21和R 22的公共连接点的电容器C 31 因此，将包含在调制波分量中的交流分量叠加在其上的直流电压从一定的直流偏压改变为第二基准电压Vr的直流偏压 ef 2。