Abstract:
An electronic device includes a first circuit to generate an output control signal when a first voltage across a first capacitor receiving an input current exceeds a threshold voltage, in response to an input signal having a first logic level. The input current is proportional to a frequency of the input signal. A second circuit is to generate an output reset signal when a second voltage across a second capacitor receiving the input current exceeds the threshold voltage, in response to the input signal having a second logic level. A flip flop is to generate a signal output as having the first logic level in response to the output control signal, and to reset and generate the signal output as having the second logic level in response to the output reset signal.
Abstract:
An electronic device includes a first circuit to generate an output control signal when a first voltage across a first capacitor receiving an input current exceeds a threshold voltage, in response to an input signal having a first logic level. The input current is proportional to a frequency of the input signal. A second circuit is to generate an output reset signal when a second voltage across a second capacitor receiving the input current exceeds the threshold voltage, in response to the input signal having a second logic level. A flip flop is to generate a signal output as having the first logic level in response to the output control signal, and to reset and generate the signal output as having the second logic level in response to the output reset signal.
Abstract:
A voltage regulator includes a feedback regulation loop and a drive transistor configured to source current to a regulated output. A transient recovery circuit is coupled to the voltage regulator circuit and includes a first transistor coupled to source current into a control terminal of the drive transistor, wherein the source current is in addition to current sourced in response to operation of the feedback regulation loop. The first transistor is selectively actuated in response to a drop in voltage at the regulated output. The transient recovery circuit further includes a second transistor coupled to sink current from the regulated output. The sink current has a first non-zero magnitude in the quiescent operating mode of the regulator circuit. In response to an increase in voltage at the regulated output, the operation of the second transistor is modified to increase the sink current to a second, greater, non-zero magnitude.
Abstract:
A class-D amplifier includes a signal processing block. The signal processing block generates a first processed signal representing a difference between a first differential signal and a second differential signal, when a duty cycle of the first differential signal is greater than that of the second differential signal. The signal processing block generates the first processed signal representing a reference DC level, when the duty cycle of the first differential signal is less than that of the second differential signal. A second processed signal representing a difference between the second differential signal and the first differential signal is generated when the duty cycle of the second differential signal is greater than that of the first differential signal, and the second processed signal representing the reference DC level is generated when the duty cycle of the second differential signal is less than that of the first differential signal.
Abstract:
An electronic device may include leads, an IC having first and second bond pads, and an encapsulation material adjacent the leads and the IC so the leads extend to a bottom surface of the encapsulation material defining first contact pads. The electronic device may include bond wires between the first bond pads and corresponding ones of the leads, and conductors extending from corresponding ones of the second bond pads to the bottom surface of the encapsulation material defining second contact pads.
Abstract:
A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the output of the amplifier pair varies proportionally to a change of the power supply.
Abstract:
A failure diagnosis circuit includes a multiplexer and a controller. The multiplexer receives address signals, and selectively outputs one of the address signals to an addressable module in response to a selecting signal. The controller generates a first one of address signals and the selecting signal. A built-in self-test circuit generates the second address signal. The addressable module includes addressable components responsive to the address signal. The controller processes the output of the addressable module responsive to the address signal to make a failure diagnosis. The built-in self-test circuit performs signature analysis on the read out output of the addressable module.
Abstract:
A voltage regulator includes a feedback regulation loop and a drive transistor configured to source current to a regulated output. A transient recovery circuit is coupled to the voltage regulator circuit and includes a first transistor coupled to source current into a control terminal of the drive transistor, wherein the source current is in addition to current sourced in response to operation of the feedback regulation loop. The first transistor is selectively actuated in response to a drop in voltage at the regulated output. The transient recovery circuit further includes a second transistor coupled to sink current from the regulated output. The sink current has a first non-zero magnitude in the quiescent operating mode of the regulator circuit. In response to an increase in voltage at the regulated output, the operation of the second transistor is modified to increase the sink current to a second, greater, non-zero magnitude.
Abstract:
A digital circuit can be used in a speaker system. An intermediate node provides a speaker protection control signal. A first latch for receives an offset control signal. A first logic gate receives a play control signal, the offset control signal, and the speaker protection control signal. A second logic gate is coupled to the first latch for receiving the play control signal and the speaker protection control signal. A second latch is coupled to the first logic gate for providing a forced mute signal. A third latch is coupled to the second logic gate and to the intermediate node.
Abstract:
An active noise cancelling device including a sensor configured to convert acoustic signals into first audio signals and a speaker acoustically coupled to the sensor A control stage is configured to control the speaker based on the first audio signals to cause the speaker to produce cancelling acoustic waves that tend to suppress acoustic noise components in the acoustic signals. The control stage includes sigma-delta modulator digital filters.