摘要:
Integrated circuit chips and chip packages are disclosed that include an over-passivation scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the integrated circuit chip using a top post-passivation technology and a bottom structure technology. The integrated circuit chips can be connected to an external circuit or structure, such as ball-grid-array (BGA) substrate, printed circuit board, semiconductor chip, metal substrate, glass substrate or ceramic substrate, through the over-passivation scheme or the bottom scheme. Related fabrication techniques are described.
摘要:
An electronic device may include leads, an IC having first and second bond pads, and an encapsulation material adjacent the leads and the IC so the leads extend to a bottom surface of the encapsulation material defining first contact pads. The electronic device may include bond wires between the first bond pads and corresponding ones of the leads, and conductors extending from corresponding ones of the second bond pads to the bottom surface of the encapsulation material defining second contact pads.
摘要:
A semiconductor device package includes a land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads on the same side of the interposer substrate as the at least one semiconductor die. Terminal pads of the interposer substrate may be electrically connected to either or both of a peripheral array pattern of lands and to a central, two-dimensional array pattern of pads, both array patterns located on the opposing side of the interposer substrate from the at least one semiconductor die. Additional components, active, passive or both, may be connected to pads of the two-dimensional array to provide a system-in-a-package. Lead fingers of a lead frame may be superimposed on the opposing side of the interposer substrate, bonded directly to the land grid array land and wire bonded to pads as desired for repair or to ease routing problems on the interposer. The land grid array package may be mounted to a carrier substrate, and the lands wire bonded to conductive pads on the carrier substrate. Methods of fabrication are also disclosed.
摘要:
A terminal structure includes: a pillar containing a first metal material; and a cover layer covering an upper surface and a side surface of the pillar, the cover layer containing a second metal material into which a solder material diffuses more slowly than into the first metal material.And the terminal structure further includes a bonding layer over the cover layer, the bonding layer containing a metal material capable of solder bonding.
摘要:
A semiconductor device has a substrate having a first plurality of substrate bonding pads disposed on a bonding surface thereof. A plurality of semiconductor dice is disposed on the substrate. Each die of the plurality of dice has a first plurality of die bonding pads arranged along at least one first edge thereof. A plurality of bonding pillars extends substantially vertically from the substrate bonding pads. Each bonding pillar electrically connects one of the first plurality of substrate bonding pads to a corresponding one of the first plurality of die bonding pads. A method of assembling a semiconductor device is also described.
摘要:
Integrated circuit chips and chip packages are disclosed that include an over-passivation scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the integrated circuit chip using a top post-passivation technology and a bottom structure technology. The integrated circuit chips can be connected to an external circuit or structure, such as ball-grid-array (BGA) substrate, printed circuit board, semiconductor chip, metal substrate, glass substrate or ceramic substrate, through the over-passivation scheme or the bottom scheme. Related fabrication techniques are described.
摘要:
Methods, systems, and apparatuses for integrated circuit (IC) package vertical interconnection are described herein. In an aspect of the invention, an IC package includes an IC die with contact pads. The IC package also includes interconnect members which are coupled to the die at the contact pads. An encapsulating material encapsulates the IC die and the interconnect members such that a contact surface of each interconnect member is accessible at a surface of the encapsulating material. A second IC package is coupled to the first IC package through the plurality of interconnect members of the first IC package. In an example, solder balls attached to a bottom of the second IC package are coupled to the contact surfaces of the interconnect members to couple the first IC package and the second IC package.
摘要:
Light-emitting devices are described herein. A light-emitting device includes a hybridized device having a top surface and a bottom surface and a packaging substrate comprising a metal inlay in an opening in the packaging substrate and conductive vias. The metal inlay is thermally coupled to the bottom surface of the hybridized device. Conductive contacts are disposed on a bottom surface of the packaging substrate, each electrically coupled to one of the plurality of conductive vias. Conductive connectors electrically coupled between the top surface of the hybridized device and the top surface of the packaging substrate. Each of the conductive connectors is electrically coupled to a respective one of the conductive contacts on the bottom surface of the packaging substrate by a respective on of the conductive vias.
摘要:
A packaged IC device in which a die is sandwiched between first and second substrates such that (i) peripheral electrical contact pads of the die are wire bonded to the first substrate, e.g., for routing functional input/output signals, and (ii) core-area electrical contact pads of the die are connected to the second substrate in a flip-chip arrangement, e.g., for routing one or more power supply voltages to the core area of the die. The second substrate has a shape and position that (i) expose the peripheral electrical contact pads of the die for unencumbered machine-implemented wire bonding during the assembly process, and (ii) enable direct electrical connections between the first and second substrates outside the footprint of the die, e.g., by way of the corresponding solder bumps attached between the two substrates.