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65 条记录 (耗时 0.027 秒)

    Method for fabricating trench capacitors and semiconductor device with trench capacitors
    52.
    发明授权
    Method for fabricating trench capacitors and semiconductor device with trench capacitors 失效
    制造沟槽电容器的方法和具有沟槽电容器的半导体器件

    公开(公告)号：US06878600B2

    公开(公告)日：2005-04-12

    申请号：US10436426

    申请日：2003-05-12

    申请人： Albert Birner ,  Matthias Goldbach ,  Martin Franosch

    发明人： Albert Birner ,  Matthias Goldbach ,  Martin Franosch

    IPC分类号： H01L21/3063 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/20

    CPC分类号： H01L27/1087

    摘要： A method for fabricating trench capacitors having trenches with mesopores, the trench capacitors being suitable both for discrete capacitors and for integrated semiconductor memories, significantly increases the surface area for electrodes of the capacitors and, hence, the capacitance thereof. The mesopores, which are small woodworm-hole-like channels having diameters from approximately 2 to 50 nm, are fabricated electrochemically. It is, thus, possible to produce capacitances with a large capacitance-to-volume ratio. Growth of the mesopores stops, at the latest, when the mesopores reach a minimum distance from another mesopore or adjacent trench (self-passivation). As such, the formation of “short circuits” between two adjacent mesopores can be avoided in a self-regulated manner. Furthermore, a semiconductor device is provided including at least one trench capacitor on the front side of a semiconductor substrate fabricated by the method according to the invention.

    摘要翻译： 一种用于制造具有中孔的沟槽的沟槽电容器的方法，所述沟槽电容器适用于分立电容器和集成半导体存储器，显着增加了电容器的电极的表面积，并因此显着增加了其电容。 电化学地制造直径为约2〜50nm的小木蛾孔状通道的中孔。 因此，可以产生具有大的电容容积比的电容。 当介孔达到与另一个中孔或相邻沟槽的最小距离（自钝化）时，介孔的生长最终停止。 因此，可以以自我调节的方式避免在两个相邻介孔之间形成“短路”。 此外，提供一种半导体器件，其包括通过根据本发明的方法制造的半导体衬底的前侧上的至少一个沟槽电容器。

    Process for Simultaneous Deposition of Crystalline and Amorphous Layers with Doping
    56.
    发明申请
    Process for Simultaneous Deposition of Crystalline and Amorphous Layers with Doping 有权
    同时沉积具有掺杂的结晶和无定形层的方法

    公开(公告)号：US20110133188A1

    公开(公告)日：2011-06-09

    申请号：US13026326

    申请日：2011-02-14

    申请人： Herbert Schäfer ,  Martin Franosch ,  Thomas Meister ,  Josef Böck

    发明人： Herbert Schäfer ,  Martin Franosch ,  Thomas Meister ,  Josef Böck

    IPC分类号： H01L29/06

    CPC分类号： H01L21/02639 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02661

    摘要： One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy. In one embodiment of the present invention a preparation surface is formed, resulting in two distinct crystalline regions, a monocrystalline silicon substrate region and an isolating layer region. A monocrystalline silicon layer and an amorphous silicon layer are concurrently formed directly onto the preparation surface in the monocrystalline silicon substrate region and the isolating layer region, respectively. Deposition comprises the formation of two or more sub-layers. The process parameters can be varied for each individual sub-layer to optimize deposition characteristics.

    摘要翻译： 本发明的一个实施例涉及利用原位差分外延在半导体主体上同时沉积多个不同结晶结构的方法。 在本发明的一个实施方案中，形成制备表面，得到两个不同的结晶区域，单晶硅衬底区域和隔离层区域。 单晶硅层和非晶硅层同时直接分布在单晶硅衬底区域和隔离层区域的制备表面上。 沉积包括形成两个或更多个子层。 可以为每个单独的子层改变工艺参数以优化沉积特性。

    Method for producing a polymer structure on a substrate surface
    58.
    发明授权
    Method for producing a polymer structure on a substrate surface 有权
    在基板表面上制造聚合物结构的方法

    公开(公告)号：US07682777B2

    公开(公告)日：2010-03-23

    申请号：US11387055

    申请日：2006-03-22

    申请人： Martin Franosch ,  Andreas Meckes ,  Klaus-Guenter Oppermann

    发明人： Martin Franosch ,  Andreas Meckes ,  Klaus-Guenter Oppermann

    IPC分类号： G03F7/00

    CPC分类号： B81B7/0048 ,  B81C2203/0136

    摘要： A method for producing a polymer structure on a patterning region of a substrate surface includes the steps of depositing an adhesion layer having a first polymer material onto the substrate surface, patterning the adhesion layer such that the first polymer material of the adhesion layer is removed in a first region and the first polymer material of the adhesion layer remains in a second region including the patterning region, depositing a polymer layer of a second polymer material onto the substrate surface and the adhesion layer and patterning the polymer layer such that the polymer structure forms in the second region.

    摘要翻译： 在基板表面的图案化区域上制造聚合物结构的方法包括以下步骤：在基板表面上沉积具有第一聚合物材料的粘合层，图案化粘合层，使得粘合层的第一聚合物材料被去除 第一区域和粘合层的第一聚合物材料保留在包括图案化区域的第二区域中，将第二聚合物材料的聚合物层沉积到基底表面和粘合层上并且使聚合物层形成图案，使得聚合物结构形成 在第二个地区。

    Bulk Acoustic Wave Device and a Method of its Manufacturing
    59.
    发明申请
    Bulk Acoustic Wave Device and a Method of its Manufacturing 失效
    散装声波装置及其制造方法

    公开(公告)号：US20090295506A1

    公开(公告)日：2009-12-03

    申请号：US12130756

    申请日：2008-05-30

    申请人： Martin Handtmann ,  Martin Franosch

    发明人： Martin Handtmann ,  Martin Franosch

    IPC分类号： H03H9/205 ,  H01L41/22

    CPC分类号： H03H9/174 ,  H03H9/0207 ,  H03H9/02125 ,  H03H9/172 ,  H03H9/175 ,  H03H9/588 ,  H03H9/589 ,  Y10T29/42

    摘要： A BAW device includes a semiconductor substrate with a surface region, an insulating layer formed on the surface region and a piezoelectric layer sandwiched by a first and second electrode, wherein the second electrode is formed on the insulating layer. The surface region is performed such that a voltage dependence of a capacitance between the substrate and the second electrode is substantially suppressed.

    摘要翻译： BAW器件包括具有表面区域的半导体衬底，形成在表面区域上的绝缘层和由第一和第二电极夹在中间的压电层，其中第二电极形成在绝缘层上。 执行表面区域，使得基板和第二电极之间的电容的电压依赖性被基本上抑制。