公开(公告)号：US06884334B2

公开(公告)日：2005-04-26

申请号：US10041058

申请日：2001-12-28

申请人： Konstantin Volodarsky ,  Boguslaw A. Nigorski ,  Rimma Volodarsky ,  Douglas W. Young ,  Cyprian Uzoh ,  Homayoun Talieh

发明人： Konstantin Volodarsky ,  Boguslaw A. Nigorski ,  Rimma Volodarsky ,  Douglas W. Young ,  Cyprian Uzoh ,  Homayoun Talieh

IPC分类号： C25D7/12 ,  H01L21/00 ,  H01L21/02 ,  H01L21/3063 ,  C25D5/00

CPC分类号： H01L21/6719 ,  C25D7/12 ,  C25D17/001 ,  H01L21/67028 ,  Y10S134/902

摘要： The present invention relates to a containment chamber that is used for carrying out multiple processing steps such as depositing on, polishing, etching, modifying, rinsing, cleaning, and drying a surface on the workpiece. In one example of the present invention, the chamber is used to electro chemically mechanically deposit a conductive material on a semiconductor wafer. The same containment chamber can then be used to rinse and clean the same wafer. As a result, the present invention eliminates the need for separate processing stations for depositing the conductive material and cleaning the wafer. Thus, with the present invention, costs and physical space are reduced while providing an efficient apparatus and method for carrying out multiple processes on the wafer surface using a containment chamber.

摘要翻译： 本发明涉及一种用于进行多个处理步骤的容纳室，例如沉积，抛光，蚀刻，改性，漂洗，清洁和干燥工件上的表面。 在本发明的一个实例中，室用于在半导体晶片上化学机械地沉积导电材料。 然后可以使用相同的容纳室来冲洗和清洁相同的晶片。 结果，本发明消除了对用于沉积导电材料和清洁晶片的单独处理站的需要。 因此，利用本发明，降低了成本和物理空间，同时提供了使用容纳室在晶片表面上执行多个工艺的有效的装置和方法。

公开(公告)号：US20050040049A1

公开(公告)日：2005-02-24

申请号：US10914490

申请日：2004-08-10

申请人： Rimma Volodarsky ,  Konstantin Volodarsky ,  Cyprian Uzoh ,  Homayoun Talieh ,  Douglas Young

发明人： Rimma Volodarsky ,  Konstantin Volodarsky ,  Cyprian Uzoh ,  Homayoun Talieh ,  Douglas Young

IPC分类号： B23H7/00 ,  C25D5/08 ,  C25D7/12 ,  C25D17/10 ,  H01L21/288 ,  H01L21/768

CPC分类号： C25D17/001 ,  C25D5/08 ,  C25D17/008 ,  C25D17/10 ,  H01L21/2885 ,  H01L21/7684 ,  H01L21/76877

摘要： A particular anode assembly can be used to supply a solution for any of a plating operation, a planarization operation, and a plating and planarization operation to be performed on a semiconductor wafer. The anode assembly includes a rotatable shaft disposed within a chamber in which the operation is performed, an anode housing connected to the shaft, and a porous pad support plate attached to the anode housing. The support plate has a top surface adapted to support a pad which is to face the wafer, and, together with the anode housing, defines an anode cavity. A consumable anode may be provided in the anode cavity to provide plating material to the solution. A solution delivery structure by which the solution can be delivered to said anode cavity is also provided. The solution delivery structure may be contained within the chamber in which the operation is performed. A shield can also be mounted between the shaft and an associated spindle to prevent leakage of the solution from the chamber.

摘要翻译： 可以使用特定的阳极组件来提供用于在半导体晶片上进行的电镀操作，平面化操作和电镀和平面化操作中的任何一种的解决方案。 阳极组件包括设置在其中执行操作的室内的可旋转轴，连接到轴的阳极壳体和附接到阳极壳体的多孔垫支撑板。 支撑板具有适于支撑面向晶片的焊盘的顶表面，并且与阳极壳体一起限定阳极腔。 可以在阳极腔中设置消耗性阳极以向溶液提供电镀材料。 还提供了可以将溶液输送到所述阳极腔的溶液输送结构。 溶液输送结构可以包含在进行操作的室内。 护罩还可以安装在轴和相关主轴之间，以防止溶液从腔室泄漏。

公开(公告)号：US06815354B2

公开(公告)日：2004-11-09

申请号：US10282976

申请日：2002-10-28

申请人： Cyprian Uzoh ,  Bulent M. Basol ,  Homayoun Talieh

发明人： Cyprian Uzoh ,  Bulent M. Basol ,  Homayoun Talieh

IPC分类号： H01L2100

CPC分类号： H01L21/7684 ,  H01L21/76885 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A process for forming a conductive structure on a substrate is provided. The substrate has a copper seed layer that is partially exposed through a plurality of openings in a masking layer such as a photoresist. The masking layer is formed on the seed layer. The process electroplates copper through the openings and onto the seed layer. During the copper electroplating process the surface of the masking layer is mechanically swept. The process forms planar conductive material deposits filling the plurality of holes in the masking layer. The upper ends of the conductive deposits are substantially co-planar.

摘要翻译： 提供了在基板上形成导电结构的工艺。 衬底具有通过诸如光致抗蚀剂的掩模层中的多个开口部分暴露的铜籽晶层。 掩蔽层形成在种子层上。 该方法通过开口将铜电镀到种子层上。 在铜电镀过程中，屏蔽层的表面被机械扫掠。 该过程形成填充掩模层中的多个孔的平面导电材料沉积物。 导电沉积物的上端基本上是共面的。

公开(公告)号：US06610190B2

公开(公告)日：2003-08-26

申请号：US09760757

申请日：2001-01-17

申请人： Bulent M. Basol ,  Cyprian Uzoh ,  Homayoun Talieh

发明人： Bulent M. Basol ,  Cyprian Uzoh ,  Homayoun Talieh

IPC分类号： C25D508

CPC分类号： C25D5/02 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76877

摘要： A system for depositing materials on a surface of a wafer or removing materials from the surface of a wafer includes an electrode, a shaping plate, a liquid solution contained between the electrode and the wafer surface, and electrical contact members contacting selected locations on the wafer surface. The shaping plate is supported between the electrode and the wafer surface such that an upper surface of the shaping plate faces the wafer surface. The shaping plate can have a plurality of channels where each puts the wafer surface in a fluid communication with the electrode. The electrical contact members contact the selected locations on the wafer surface through a recessed edge of the shaping plate such that when the wafer is rotated, the selected contact locations move over the shaping plate and are plated under an applied potential. Advantages of the invention include substantially full surface treatment of the wafer.

摘要翻译： 用于在晶片的表面上沉积材料或从晶片表面去除材料的系统包括电极，成形板，包含在电极和晶片表面之间的液体溶液以及与晶片上的选定位置接触的电接触元件 表面。 成形板支撑在电极和晶片表面之间，使得成形板的上表面面向晶片表面。 成形板可以具有多个通道，其中每个通道将晶片表面与电极流体连通。 电接触构件通过成形板的凹入边缘接触晶片表面上的选定位置，使得当晶片旋转时，所选择的接触位置在成形板上移动并在施加电位下进行电镀。 本发明的优点包括晶片的基本全表面处理。

公开(公告)号：US06497800B1

公开(公告)日：2002-12-24

申请号：US09685934

申请日：2000-10-11

申请人： Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

发明人： Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

IPC分类号： C25D1700

CPC分类号： B23H3/04 ,  B23H5/08 ,  C25D5/08 ,  C25D17/00 ,  C25D17/001 ,  C25D17/005 ,  C25F7/00 ,  H01L21/2885

摘要： Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

摘要翻译： 可以通过包括第一和第二导电元件的特定装置来提供导电材料在包含导电材料的电解质的衬底的包括半导体晶片的表面上的基本均匀沉积。 第一导电元件可以具有相同或不同构造的多个电触点，或者可以是导电焊盘的形式，并且可以在基本上所有的衬底表面上与衬底表面接触或以其他方式电互连。 当在电解质与衬底表面和第二导电元件物理接触的同时在第一和第二导电元件之间施加电势时，导电材料沉积在衬底表面上。 可以使施加在阳极和阴极之间的电压的极性反转，从而可以对沉积的导电材料进行电蚀刻。

公开(公告)号：US06352623B1

公开(公告)日：2002-03-05

申请号：US09466014

申请日：1999-12-17

申请人： Konstantin Volodarsky ,  Boguslaw A. Nagorski ,  Rimma Volodarsky ,  Douglas W. Young ,  Cyprian Uzoh ,  Homayoun Talieh

发明人： Konstantin Volodarsky ,  Boguslaw A. Nagorski ,  Rimma Volodarsky ,  Douglas W. Young ,  Cyprian Uzoh ,  Homayoun Talieh

IPC分类号： C25B900

CPC分类号： H01L21/6719 ,  C25D7/12 ,  C25D17/001 ,  H01L21/67028 ,  Y10S134/902

摘要： The present invention relates to a containment chamber that is used for carrying out multiple processing steps such as depositing on, polishing, etching, modifying, rinsing, cleaning, and drying a surface on the workpiece. In one example of the present invention, the chamber is used to electro chemically mechanically deposit a conductive material on a semiconductor wafer. The same containment chamber can then be used to rinse and clean the same wafer. As a result, the present invention eliminates the need for separate processing stations for depositing the conductive material and cleaning the wafer. Thus, with the present invention, costs and physical space are reduced while providing an efficient apparatus and method for carrying out multiple processes on the wafer surface using a containment chamber.

公开(公告)号：US07329335B2

公开(公告)日：2008-02-12

申请号：US10459323

申请日：2003-06-10

申请人： Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

发明人： Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

IPC分类号： B23H3/00 ,  C25F3/30 ,  B23H7/12

CPC分类号： B23H3/04 ,  B23H5/08 ,  C25D5/08 ,  C25D17/00 ,  C25D17/001 ,  C25D17/005 ,  C25F7/00 ,  H01L21/2885

摘要： Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

摘要翻译： 可以通过包括第一和第二导电元件的特定装置来提供导电材料在包含导电材料的电解质的衬底的包括半导体晶片的表面上的基本均匀沉积。 第一导电元件可以具有相同或不同构造的多个电触点，或者可以是导电焊盘的形式，并且可以在基本上所有的衬底表面上与衬底表面接触或以其他方式电互连。 当在电解质与衬底表面和第二导电元件物理接触的同时在第一和第二导电元件之间施加电势时，导电材料沉积在衬底表面上。 可以使施加在阳极和阴极之间的电压的极性反转，从而可以对沉积的导电材料进行电蚀刻。

公开(公告)号：US07572354B2

公开(公告)日：2009-08-11

申请号：US11445594

申请日：2006-06-01

申请人： Cyprian Emeka Uzoh ,  Homayoun Talieh ,  Bulent Basol ,  Douglas W. Young

发明人： Cyprian Emeka Uzoh ,  Homayoun Talieh ,  Bulent Basol ,  Douglas W. Young

IPC分类号： C25B9/00 ,  C25D7/00

CPC分类号： B24B37/20 ,  B24B37/046 ,  B24B37/24 ,  B24B37/26 ,  C25D5/06 ,  C25D17/001 ,  C25D17/14 ,  C25F7/00 ,  H01L21/2885 ,  H01L21/76877

摘要： The present invention relates to methods and apparatus for plating a conductive material on a semiconductor substrate by rotating pad or blade type objects in close proximity to the substrate, thereby eliminating/reducing dishing and voids. This is achieved by providing pad or blade type objects mounted on cylindrical anodes or rollers and applying the conductive material to the substrate using the electrolyte solution disposed on or through the pads, or on the blades. In one embodiment of the invention, the pad or blade type objects are mounted on the cylindrical anodes and rotated about a first axis while the workpiece may be stationary or rotate about a second axis, and metal from the electrolyte solution is deposited on the workpiece when a potential difference is applied between the workpiece and the anode. In another embodiment of the present invention, the plating apparatus includes an anode plate spaced apart from the cathode workpiece. Upon application of power to the anode plate and the cathode workpiece, the electrolyte solution disposed in the plating apparatus is used to deposit the conductive material on the workpiece surface using cylindrical rollers having the pad or blade type objects.

摘要翻译： 本发明涉及通过旋转靠近基板的垫片或刀片型物体来在半导体衬底上镀覆导电材料的方法和装置，从而消除/减少凹陷和空隙。 这通过提供安装在圆柱形阳极或辊子上的垫片或刀片型物体，并使用设置在垫片上或穿过垫片上的电解质溶液将导电材料施加到衬底来实现。 在本发明的一个实施例中，衬垫或刀片型物体安装在圆柱形阳极上并围绕第一轴线旋转，同时工件可以是静止的或围绕第二轴线旋转，并且来自电解质溶液的金属沉积在工件上， 在工件和阳极之间施加电位差。 在本发明的另一实施例中，电镀装置包括与阴极工件间隔开的阳极板。 在向阳极板和阴极工件施加电力时，使用设置在电镀装置中的电解液将导电材料沉积在工件表面上，使用具有焊盘或刀片型物体的圆柱形辊。

公开(公告)号：US20060042934A1

公开(公告)日：2006-03-02

申请号：US11259694

申请日：2005-10-25

申请人： Homayoun Talieh ,  Bulent Basol

发明人： Homayoun Talieh ,  Bulent Basol

IPC分类号： C25D17/00

CPC分类号： H01L21/6715 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/67075

摘要： The present invention is directed to a method and apparatus for plating a surface of a semiconductor workpiece (wafer, flat panel, magnetic films, etc.) using a liquid conductor that makes contact with the outer surface of the workpiece. The liquid conductor is stored in a reservoir and pump through an inlet channel to the liquid chamber. The liquid conductor is injected into a liquid chamber such that the liquid conductor makes contact with the outer surface of the workpiece. An inflatable tube is also provided to prevent the liquid conductor from reaching the back face of the workpiece. A plating solution can be applied to the front face of the workpiece where a retaining ring/seal further prevents the plating solution and the liquid conductor from making contact with each other. In an alternative embodiment, electrical contacts may be formed using an inflatable tube that has either been coated with a conductive material or contains a conductive object. The inflatable tube further provides uniform contact and pressure along the periphery of the workpiece, which may not necessarily be perfectly flat, because the tube can conform according to the shape of the periphery of the workpiece. Further, the present invention can be used to dissolve/etch a metal layer from the periphery of the workpiece.

公开(公告)号：US06905588B2

公开(公告)日：2005-06-14

申请号：US09905335

申请日：2001-07-13

申请人： Cyprian Emeka Uzoh ,  Homayoun Talieh ,  Bulent Basol

发明人： Cyprian Emeka Uzoh ,  Homayoun Talieh ,  Bulent Basol

IPC分类号： C25D3/02 ,  C23C28/00 ,  C25D5/10 ,  C25D7/12 ,  H01L21/288 ,  H01L21/304 ,  H01L21/60 ,  H01L21/768 ,  C25D5/00 ,  B23H3/00

CPC分类号： C25D5/00 ,  C23C18/1608 ,  C23C18/165 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/1696 ,  C23C18/1848 ,  C23C18/31 ,  C25D5/02 ,  C25D5/10 ,  C25D5/22 ,  C25D5/34 ,  H01L21/2885 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76865 ,  H01L21/76871 ,  H01L21/76874 ,  H01L21/76876 ,  H01L21/76879 ,  H01L21/76885 ,  H01L24/11 ,  H01L2221/1089 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01057 ,  H01L2924/0106 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/3011

摘要： The present invention relates to a method for fabricating high performance chip interconnects and packages by providing methods for depositing a conductive material in cavities of a substrate in a more efficient and time saving manner. This is accomplished by selectively removing portions of a seed layer from a top surface of a substrate and then depositing a conductive material in the cavities of the substrate, where portions of the seed layer remains in the cavities. Another method includes forming an oxide layer on the top surface of the substrate such that the conductive material can be deposited in the cavities without the material being formed on the top surface of the substrate. The present invention also discloses methods for forming multi-level interconnects and the corresponding structures.

摘要翻译： 本发明涉及一种制造高性能芯片互连和封装的方法，该方法通过提供以更高效和省时的方式在衬底的空腔中沉积导电材料的方法。 这是通过从衬底的顶表面选择性地去除种子层的部分，然后在衬底的空腔中沉积导电材料，其中种子层的部分保留在空腔中。 另一种方法包括在衬底的顶表面上形成氧化物层，使得导电材料可以沉积在空腔中，而不会在衬底的顶表面上形成材料。 本发明还公开了用于形成多级互连的方法和相应的结构。