公开(公告)号：US20230251515A1

公开(公告)日：2023-08-10

申请号：US18134206

申请日：2023-04-13

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shingo EGUCHI ,  Hideaki KUWABARA ,  Kazune YOKOMIZO

IPC: G02F1/1333 ,  G09F9/30 ,  G09F9/46 ,  H01L29/786 ,  H05B33/02 ,  H10K59/50 ,  H10K50/11

CPC classification number: G02F1/133308 ,  G02F1/1333 ,  G09F9/30 ,  G09F9/301 ,  G09F9/46 ,  H01L29/786 ,  H05B33/02 ,  H10K59/50 ,  H10K50/11 ,  H01L29/78603 ,  H10K2102/311

Abstract: A semiconductor device including a large display portion with improved portability is provided. The display device includes a first display panel, a second display panel, and an adhesive layer. The area of the second display panel is larger than the area of the first display panel. The first display panel includes a first substrate, a second substrate, and a reflective liquid crystal element and a first transistor each positioned between the first substrate and the second substrate. The second display panel includes a first resin layer having flexibility, a second resin layer having flexibility, and a light-emitting element and a second transistor each positioned between the first resin layer and the second resin layer. The liquid crystal element has a function of reflecting light toward the second substrate side. The light-emitting element has a function of emitting light toward the second resin layer side. The first substrate and part of the second resin layer are bonded to each other with the adhesive layer.

公开(公告)号：US20220283654A1

公开(公告)日：2022-09-08

申请号：US17678159

申请日：2022-02-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki KUWABARA ,  Masaaki HIROKI

IPC: G06F3/044 ,  G06F1/16 ,  G06F3/04886 ,  G04G17/04 ,  G04G17/06 ,  G04G17/08 ,  H02J50/10 ,  G04B19/00

Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a support and a display portion. The support has a first curved surface. The display portion is provided over the support. The display portion has a top surface and a side surface in contact with at least one side of the top surface. The side surface has a second curved surface. The top surface includes a first display region. The side surface includes a second display region. The first display region and the second display region are continuously provided.

公开(公告)号：US20190088785A1

公开(公告)日：2019-03-21

申请号：US16121700

申请日：2018-09-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Masashi TSUBUKU ,  Kosei NODA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L29/26 ,  H01L23/66 ,  H01L27/12 ,  H01L27/088 ,  G06K19/077 ,  H01L29/66 ,  H01L29/24 ,  H01L21/8236 ,  G11C7/00 ,  G11C19/28 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US20180329367A1

公开(公告)日：2018-11-15

申请号：US16025064

申请日：2018-07-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki KUWABARA ,  Masaaki HIROKI

IPC: G04B19/00 ,  H02J7/02 ,  G06F3/0488 ,  G04G17/06 ,  G04G17/08 ,  G06F1/16 ,  H01L51/50 ,  G04G17/04 ,  G06F3/044 ,  H01L51/00 ,  H01M2/10

CPC classification number: G04B19/00 ,  G04G17/045 ,  G04G17/06 ,  G04G17/08 ,  G06F1/163 ,  G06F1/1652 ,  G06F3/044 ,  G06F3/04886 ,  G06F2203/04102 ,  G06F2203/04103 ,  H01L51/0097 ,  H01L51/50 ,  H01M2/1022 ,  H02J7/025

Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a support and a display portion. The support has a first curved surface. The display portion is provided over the support. The display portion has a top surface and a side surface in contact with at least one side of the top surface. The side surface has a second curved surface. The top surface includes a first display region. The side surface includes a second display region. The first display region and the second display region are continuously provided.

公开(公告)号：US20180011358A1

公开(公告)日：2018-01-11

申请号：US15698904

申请日：2017-09-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yukie SUZUKI ,  Hideaki KUWABARA ,  Hajime KIMURA

IPC: G02F1/1368 ,  H01L29/66 ,  H01L27/12 ,  G02F1/1339 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/1343 ,  H01L29/786 ,  H01L29/04 ,  H01L29/49 ,  H01L29/45

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/1339 ,  G02F1/134309 ,  G02F1/136286 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

公开(公告)号：US20170223442A1

公开(公告)日：2017-08-03

申请号：US15416098

申请日：2017-01-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki KUWABARA ,  Natsuko TAKASE

IPC: H04R1/10 ,  H02J50/10 ,  H02J7/02 ,  H05B37/02 ,  F21V33/00

CPC classification number: H04R1/1008 ,  F21V33/0056 ,  H02J7/025 ,  H02J50/10 ,  H04R1/028 ,  H04R1/1025 ,  H04R1/1041 ,  H04R1/1091 ,  H04R2420/07 ,  H05B37/0218 ,  H05B37/0227

Abstract: Headphones including a sound output unit, a processing unit, a memory unit, a lighting unit, and a detection unit are provided. The sound output unit is configured to output sound. The memory unit is configured to store a program. The lighting unit is configured to emit light in response to a signal supplied from the processing unit. The detection unit is configured to obtain detection information and supply a detection signal corresponding to the detection information to the processing unit. The processing unit is configured to read out the program, carry out an operation using the detection signal and the program, and supply a signal corresponding to an operation result to the lighting unit.

公开(公告)号：US20170125454A1

公开(公告)日：2017-05-04

申请号：US15347967

申请日：2016-11-10

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Toru TAKAYAMA ,  Junya MARUYAMA ,  Yuugo GOTO ,  Hideaki KUWABARA ,  Shunpei YAMAZAKI

IPC: H01L27/12 ,  H01L27/32 ,  H01L21/762 ,  B60R1/00 ,  H01L21/683

CPC classification number: H01L27/1266 ,  B60R1/00 ,  B60R11/0229 ,  B60R11/04 ,  B60R2011/004 ,  B60R2300/202 ,  B60R2300/802 ,  H01L21/6835 ,  H01L21/76251 ,  H01L27/1218 ,  H01L27/3244 ,  H01L2221/68318 ,  H01L2221/6835 ,  H01L2221/68363 ,  H01L2221/68386 ,  H01L2227/323 ,  H01L2227/326

Abstract: To provide a semiconductor device in which a layer to be peeled is attached to a base having a curved surface, and a method of manufacturing the same, and more particularly, a display having a curved surface, and more specifically a light-emitting device having a light emitting element attached to a base with a curved surface. A layer to be peeled, which contains a light emitting element furnished to a substrate using a laminate of a first material layer which is a metallic layer or nitride layer, and a second material layer which is an oxide layer, is transferred onto a film, and then the film and the layer to be peeled are curved, to thereby produce a display having a curved surface.

公开(公告)号：US20170084750A1

公开(公告)日：2017-03-23

申请号：US15368984

申请日：2016-12-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Miyuki HOSOBA ,  Junichiro SAKATA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L29/51 ,  H01L27/12

CPC classification number: H01L29/78606 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/1345 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2001/13606 ,  G02F2201/123 ,  G09G3/344 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/3262 ,  H01L29/45 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.

公开(公告)号：US20170077006A1

公开(公告)日：2017-03-16

申请号：US15343421

申请日：2016-11-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki KUWABARA

IPC: H01L23/10 ,  H01L27/32

CPC classification number: H01L23/10 ,  H01L27/3258 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

Abstract: An object is to realize a hermetically sealed package which ensures long-term airtightness inside the package by sealing using a substrate, or a sealing structure for reducing destruction caused by pressure from the outside. A frame of a semiconductor material is provided over a first substrate, which is bonded to a second substrate having a semiconductor element so that the semiconductor element is located inside the frame between the first substrate and the second substrate. The frame may be formed using, as frame members, two L-shaped semiconductor members in combination or four or more stick semiconductor members in combination.

Abstract translation: 目的是实现密封的包装，其通过使用基材的密封或用于减少由外部压力引起的破坏的密封结构来确保包装内部的长期气密性。 半导体材料的框架设置在第一基板上，第一基板被结合到具有半导体元件的第二基板，使得半导体元件位于第一基板和第二基板之间的框架内部。 框架可以组合使用两个组合的L形半导体构件或四个或更多个棒状半导体构件作为框架构件。

公开(公告)号：US20140252348A1

公开(公告)日：2014-09-11

申请号：US14282305

申请日：2014-05-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki KUWABARA ,  Kengo AKIMOTO ,  Toshinari SASAKI

IPC: H01L29/786 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/24 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78696

Abstract: An object is to increase field effect mobility of a thin film transistor including an oxide semiconductor. Another object is to stabilize electrical characteristics of the thin film transistor. In a thin film transistor including an oxide semiconductor layer, a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor is formed over the oxide semiconductor layer, whereby field effect mobility of the thin film transistor can be increased. Further, by forming a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor between the oxide semiconductor layer and a protective insulating layer of the thin film transistor, change in composition or deterioration in film quality of the oxide semiconductor layer is prevented, so that electrical characteristics of the thin film transistor can be stabilized.

Abstract translation: 目的是增加包括氧化物半导体的薄膜晶体管的场效应迁移率。 另一个目的是稳定薄膜晶体管的电特性。 在包括氧化物半导体层的薄膜晶体管中，在氧化物半导体层上形成具有比氧化物半导体更高的导电性的半导体层或导电层，由此可以提高薄膜晶体管的场效应迁移率。 此外，通过在氧化物半导体层和薄膜晶体管的保护绝缘层之间形成具有比氧化物半导体更高的导电性的半导体层或导电层，防止氧化物半导体层的组成变化或膜质量的劣化 ，使得薄膜晶体管的电特性能够稳定。