公开(公告)号：US5705463A

公开(公告)日：1998-01-06

申请号：US21797

申请日：1993-02-24

Applicant: Greg Roland Unruh

Inventor： Greg Roland Unruh

IPC: C11D7/24 ,  C11D7/26 ,  C11D7/28 ,  C11D7/32 ,  C11D7/34 ,  C11D7/50 ,  C23G5/02 ,  H05K3/26 ,  G01N31/22

CPC classification number: C11D7/262 ,  C11D7/261 ,  C11D7/5004 ,  C23G5/02 ,  H05K3/26 ,  C11D7/24 ,  C11D7/267 ,  C11D7/28 ,  C11D7/32 ,  C11D7/34 ,  H05K2201/0761 ,  H05K2203/121

Abstract: A composition and method for the removal of ionic salt deposits from a surface using an organic solvent of low polarity and a complexing agent. The complexing agent is chosen from a group which includes podands, cryptands, and coronands. The method provides nearly complete removal of ionic salt deposits with a single washing of the surface with the low polar cleaning mixture.

Abstract translation: 使用低极性的有机溶剂和络合剂从表面除去离子盐沉积物的组合物和方法。 络合剂选自包括podands，cryptands和coronand的组。 该方法通过用低极性清洗混合物对表面进行单次洗涤，几乎完全除去离子盐沉积物。

公开(公告)号：US5044073A

公开(公告)日：1991-09-03

申请号：US624539

申请日：1990-12-10

Applicant: Shuichi Ogasawara ,  Kazuo Kawanishi

Inventor： Shuichi Ogasawara ,  Kazuo Kawanishi

IPC: H05K3/06 ,  H05K3/10 ,  H05K3/18 ,  H05K3/26

CPC classification number: H05K3/26 ,  H05K2201/0761 ,  H05K2203/0783 ,  H05K2203/0793 ,  H05K3/108 ,  H05K3/184

Abstract: Disclosed herein is a process which makes it possible to greatly improve the insulation resistance between conductors on a printed-circuit board having a layer formed by electroless copper plating, and hence it provides a printed circuit board with extremely high reliability. According to the process, a printed-circuit board is formed by forming a metal coating film on a resin board by electroless plating after activation, etching the metal coating film, thereby forming printed conductors, and etching at least the exposed surface of the resin board which is not covered by the printed conductors.

Abstract translation: 这里公开了一种能够大大提高具有通过化学镀铜形成的层的印刷电路板上的导体之间的绝缘电阻的方法，因此提供了具有极高可靠性的印刷电路板。 根据该方法，通过在激活后通过无电解电镀在树脂板上形成金属涂膜形成印刷电路板，蚀刻金属涂膜，从而形成印刷导体，并至少蚀刻树脂板的露出表面 其不被印刷导体覆盖。

公开(公告)号：US4978422A

公开(公告)日：1990-12-18

申请号：US496337

申请日：1990-03-20

Applicant: Raymond A. Letize ,  David D. Sullivan ,  William R. Thomas ,  Thomas D. Murry

Inventor： Raymond A. Letize ,  David D. Sullivan ,  William R. Thomas ,  Thomas D. Murry

IPC: C23F1/00 ,  H05K3/06 ,  H05K3/10 ,  H05K3/26

CPC classification number: H05K3/26 ,  H05K2201/0761 ,  H05K2203/043 ,  H05K2203/0723 ,  H05K2203/0796 ,  H05K3/06 ,  H05K3/108

Abstract: After the etching away of copper to selectively expose surface areas of insulating material in a printed circuit process based upon copper foil-clad insulating substrate material, the exposed surface areas of insulating material are contacted with an aqueous alkaline permanganate solution to remove from the areas residual metal species associated therewith so as to improve the electrical resistance afforded by those areas in the printed circuit.

Abstract translation: 在基于铜箔包覆的绝缘衬底材料的印刷电路工艺中，在蚀刻掉铜以选择性地暴露绝缘材料的表面积之后，将绝缘材料的暴露表面积与碱性高锰酸盐溶液接触以从残留的区域中除去 与其相关联的金属物质，以便改善由印刷电路中的这些区域提供的电阻。

公开(公告)号：US4430154A

公开(公告)日：1984-02-07

申请号：US358226

申请日：1982-03-15

Applicant: Fritz Stahl ,  Horst Steffen

Inventor： Fritz Stahl ,  Horst Steffen

IPC: H05K3/18 ,  H05K3/10 ,  H05K3/26 ,  H05K3/38 ,  B44C1/22 ,  B29C17/08 ,  C03C15/00 ,  C03C25/06

CPC classification number: H05K3/26 ,  H05K2201/0761 ,  H05K2203/0796 ,  H05K2203/1407 ,  H05K3/108 ,  H05K3/184 ,  H05K3/387

Abstract: The present invention relates to a semi-additive or full-additive process for producing printed circuit or conductor boards having improved electrical resistance in which the coating of adhesive medium exposed between the trains of conductors is removed or partially removed without corroding the base material or copper of the conductor trains by a treatment with an alkaline permanganate or chromic acid solution and suitable washing steps carried out subsequently.

Abstract translation: 本发明涉及用于制造具有改进的电阻的印刷电路或导体板的半添加剂或全添加方法，其中暴露在导体列之间的粘合剂介质的涂层被去除或部分地除去而不腐蚀基材或铜 通过用碱性高锰酸盐或铬酸溶液处理并且随后进行的合适的洗涤步骤。

公开(公告)号：US20180074115A1

公开(公告)日：2018-03-15

申请号：US15261824

申请日：2016-09-09

Applicant: GENERAL ELECTRIC COMPANY

Inventor： Stephen Crynock

IPC: G01R31/28 ,  H05K1/02 ,  H05K1/18 ,  H05K3/20 ,  H05K3/30

CPC classification number: H05K1/0268 ,  G01R31/2805 ,  G01R31/2812 ,  G01R31/2818 ,  H05K2201/0761 ,  H05K2201/10151

Abstract: Presented is a residual ionic contamination measurement device. The device comprises a component body defining at least one surface, and conductive traces along at least one surface of the component body defining at least one connection configured to connect the conductive traces by at least one of direct and indirect means to an electrical parameter measurement device, the conductive traces configured to remain in a passive state until connected to the electrical parameter measurement device, wherein when the conductive traces are connected to the electrical parameter measurement device, a signal is generated indicative of a level of residual ionic contamination.

公开(公告)号：US09491858B2

公开(公告)日：2016-11-08

申请号：US14864895

申请日：2015-09-25

Applicant: FUJIFILM Corporation

Inventor： Yasushi Endo ,  Nobuyuki Tada ,  Kenji Naoi ,  Tomohito Asai ,  Hideo Ikeda ,  Michihiro Shibata

IPC: H05K1/09 ,  H05K1/11 ,  C09J133/26 ,  C08F220/18 ,  C09J133/08 ,  C09J133/10 ,  H05K1/02 ,  H05K3/28 ,  G06F3/044 ,  H05K3/46

CPC classification number: H05K1/11 ,  C08F220/18 ,  C09J133/08 ,  C09J133/10 ,  C09J133/26 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04112 ,  H05K1/0289 ,  H05K1/092 ,  H05K3/285 ,  H05K3/4673 ,  H05K2201/0108 ,  H05K2201/0761 ,  H05K2201/0769 ,  C08F2220/1858 ,  C08F220/20

Abstract: This wiring board is provided with: a plurality of metal wires disposed upon an insulating substrate; and a transparent adhesive agent layer which is disposed upon the metal wires, and which is in direct contact with the metal wires. The metal wires include: a first metal wire which has a pulse signal supplied thereto; and a second metal wire which has a fixed electric potential applied thereto. The pulse signal has a reference level identical to the fixed electric potential, and has a pulse train in which a plurality of pulses having a pulse width of not more than 3 msec are arranged, the integral time of the pulses in a period of 600 seconds being less than 60 seconds.

Abstract translation: 该布线板设置有：设置在绝缘基板上的多个金属线; 以及设置在金属线上并与金属线直接接触的透明粘合剂层。 金属线包括：具有供给脉冲信号的第一金属线; 以及施加有固定电位的第二金属线。 脉冲信号具有与固定电位相同的参考电平，并且具有脉冲序列，其中布置脉冲宽度不超过3毫秒的多个脉冲，脉冲在600秒的周期内的积分时间 小于60秒。

公开(公告)号：US09320151B2

公开(公告)日：2016-04-19

申请号：US13654253

申请日：2012-10-17

Applicant: General Electric Corporation

Inventor： Khanh Q. Nguyen

IPC: H05K3/30 ,  H01L23/32 ,  H01L23/495

CPC classification number: H05K3/306 ,  H01L23/32 ,  H01L23/49562 ,  H01L2924/0002 ,  H05K1/0256 ,  H05K3/3447 ,  H05K2201/0761 ,  H05K2201/10424 ,  H01L2924/00

Abstract: A sleeve structure includes an electrically insulating protective sleeve having clips that retain and capture component pins and regulate a mounting distance of the electrical component from a wiring structure. A method of component wiring assembly is also included.

Abstract translation: 套筒结构包括电绝缘保护套筒，其具有保持并捕获部件销并且调节电气部件与布线结构的安装距离的夹子。 还包括组件接线组件的方法。

公开(公告)号：US20150070854A1

公开(公告)日：2015-03-12

申请号：US14388594

申请日：2013-03-22

Applicant: PHOENIX CONTACT GMBH & CO., KG

Inventor： Frank Best ,  Marco Seelig

IPC: H01R12/71 ,  H05K5/02 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00

CPC classification number: H01R12/71 ,  H01R9/26 ,  H05K1/0256 ,  H05K1/0306 ,  H05K3/0011 ,  H05K5/0247 ,  H05K7/1469 ,  H05K2201/0761 ,  H05K2201/09063 ,  H05K2201/10189 ,  Y10T29/49124

Abstract: The invention relates to an arrangement for increasing the insulation coordination between at least two electric potentials on a printed circuit board (2), said arrangement comprising the printed circuit board (2) and an insulation barrier (3), wherein the printed circuit board (2) has an opening (7) between the electric potentials, and the insulation barrier (3) is disposed on the printed circuit board (2) so as to be displaceble through the opening (7) and is designed such that the isolating distance between the two electric potentials can be enlarged by displacing the insulation barrier (3) relative to the printed circuit board (2). The arrangement makes it possible obtain a high packing density on the printed circuit board (2).

Abstract translation: 本发明涉及一种用于增加印刷电路板（2）上的至少两个电位之间的绝缘配合的装置，所述装置包括印刷电路板（2）和绝缘屏障（3），其中印刷电路板 2）在电位之间具有开口（7），并且绝缘屏障（3）设置在印刷电路板（2）上，以便通过开口（7）移动，并且被设计成使得隔离距离 可以通过相对于印刷电路板（2）移动绝缘屏障（3）来扩大两个电位。 该布置使得可以在印刷电路板（2）上获得高的堆积密度。

公开(公告)号：US20140152449A1

公开(公告)日：2014-06-05

申请号：US13705224

申请日：2012-12-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Levente Klein ,  Prabjit Singh ,  Jing Zhang

IPC: G08B21/18

CPC classification number: H05K1/0268 ,  G01N17/04 ,  H05K2201/0761

Abstract: Apparatus and method for directly detecting the atmospheric conditions leading to creep corrosion of printed circuit boards (PCBs) well before the PCBs in the computers start suffering from creep corrosion. The embodiment indicates the propensity of the air towards creep corrosion on PCBs. Additionally, to avoid the false reading due to condensed moisture, condensed moisture may be avoided by using a heater attached to the creep corrosion monitor that keeps the creep corrosion monitor above the dew point temperature.

Abstract translation: 在计算机中PCBs开始遭受蠕变腐蚀之前，直接检测导致印刷电路板（PCB）蠕变腐蚀的大气条件的装置和方法。 该实施例表示空气在PCB上的蠕变腐蚀倾向。 另外，为了避免由于冷凝水分引起的错误读数，可以通过使用附着在蠕变腐蚀监测器上的加热器来避免冷凝的水分，从而使蠕变腐蚀监测器保持在露点温度以上。

公开(公告)号：US20130058062A1

公开(公告)日：2013-03-07

申请号：US13697720

申请日：2011-05-26

Applicant: Kenya Tachibana ,  Teppei Ito ,  Yasuaki Mitsui

Inventor： Kenya Tachibana ,  Teppei Ito ,  Yasuaki Mitsui

IPC: H05K3/10 ,  H05K7/06 ,  H05K1/09

CPC classification number: H05K3/108 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/1689 ,  C23C18/1844 ,  C23C18/2006 ,  C23C18/2086 ,  C23C18/22 ,  C23C18/30 ,  C23C18/34 ,  C23C18/36 ,  C23C18/44 ,  C25D5/022 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/244 ,  H05K3/387 ,  H05K2201/0761 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A method for manufacturing a base material having a gold-plated metal fine pattern is disclosed, comprising the steps of preparing a base material having a supporting surface made of a resin; forming a primer resin layer having surface roughness of 0.5 μm or less on the supporting surface, and forming a metal fine pattern thereon by an SAP process to obtain a base material having a metal fine pattern; and applying a gold-plating treatment to at least one part of a surface of the metal fine pattern; wherein the base material having a metal fine pattern is subjected to a palladium removal treatment in an optional stage before carrying out the gold-plating treatment.

Abstract translation: 公开了一种具有镀金属精细图案的基材的制造方法，包括制备具有由树脂制成的支撑面的基材的工序; 在支撑面上形成表面粗糙度为0.5μm以下的底漆树脂层，通过SAP工序在其上形成金属微细图案，得到具有金属微细图案的基材; 对所述金属精细图案的表面的至少一部分进行镀金处理; 其中，在进行镀金处理之前，在任意阶段对具有金属精细图案的基材进行脱钯处理。