公开(公告)号：US20150025827A1

公开(公告)日：2015-01-22

申请号：US14509920

申请日：2014-10-08

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Maxime Teissier ,  Cyril Troise

IPC: G01B7/14 ,  G01B7/00

CPC classification number: G01B7/14 ,  G01B7/003 ,  G01V3/088 ,  H03K17/945 ,  H03K17/955 ,  H03K2217/960705

Abstract: The disclosure relates to a method of detecting an object using a detection signal supplied by a proximity sensor. The method comprises the steps of generating a reference signal by filtering the value of the detection signal, defining a first detection threshold, and going from an object non-detecting state to an object detecting state when the value of the detection signal becomes greater than the first detection threshold. When the value of the detection signal becomes greater than the first detection threshold, the value of the reference signal is readjusted in a manner such that the value of the detection signal again becomes less than or respectively greater than, the first detection threshold.

Abstract translation: 本公开涉及使用由接近传感器提供的检测信号来检测物体的方法。 该方法包括以下步骤：当检测信号的值变得大于所述检测信号的值时，通过对检测信号的值进行滤波，定义第一检测阈值以及从对象非检测状态转变为对象检测状态来产生参考信号 第一检测阈值。 当检测信号的值变得大于第一检测阈值时，以使得检测信号的值再次变得小于或分别大于第一检测阈值的方式重新调整参考信号的值。

公开(公告)号：US20150016188A1

公开(公告)日：2015-01-15

申请号：US14315401

申请日：2014-06-26

Applicant: STMicroelectronics (Rousset) SAS

Inventor： François Tailliet ,  Marc Battista

IPC: G11C14/00

CPC classification number: G11C14/0063 ,  G11C7/1006 ,  G11C16/0408 ,  G11C16/3418

Abstract: A method can be used for managing the operation of a memory cell that includes an SRAM elementary memory cell and a non-volatile elementary memory cell coupled to one another. A data bit is transferred between the SRAM elementary memory cell and the non-volatile elementary memory cell. A control datum is stored in a control memory cell that is functionally analogous to and associated with the memory cell. The data bit is read from the SRAM elementary memory cell and a corresponding read of the control datum is performed. The data bit read from the SRAM elementary memory cell is inverted if the control datum has a first value but the data bit read from the SRAM elementary memory cell is not inverted if the control datum has a second value.

Abstract translation: 一种方法可用于管理包括彼此耦合的SRAM基本存储单元和非易失性基本存储单元的存储单元的操作。 数据位在SRAM单元存储单元和非易失性单元存储单元之间传送。 控制数据被存储在功能上类似于存储器单元并与其相关联的控制存储器单元中。 从SRAM基本存储单元读取数据位，并执行相应的控制数据读取。 如果控制数据具有第一值，则从SRAM基本存储器单元读取的数据位被反转，但是如果控制数据具有第二值，则从SRAM基本存储单元读取的数据位不反转。

公开(公告)号：US20140372327A1

公开(公告)日：2014-12-18

申请号：US14305070

申请日：2014-06-16

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Denis Farison ,  Fabrice Romain ,  Christophe Laurencin

IPC: G06Q30/00

CPC classification number: G06Q30/018 ,  G06F3/12 ,  G06F21/44 ,  G06F21/608 ,  G06F21/73

Abstract: The authenticity of a product associated with a host device is verified through a process. The product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The process involves, in a first phase, the sending by the host device of a control signal for executing a function, with the product functioning to decipher the function and store the unciphered function in the non-volatile memory. The process further involves, in a second phase, the sending by the host device of a control signal for causing execution of the deciphered function, with the product functioning to execute the function and send a result of this execution back to the host device. The host device evaluates the received result to verify product authenticity.

Abstract translation: 通过一个过程验证与主机设备相关联的产品的真实性。 该产品在非易失性存储器的段中包含以加密方式存储的若干不同功能。 该过程在第一阶段涉及由主机设备发送用于执行功能的控制信号，其中产品用于解密功能并将未加密功能存储在非易失性存储器中。 该过程还包括在第二阶段中由主机设备发送用于执行解密功能的控制信号，其中产品用于执行功能并将该执行的结果发送回主机设备。 主机设备评估接收到的结果以验证产品的真实性。

公开(公告)号：US20140362640A1

公开(公告)日：2014-12-11

申请号：US14293860

申请日：2014-06-02

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Francois Tailliet

IPC: G11C16/14

CPC classification number: G11C16/14 ,  G11C11/5635 ,  G11C16/0483 ,  G11C16/16

Abstract: A method for erasing a page-erasable EEPROM-type memory includes: the memory receiving a command associated with a set of addresses of pages of the memory to be erased, each page comprising several memory cell groups each forming a word, for each address of the set of addresses, selecting a word line corresponding to a page of the memory, and triggering the simultaneous erasing of all the selected word lines.

Abstract translation: 擦除可擦除可擦除EEPROM型存储器的方法包括：存储器接收与要擦除的存储器的页面的一组地址相关联的命令，每个页面包括几个存储单元组，每个存储单元组形成一个单词，每个地址为 所述地址集合，选择与所述存储器的页面对应的字线，并且触发所有所选字线的同时擦除。

公开(公告)号：US08902600B2

公开(公告)日：2014-12-02

申请号：US13765064

申请日：2013-02-12

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Albert Martinez ,  Pascal Fornara

IPC: H05K5/00 ,  H05K1/02 ,  H01G5/16 ,  H01H1/00 ,  H01H59/00 ,  H05K3/30 ,  H01G5/04

CPC classification number: H05K1/02 ,  H01G5/04 ,  H01G5/16 ,  H01H1/0036 ,  H01H59/0009 ,  H05K3/30 ,  Y10T29/49155

Abstract: A thermally deformable assembly is formed in an integrated-circuit metallization level. The physical behavior of the metal forming the assembly brings the assembly into contact with a stop-forming body when subjected to a temperature change caused by a current flow. A natural rollback to the initial configuration in which the assembly is a certain distance away from the body is prevented. The state or configuration of the assembly is determined by a capacitive reader.

Abstract translation: 热变形组件形成在集成电路金属化层中。 形成组件的金属的物理行为使得组件在受到由电流引起的温度变化时与停止成形体接触。 防止组装距离身体一定距离的初始构造的自然回滚。 组件的状态或配置由电容式读取器确定。

公开(公告)号：US08896368B2

公开(公告)日：2014-11-25

申请号：US14090843

申请日：2013-11-26

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Gilles Bas ,  Christophe Moreaux ,  Gary Seigneuret

IPC: G05F1/10

CPC classification number: G05F1/10 ,  G06K19/0713

Abstract: An electromagnetic transponder includes an antenna circuit, a load, and a charge pump transistor having a current path coupled between the antenna circuit and the load. During operation, a retromodulated signal is transmitted at a first level by biasing the charge pump transistor during a first time period such that an impedance of the antenna circuit has a first impedance value and current flows from the antenna circuit to the load. A retromodulated signal at a second level is transmitted by biasing the charge pump transistor during a second time period such that the impedance of the antenna circuit has a second impedance value different than the first impedance value and current flows from the antenna circuit to the load. The retromodulated signals are transmitted at the first and second levels in a sequence determined to transmit information from the electromagnetic transponder.

Abstract translation: 电磁应答器包括天线电路，负载和电荷泵晶体管，其具有耦合在天线电路和负载之间的电流路径。 在操作期间，通过在第一时间期间偏置电荷泵晶体管，以使得天线电路的阻抗具有第一阻抗值并且电流从天线电路流向负载，通过在第一电平上传输重新校正的信号。 通过在第二时间段期间偏置电荷泵晶体管来传输第二电平的重新调制信号，使得天线电路的阻抗具有与第一阻抗值不同的第二阻抗值，并且电流从天线电路流向负载。 重新校正的信号以确定为从电磁应答器发送信息的顺序在第一和第二电平处发送。

公开(公告)号：US08884289B2

公开(公告)日：2014-11-11

申请号：US14185310

申请日：2014-02-20

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Pascal Fornara ,  Christian Rivero ,  Antonio di-Giacomo

IPC: H01L23/58 ,  G01K5/48 ,  B81B3/00 ,  H01H37/52 ,  G01K3/00

CPC classification number: H01H37/52 ,  B81B3/0024 ,  G01K3/005 ,  G01K5/486 ,  H01L23/58 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit comprising a mechanical device for electrical switching comprising a first assembly being thermally deformable and having a beam held at at least two different locations by at least two arms, the beam and the arms being metal and disposed within the same metallization level, and further comprising at least one electrically conducting body. The first assembly has a first configuration at a first temperature and a second configuration at a second temperature different from the first temperature. The beam is out of contact with the electrically conducting body in one configuration in contact with the body in the other configuration. The beam establishes or breaks an electrical link passing through the said at least one electrically conducting body and through the said beam in the different configurations.

公开(公告)号：US20140291858A1

公开(公告)日：2014-10-02

申请号：US14221401

申请日：2014-03-21

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Guilhem BOUTON ,  Patrick Regnier

IPC: H01L21/033 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/528 ,  G03F1/38 ,  G03F1/50 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76816 ,  H01L23/522 ,  H01L23/5226 ,  H01L24/09 ,  H01L2224/0603 ,  H01L2224/0812 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for making a photolithography mask for formation of electrically conducting contact pads between tracks of a metallization level and electrically active zones of integrated circuits formed on a semiconductor wafer includes forming a first mask region including first opening zones intended for the formation of the contact pads. The first opening zone has a first degree of opening that is below a threshold. A second mask region including additional opening zones is formed, with the overall degree of opening of the mask being greater than or equal to the threshold.

Abstract translation: 一种制造用于在金属化层的轨道之间形成导电接触焊盘的光刻掩模的方法和形成在半导体晶片上的集成电路的电活性区域的方法包括形成第一掩模区域，其包括用于形成接触焊盘的第一开口区域 。 第一开口区具有低于阈值的第一开度。 形成包括附加开口区域的第二掩模区域，其中掩模的总体开度大于或等于阈值。

公开(公告)号：US20140191578A1

公开(公告)日：2014-07-10

申请号：US14147814

申请日：2014-01-06

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jimmy Fort ,  Fabrice Marinet

IPC: G05F1/46

CPC classification number: G05F1/462 ,  G06F1/26 ,  G06F1/3237 ,  G06F21/755 ,  Y02D10/128 ,  Y10T307/549

Abstract: The current signature of an electronic function is masked by controlling a current source that supplies power for the electronic function is controlled in a dynamically-varying manner. Excess current is detected and compared to a threshold. If the detected excess current meets the threshold, the operation of the electronic function is modified, for example by controlling a clock.

Abstract translation: 通过控制以动态变化的方式控制为电子功能供电的电流源，屏蔽电子功能的当前签名。 检测到过多的电流并将其与阈值进行比较。 如果检测到的过电流满足阈值，则例如通过控制时钟来修改电子功能的操作。

公开(公告)号：US20140191178A1

公开(公告)日：2014-07-10

申请号：US14150592

申请日：2014-01-08

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Philippe Boivin

IPC: H01L27/24 ,  H01L29/792 ,  H01L29/66

CPC classification number: H01L29/66666 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/2253 ,  H01L21/2257 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/10876 ,  H01L27/2454 ,  H01L29/0676 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7827 ,  H01L29/7883 ,  H01L29/7889 ,  H01L29/7926

Abstract: The disclosure relates to a method of fabricating a vertical MOS transistor, comprising the steps of: forming, above a semiconductor surface, a conductive layer in at least one dielectric layer; etching a hole through at least the conductive layer, the hole exposing an inner lateral edge of the conductive layer and a portion of the semiconductor surface; forming a gate oxide on the inner lateral edge of the conductive layer and a bottom oxide on the portion of the semiconductor surface; forming an etch-protection sidewall on the lateral edge of the hole, the sidewall covering the gate oxide and an outer region of the bottom oxide, leaving an inner region of the bottom oxide exposed; etching the exposed inner region of the bottom oxide until the semiconductor surface is reached; and depositing a semiconductor material in the hole.

Abstract translation: 本发明涉及一种制造垂直MOS晶体管的方法，包括以下步骤：在半导体表面之上形成至少一个电介质层中的导电层; 通过至少导电层蚀刻孔，所述孔暴露所述导电层的内侧边缘和所述半导体表面的一部分; 在导电层的内侧边缘上形成栅极氧化物，在半导体表面的部分上形成底部氧化物; 在所述孔的侧边缘上形成蚀刻保护侧壁，所述侧壁覆盖所述栅极氧化物和所述底部氧化物的外部区域，留下所述底部氧化物的内部区域; 蚀刻底部氧化物的暴露的内部区域，直到达到半导体表面; 以及在所述孔中沉积半导体材料。