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公开(公告)号:US12199131B2
公开(公告)日:2025-01-14
申请号:US17855521
申请日:2022-06-30
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Laurent Gay , Frederic Lalanne , Yann Henrion , Francois Guyader , Pascal Fonteneau , Aurelien Seignard
IPC: H01L27/146
Abstract: Image sensors and methods of manufacturing image sensors are provided. One such method includes forming a structure that includes a semiconductor layer extending from a front side to a back side, and a capacitive insulation wall extending through the semiconductor layer. The capacitive insulation wall includes first and second insulating walls separated by a region of a conductor or a semiconductor material. Portions of the semiconductor layer and the region of the conductor or semiconductor material are selectively etched, and the first and second insulating walls have portions protruding outwardly beyond a back side of the semiconductor layer and of the region of the conductor or semiconductor material. A dielectric passivation layer is deposited on the back side of the structure, and portions of the dielectric passivation layer are locally removed on a back side of the protruding portions of the first and second insulating walls.
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公开(公告)号:US12167703B2
公开(公告)日:2024-12-10
申请号:US18321347
申请日:2023-05-22
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Remy Berthelon , Franck Arnaud
Abstract: An electronic chip includes at least a first array of first elementary cells and a second array of second elementary cells. The first and second elementary cells form two types of phase change memory having a storage element formed by a volume of phase change material having either a crystalline state or an amorphous state depending on the bit stored. Each first elementary cell includes a volume of a first phase change material, and each second elementary cell includes a volume of a second phase change material that is different from the first material. Each elementary cell includes a heating connector configured for the passage of a heating current adapted to cause a phase change of the volume of phase change material of the elementary cell.
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公开(公告)号:US20240405146A1
公开(公告)日:2024-12-05
申请号:US18799088
申请日:2024-08-09
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Antonin ZIMMER , Dominique GOLANSKI , Raul Andres BIANCHI
IPC: H01L31/107
Abstract: A photodiode is formed in a semiconductor substrate of a first conductivity type. The photodiode includes a first region having a substantially hemispherical shape and a substantially hemispherical core of a second conductivity type, different from the first conductivity type, within the first region. An epitaxial layer covers the semiconductor substrate and buries the first region and core.
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公开(公告)号:US20240380999A1
公开(公告)日:2024-11-14
申请号:US18781479
申请日:2024-07-23
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois ROY , Thomas DALLEAU
Abstract: An image sensor includes a pixel array where each pixel is formed in a portion of a substrate electrically insulated from other portions of the substrate. Each pixel includes a photodetector; a transfer transistor; and a readout circuit comprising one or a plurality of transistors. The transistors of the readout circuit are formed inside and on top of at least one well of the portion. The reading from the photodetector of a pixel of a current row uses at least one transistor of the readout circuit of a pixel of at least one previous row, the well of the pixel of the previous row being biased with a first voltage greater than a second bias voltage of the well of the pixel of the current row.
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公开(公告)号:US12087873B2
公开(公告)日:2024-09-10
申请号:US17702186
申请日:2022-03-23
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Antonin Zimmer , Dominique Golanski , Raul Andres Bianchi
IPC: H01L31/107
CPC classification number: H01L31/107
Abstract: A photodiode is formed in a semiconductor substrate of a first conductivity type. The photodiode includes a first region having a substantially hemispherical shape and a substantially hemispherical core of a second conductivity type, different from the first conductivity type, within the first region. An epitaxial layer covers the semiconductor substrate and buries the first region and core.
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公开(公告)号:US12087708B2
公开(公告)日:2024-09-10
申请号:US17451718
申请日:2021-10-21
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Sebastien Petitdidier , Nicolas Hotellier , Raul Andres Bianchi , Alexis Farcy , Benoit Froment
IPC: H01L23/00 , H01L21/311 , H01L21/768 , H01L23/29 , H01L23/31 , H01L23/48 , H01L23/498 , H01L23/522 , H01L23/528 , H01L23/58 , H01L23/64 , H03K3/3565
CPC classification number: H01L23/576 , H01L21/31111 , H01L21/76802 , H01L21/76831 , H01L21/76877 , H01L21/76898 , H01L23/291 , H01L23/3171 , H01L23/481 , H01L23/49855 , H01L23/5226 , H01L23/528 , H01L23/57 , H01L23/573 , H01L23/585 , H01L23/642 , H03K3/3565 , H01L23/293
Abstract: A method for fabricating a semiconductor chip includes forming a plurality of conducting pads at a front face of a substrate, thinning a rear face of the substrate, etching openings under each conducting pad from the rear face, depositing a layer of a dielectric on walls and a bottom of the openings, forming a conducting material in the openings, and forming a conducting strip on the rear face. The conducting strip is electrically connected to the conducting material of each of the openings. The etching is stopped when the respective conducting pad is reached.
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公开(公告)号:US20240276894A1
公开(公告)日:2024-08-15
申请号:US18646334
申请日:2024-04-25
Inventor: Philippe BOIVIN , Roberto SIMOLA , Yohann MOUSTAPHA-RABAULT
CPC classification number: H10N70/231 , H10B63/80 , H10N70/021 , H10N70/063 , H10N70/066 , H10N70/068 , H10N70/882 , H10N70/883
Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.
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公开(公告)号:US12057461B2
公开(公告)日:2024-08-06
申请号:US18225298
申请日:2023-07-24
Inventor: Francois Guyader , Sara Pellegrini , Bruce Rae
IPC: H01L27/146 , G01J1/44 , H01L31/107 , H04N25/70
CPC classification number: H01L27/1461 , G01J1/44 , H01L27/14634 , H01L31/107 , H04N25/70 , G01J2001/4466
Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.
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公开(公告)号:US12051705B2
公开(公告)日:2024-07-30
申请号:US17471049
申请日:2021-09-09
Inventor: Raul Andres Bianchi , Marios Barlas , Alexandre Lopez , Bastien Mamdy , Bruce Rae , Isobel Nicholson
IPC: H01L27/146 , G02B5/18
CPC classification number: H01L27/14605 , H01L27/1462 , G02B5/18 , G02B5/1814 , G02B5/1819 , G02B5/1828 , G02B5/1842 , H01L27/14607 , H01L27/1461 , H01L27/1463 , H01L27/1464
Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.
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公开(公告)号:US12038605B2
公开(公告)日:2024-07-16
申请号:US17513575
申请日:2021-10-28
Applicant: STMicroelectronics (Crolles 2) SAS , Institut National des Sciences Appliquees de Lyon , Universite Claude Bernard Lyon 1 , Centre National de la Recherche Scientifique
Inventor: Michele Calvo , Stephane Monfray , Paul Charette , Guillaume Beaudin , Regis Orobtchouk
IPC: G02B6/122 , G01N15/06 , G02B6/12 , G02B6/13 , G01N15/075
CPC classification number: G02B6/1226 , G01N15/06 , G02B6/13 , G01N15/075 , G02B2006/12138
Abstract: An embodiment sensor includes a hybrid waveguide. The hybrid waveguide includes a first dielectric optical waveguide lying on and in contact with a dielectric support layer; a first surface waveguide optically coupled to the first dielectric optical waveguide, parallel to the first dielectric optical waveguide, and lying on the dielectric support layer. The first surface waveguide has a lateral surface configured to guide a surface mode. The hybrid waveguide includes a cavity intended to be filled with a dielectric fluid, separating laterally the first dielectric optical waveguide from the lateral surface of the first surface waveguide.
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