公开(公告)号：US20200331750A1

公开(公告)日：2020-10-22

申请号：US16921675

申请日：2020-07-06

申请人： Soitec

发明人： Mariam Sadaka ,  Ludovic Ecarnot

IPC分类号： B81C1/00 ,  B81B1/00

摘要： Methods of forming semiconductor structures comprising one or more cavities, which may be used in the formation of microelectromechanical system (MEMS) transducers, involve forming one or more cavities in a first substrate, providing a sacrificial material within the one or more cavities, bonding a second substrate over a surface of the first substrate, forming one or more apertures through a portion of the first substrate to the sacrificial material, and removing the sacrificial material from within the one or more cavities. Structures and devices are fabricated using such methods.

公开(公告)号：US20200280298A1

公开(公告)日：2020-09-03

申请号：US16877309

申请日：2020-05-18

申请人： Soitec

发明人： Arnaud Castex ,  Daniel Delprat ,  Bernard Aspar ,  Ionut Radu

IPC分类号： H03H9/02 ,  H01L41/312 ,  H01L41/08 ,  H01L41/313 ,  H03H3/10

摘要： The present invention relates to a heterostructure, in particular, a piezoelectric structure, comprising a cover layer, in particular, a layer of piezoelectric material, the material of the cover layer having a first coefficient of thermal expansion, assembled to a support substrate, the support substrate having a second coefficient of thermal expansion substantially different from the first coefficient of thermal expansion, at an interface wherein the cover layer comprises at least a recess extending from the interface into the cover layer, and its method of fabrication.

公开(公告)号：US20200152689A1

公开(公告)日：2020-05-14

申请号：US16495362

申请日：2018-03-21

申请人： Soitec

发明人： Walter Schwarzenbach ,  Oleg Kononchuk ,  Ludovic Ecarnot

IPC分类号： H01L27/146 ,  H01L31/028 ,  H01L21/762

摘要： A semiconductor on insulator type structure, which may be sued for a front side type imager, successively comprises, from its rear side to its front side, a semiconductor support substrate, an electrically insulating layer and an active layer comprising a monocrystalline semiconductor material. The active layer is made of a semiconductor material having a state of mechanical stress with respect to the support substrate, and the support substrate comprises, on its rear side, a silicon oxide layer, the thickness of the oxide layer being chosen to compensate bow induced by the mechanical stress between the active layer and the support substrate during cooling of the structure after the formation by epitaxy of at least a part of the active layer on the support substrate.

公开(公告)号：US10510531B2

公开(公告)日：2019-12-17

申请号：US15803447

申请日：2017-11-03

申请人： Soitec

发明人： Oleg Kononchuk ,  Isabelle Bertrand ,  Luciana Capello ,  Marcel Broekaart

IPC分类号： H01L21/02 ,  H01L21/268 ,  H01L21/322 ,  H01L21/324 ,  C30B29/06 ,  H01L21/762 ,  H01L27/12

摘要： A method of fabrication of a semiconductor element includes a step of rapid heat treatment in which a substrate comprising a base having a resistivity greater than 1000 Ohm·cm is exposed to a peak temperature sufficient to deteriorate the resistivity of the base. The step of rapid heat treatment is followed by a curing heat treatment in which the substrate is exposed to a curing temperature between 800° C. and 1250° C. and then cooled at a cooldown rate less than 5° C./second when the curing temperature is between 1250° C. and 1150° C., less than 20° C./second when the curing temperature is between 1150° C. and 1100° C., and less than 50° C./second when the curing temperature is between 1100° C. and 800° C.

公开(公告)号：US20190355867A1

公开(公告)日：2019-11-21

申请号：US16074348

申请日：2017-02-01

申请人： SOITEC

发明人： Cécile Aulnette ,  Frank Dimroth ,  Eduard Oliva

IPC分类号： H01L31/18 ,  H01L31/056 ,  H01L31/02 ,  H01L31/0735

摘要： An engineered substrate comprises: a seed layer made of a first semiconductor material for growth of a solar cell; a support substrate comprising a base and a surface layer epitaxially grown on a first side of the base, the base and the surface layer made of a second semiconductor material; a direct bonding interface between the seed layer and the surface layer; wherein a doping concentration of the surface layer is higher than a predetermined value such that the electrical resistivity at the direct bonding interface is below 10 mOhm·cm2, preferably below 1 mOhm·cm2; and wherein a doping concentration of the base as well as the thickness of the engineered substrate are such that absorption of the engineered substrate is less than 20%, preferably less than 10%, and total area-normalized series resistance of the engineered substrate is less than 10 mOhm·cm2, preferably less than 1 mOhm·cm2.

公开(公告)号：US10453739B2

公开(公告)日：2019-10-22

申请号：US15759457

申请日：2016-09-19

申请人： Soitec

发明人： Bruno Ghyselen

IPC分类号： H01L21/762 ,  C30B25/18 ,  C30B33/06 ,  H01S5/02

摘要： A method of transferring blocks of semiconductor material to a substrate comprises the following steps: a. providing an intermediate substrate, the intermediate substrate comprising, on one of its faces, blocks, the blocks comprise a monocrystalline material, the blocks comprising an embrittlement area delimiting a block portion intended to be transferred onto a final substrate; b. executing an assembling step by putting a free surface of each of the blocks in contact with the final substrate; and c. executing, after the assembling step, detachment at the embrittlement area of each of the blocks. During the assembling step, the intermediate substrate deforms so that the free surfaces of the blocks become coplanar.

公开(公告)号：US10429436B2

公开(公告)日：2019-10-01

申请号：US15546252

申请日：2016-01-19

申请人： Soitec

发明人： Cédric Malaquin ,  Jean-Pierre Raskin ,  Eric Desbonnets

IPC分类号： G01R31/26 ,  G01R31/28 ,  G01R29/08 ,  G01R29/12

摘要： The disclosure relates to a device for measuring an electrical characteristic of a substrate comprising a support made of a dielectric material having a bearing surface, the support comprising an electrical test structure having a contact surface flush with the bearing surface of the support, the bearing surface of the support and the contact surface of the electrical test structure being suitable for coming into close contact with a substrate. The measurement device also comprises at least one connection bump contact formed on another surface of the support and electrically linked to the electrical test structure. This disclosure also relates to a system for characterizing a substrate and a method for measuring a characteristic of a substrate employing the measurement device.

公开(公告)号：US20190228967A1

公开(公告)日：2019-07-25

申请号：US16337206

申请日：2017-09-21

申请人： Soitec

发明人： David Sotta ,  Jean-Marc Bethoux ,  Oleg Kononchuk

IPC分类号： H01L21/02

摘要： A structure that can be used to manufacture at least one active layer made of a III-V material thereon includes a substrate comprising a carrier having a main face, a dielectric layer located on the main face of the carrier, and a plurality of single-crystal semiconductor islands located directly on the dielectric layer. The islands have an upper surface in order to serve as a seed surface for the growth of the active layer. The structure further comprises a seed layer located between the single-crystal semiconductor islands, directly on the portion of the dielectric layer that is not covered by the islands, without masking the upper surface of the islands, so that the dielectric layer is not exposed to the external environment.

公开(公告)号：US10270413B2

公开(公告)日：2019-04-23

申请号：US14782548

申请日：2014-03-21

申请人： SOITEC

发明人： Christophe Zinke ,  Eric Desbonnets

IPC分类号： H01L41/22 ,  H03H3/08 ,  H03H9/25

摘要： This disclosure relates to a method of fabrication of a surface acoustic wave device comprising the step (a) of providing a piezoelectric structure, the step (b) of providing a dielectric structure, wherein the step (b) comprises a step (b1) of metalizing the dielectric structure, and the method further comprising the step (c) of bonding the metalized dielectric structure to the piezoelectric structure.

公开(公告)号：US20190007024A1

公开(公告)日：2019-01-03

申请号：US16064419

申请日：2016-12-21

申请人： Soitec

发明人： Marcel Broekaart ,  Thierry Barge ,  Pascal Guenard ,  Ionut Radu ,  Eric Desbonnets ,  Oleg Kononchuk

IPC分类号： H03H9/02 ,  H03H3/04 ,  H03H3/10 ,  H03H9/13 ,  H03H9/145 ,  H03H9/17 ,  H03H9/25 ,  H03H9/56 ,  H03H9/64 ,  H01L27/20 ,  H01L41/047

摘要： A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.