公开(公告)号：US20070186758A1

公开(公告)日：2007-08-16

申请号：US11788137

申请日：2007-04-19

Applicant: Hyo-Jin Kim ,  Khi-Soo Jeong ,  Sang-In Lee ,  Eun-Chul Kim ,  Hyun-Jeong Shim

Inventor： Hyo-Jin Kim ,  Khi-Soo Jeong ,  Sang-In Lee ,  Eun-Chul Kim ,  Hyun-Jeong Shim

IPC: G10H7/00

CPC classification number: H04M1/7258 ,  G10H2210/021 ,  G10H2230/015 ,  H04M1/72558

Abstract: A method and apparatus for controlling a background music (BGM) play operation is disclosed. The method determines if a predetermined hotkey is pressed during the BGM play operation and, if pressed, a BGM play control box is displayed while maintaining the state of an ongoing main operation. Function mapping of a series of predetermined keys is then changed. If determined that the predetermined key is pressed for control of the BGM play operation, the BGM play operation is controlled according to the mapped function of the pressed key. The BGM play control operation can be adjusted using the predetermined hotkey without converting the BGM play operation into the main operation.

Abstract translation: 公开了一种用于控制背景音乐（BGM）播放操作的方法和装置。 该方法确定在BGM播放操作期间是否按下预定的热键，并且如果按下，则在保持正在进行的主操作的状态的同时显示BGM播放控制盒。 然后改变一系列预定键的功能映射。 如果确定按下预定键来控制BGM播放操作，则根据按下的键的映射功能来控制BGM播放操作。 可以使用预定的热键来调整BGM播放控制操作，而不将BGM播放操作转换成主要操作。

公开(公告)号：US20050235905A1

公开(公告)日：2005-10-27

申请号：US10954819

申请日：2004-09-29

Applicant: Yoshihide Senzaki ,  Sang-In Lee ,  Sattar Al-Lami

Inventor： Yoshihide Senzaki ,  Sang-In Lee ,  Sattar Al-Lami

IPC: C23C16/02 ,  C23C16/40 ,  C23C16/42 ,  C23C16/455 ,  C30B25/00 ,  H01L20060101

CPC classification number: C23C16/45525 ,  C23C16/0272 ,  C23C16/401 ,  C23C16/405 ,  C23C16/42 ,  C23C16/45553 ,  C30B25/165 ,  C30B29/16 ,  H01L21/3141 ,  H01L21/31645

Abstract: A method of depositing a hafnium-based dielectric film is provided. The method comprises atomic layer deposition using ozone and one or more reactants comprising a hafnium precursor. A semiconductor device is also provided. The device comprises a substrate, a hafnium-based dielectric layer formed atop the substrate, and an interfacial layer formed between the substrate and the hafnium-based dielectric layer, wherein the interfacial layer comprises silicon dioxide and has a crystalline structure.

Abstract translation: 提供了一种沉积铪基电介质膜的方法。 该方法包括使用臭氧的原子层沉积和一种或多种包含铪前体的反应物。 还提供了半导体器件。 该器件包括衬底，形成在衬底顶上的基于铪的电介质层以及形成在衬底和铪基电介质层之间的界面层，其中界面层包含二氧化硅并具有晶体结构。

公开(公告)号：US06358829B2

公开(公告)日：2002-03-19

申请号：US09397616

申请日：1999-09-16

Applicant: Mee-Young Yoon ,  Sang-In Lee ,  Hyun-Seok Lim

Inventor： Mee-Young Yoon ,  Sang-In Lee ,  Hyun-Seok Lim

IPC: H01L2144

CPC classification number: H01L21/76876 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76877

Abstract: A method for fabricating a semiconductor device having an aluminum (Al) interconnection layer with excellent surface morphology forms an interface control layer having a plurality of atomic layers before forming the Al interconnection layer. In the fabrication method, an interlayer dielectric (ILD) film having a contact hole which exposes a conductive region of the semiconductor substrate is formed on a semiconductor substrate, and an interface control layer having a plurality of atomic layers continuously deposited is formed on the inner wall of the contact hole and the upper surface of the interlayer dielectric film, to a thickness on the order of several angstroms to several tens of angstroms. Then, chemical vapor deposition (CVD) completes an Al blanket deposition on the resultant structure, including the interface control layer, to form a contact plug in the contact hole and an interconnection layer on the interlayer dielectric film.

Abstract translation: 具有优异表面形态的具有铝（Al）互连层的半导体器件的制造方法在形成Al互连层之前形成具有多个原子层的界面控制层。 在制造方法中，在半导体衬底上形成具有暴露半导体衬底的导电区域的接触孔的层间电介质（ILD）膜，并且在内部形成具有连续沉积的多个原子层的界面控制层 接触孔的壁和层间电介质膜的上表面的厚度达到几埃到几十埃的数量级。 然后，化学气相沉积（CVD）在所得结构（包括界面控制层）上完成Al覆盖层沉积，以形成接触孔中的接触塞和层间电介质膜上的互连层。

公开(公告)号：US06270572B1

公开(公告)日：2001-08-07

申请号：US09371709

申请日：1999-08-09

Applicant: Yeong-kwan Kim ,  Sang-in Lee ,  Chang-soo Park ,  Sang-min Lee

Inventor： Yeong-kwan Kim ,  Sang-in Lee ,  Chang-soo Park ,  Sang-min Lee

IPC: C30B2502

CPC classification number: H05B33/04 ,  C23C16/44 ,  C23C16/45527 ,  C23C16/45561 ,  H01L21/02381 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/31604 ,  H01L21/31691

Abstract: A thin film manufacturing method is provided. The method includes the step of chemically adsorbing a first reactant on a substrate by injecting the first reactant into a chamber in which the substrate is loaded. Physisorbed first reactant on the chemically adsorbed first reactant is removed by purging or pumping the chamber. After the first reactant is densely chemically adsorbed on the substrate by re-injecting the first reactant into the chamber, the physisorbed first reactant on the dense chemisorbed first reactant is removed by purging or pumping the chamber. A second reactant is chemically adsorbed onto the surface of the substrate by injecting the second reactant into the chamber. Physisorbed second reactant on the chemisorbed first reactant and the second reactant is removed by purging or pumping the chamber. A solid thin film is formed by chemical exchange through densely adsorbing the second reactant onto the substrate by re-injecting the second reactant into the chamber. According to the present invention, it is possible to obtain a precise stoichiometric thin film having a high film density, since the first reactant and the second reactant are densely adsorbed and the impurities are substantially removed by pumping or purging

Abstract translation: 提供薄膜制造方法。 该方法包括通过将第一反应物注入到其中负载衬底的室中来在基底上化学吸附第一反应物的步骤。 化学吸附的第一反应物上的物理吸附的第一反应物通过清洗或泵送室来除去。 在第一反应物通过将第一反应物重新注入室中密集地化学吸附在基材上之后，通过清洗或泵送室来去除致密化学吸附的第一反应物上的物理吸附的第一反应物。 通过将第二反应物注入到室中，将第二反应物化学吸附到基底的表面上。 化学吸附的第一反应物和第二反应物上的物理吸附的第二反应物通过清洗或泵送室来除去。 通过将第二反应物重新注入到室中，将第二反应物密集地吸附到基底上，通过化学交换形成固体薄膜。 根据本发明，可以获得具有高膜密度的精确化学计量薄膜，因为第一反应物和第二反应物被密集吸附并且通过泵送或清除基本上除去杂质

公开(公告)号：US06197683B1

公开(公告)日：2001-03-06

申请号：US09156724

申请日：1998-09-18

Applicant: Sang-bom Kang ,  Chang-soo Park ,  Yun-sook Chae ,  Sang-in Lee

Inventor： Sang-bom Kang ,  Chang-soo Park ,  Yun-sook Chae ,  Sang-in Lee

IPC: H01L2144

CPC classification number: H01L21/76843 ,  C23C16/34 ,  C23C16/45553 ,  H01L21/28562 ,  H01L21/28568 ,  H01L21/76804 ,  H01L28/91

Abstract: A method of forming a metal nitride film using chemical vapor deposition (CVD), and a method of forming a metal contact of a semiconductor device using the same, are provided. The method of forming a metal nitride film using chemical vapor deposition (CVD) in which a metal source and a nitrogen source are used as a precursor, includes the steps of inserting a semiconductor substrate into a deposition chamber, flowing the metal source into the deposition chamber, removing the metal source remaining in the deposition chamber by cutting off the inflow of the metal source and flowing a purge gas into the deposition chamber, cutting off the purge gas and flowing the nitrogen source into the deposition chamber to react with the metal source adsorbed on the semiconductor substrate, and removing the nitrogen source remaining in the deposition chamber by cutting off the inflow of the nitrogen source and flowing the purge gas into the deposition chamber. Accordingly, the metal nitride film has low resistivity and a low content of Cl even with excellent step coverage, and it can be formed at a temperature of 500° C. or lower. Also, a deposition speed, approximately 20 Å/cycle, is suitable for mass production.

Abstract translation: 提供了使用化学气相沉积（CVD）形成金属氮化物膜的方法，以及使用其形成使用其的半导体器件的金属接触的方法。 使用其中使用金属源和氮源作为前体的化学气相沉积（CVD）形成金属氮化物膜的方法包括以下步骤：将半导体衬底插入淀积室中，使金属源流入沉积物 通过切断金属源的流入并将净化气体流入沉积室，去除沉积室中残留的金属源，切断净化气体并使氮源流入沉积室以与金属源反应 吸附在半导体衬底上，并且通过切断氮源的流入并将净化气体流入沉积室来除去留在沉积室中的氮源。 因此，即使具有优异的阶梯覆盖，金属氮化物膜也具有低电阻率和低的Cl含量，并且可以在500℃或更低的温度下形成。 此外，沉积速度约为每秒的一个循环，适合批量生产。

公开(公告)号：US6140671A

公开(公告)日：2000-10-31

申请号：US157401

申请日：1998-09-21

Applicant: Sang-in Lee

Inventor： Sang-in Lee

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/285 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/04 ,  H01L27/105 ,  H01L29/16 ,  H01L29/92

CPC classification number: H01L27/10852 ,  H01L28/55 ,  H01L28/60 ,  H01L21/28568 ,  Y10S148/148

Abstract: A capacitor in a semiconductor device having a dielectric film formed of high dielectric material and a manufacturing method therefor are provided. The capacitor consists of electrodes including a dielectric film and an amorphous SiC layer. Thus, the diffusion of oxygen atoms through a grain boundary into an underlayer and the formation of an oxide layer on the surface of the SiC layer can both be prevented, providing for a highly reliable capacitor electrode and an equivalent oxide thickness which is no thicker than required.

Abstract translation: 提供了具有由高介电材料形成的电介质膜的半导体器件中的电容器及其制造方法。 电容器由包括电介质膜和非晶SiC层的电极组成。 因此，可以防止氧原子通过晶界扩散到底层中，并且可以防止在SiC层的表面上形成氧化物层，从而提供高可靠性的电容器电极和等于不比厚度大的氧化物厚度 需要。

公开(公告)号：US6001660A

公开(公告)日：1999-12-14

申请号：US969672

申请日：1997-11-13

Applicant: Young-soh Park ,  Sang-in Lee ,  Cheol-seong Hwang ,  Doo-sup Hwang ,  Hag-Ju Cho

Inventor： Young-soh Park ,  Sang-in Lee ,  Cheol-seong Hwang ,  Doo-sup Hwang ,  Hag-Ju Cho

IPC: C23C14/14 ,  C23C14/58 ,  H01L21/02 ,  H01L21/28 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  H01G7/06

CPC classification number: H01L28/60 ,  H01L21/76882

Abstract: Methods of forming integrated circuit capacitors include the steps of forming an electrically insulating layer on a face of a semiconductor substrate and then patterning the electrically insulating layer to define a contact hole therein. A barrier metal layer is then formed in at least a portion of the contact hole. A lower electrode metal layer is then formed on the barrier metal layer and then planarized by reflowing the lower electrode metal layer at a temperature greater than about 650.degree. C. in a nitrogen gas ambient, to define a lower capacitor electrode. A layer of material having a high dielectric constant is then formed on the lower capacitor electrode. An upper capacitor electrode is then formed on the dielectric layer, opposite the lower capacitor electrode. The dielectric layer may comprise Ba(Sr, Ti)O.sub.3, Pb(Zr, Ti)O.sub.3, Ta.sub.2 O.sub.5, SiO.sub.2, SiN.sub.3, SrTiO.sub.3, PZT, SrBi.sub.2 Ta.sub.2 O.sub.9, (Pb, La)(Zr, Ti)O.sub.3 and Bi.sub.4 Ti.sub.3 O.sub.12. According to one embodiment of the present invention, the step of patterning the electrically insulating layer comprises patterning the electrically insulating layer to define a contact hole therein that exposes the face of the semiconductor substrate. The step of forming a barrier metal layer also preferably comprises depositing a conformal barrier metal layer on sidewalls of the contact hole and on the exposed face of the substrate. The barrier metal layer may be selected from the group consisting of TiN, CoSi, TaSiN, TiSiN, TaSi, TiSi, Ta and TaN.

Abstract translation: 形成集成电路电容器的方法包括以下步骤：在半导体衬底的表面上形成电绝缘层，然后对电绝缘层进行构图以在其中限定接触孔。 然后在接触孔的至少一部分中形成阻挡金属层。 然后在阻挡金属层上形成下电极金属层，然后通过在氮气环境中在大于约650℃的温度下回流下电极金属层来平坦化，以限定较低的电容器电极。 然后在下部电容器电极上形成具有高介电常数的材料层。 然后在电介质层上形成上电容器电极，与下电容器电极相对。 介电层可以包括Ba（Sr，Ti）O3，Pb（Zr，Ti）O3，Ta2O5，SiO2，SiN3，SrTiO3，PZT，SrBi2Ta2O9，（Pb，La）（Zr，Ti）O3和Bi4Ti3O12。 根据本发明的一个实施例，图案化电绝缘层的步骤包括图案化电绝缘层以限定其中露出半导体衬底的表面的接触孔。 形成阻挡金属层的步骤还优选包括在接触孔的侧壁上和基底的暴露面上沉积保形阻挡金属层。 阻挡金属层可以选自TiN，CoSi，TaSiN，TiSiN，TaSi，TiSi，Ta和TaN。

公开(公告)号：US5970309A

公开(公告)日：1999-10-19

申请号：US950887

申请日：1997-10-15

Applicant: Jung-min Ha ,  Byung-lyul Park ,  Dae-hong Ko ,  Sang-in Lee

Inventor： Jung-min Ha ,  Byung-lyul Park ,  Dae-hong Ko ,  Sang-in Lee

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC classification number: H01L27/1085 ,  H01L28/60 ,  H01L28/82

Abstract: A method of manufacturing a semiconductor capacitor electrode by growing a metal compound layer over polysilicon storage nodes. The metal compound layer readily growing on the polysilicon storage nodes, but not on portions of an insulating layer between adjacent polysilicon storage nodes.

Abstract translation: 一种通过在多晶硅储存节点上生长金属化合物层来制造半导体电容器电极的方法。 金属化合物层容易生长在多晶硅存储节点上，而不是在相邻的多晶硅存储节点之间的绝缘层的部分上生长。

公开(公告)号：US5939787A

公开(公告)日：1999-08-17

申请号：US929419

申请日：1997-09-15

Applicant: Sang-in Lee

Inventor： Sang-in Lee

IPC: H01L21/28 ,  C23C14/06 ,  C23C14/24 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/48 ,  H01L29/43

CPC classification number: H01L21/76856 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/532 ,  H01L2924/0002 ,  Y10S257/915

Abstract: A semiconductor device and manufacturing method thereof having a diffusion barrier layer formed on a semiconductor wafer, whose surface region is provided with a silylation layer, wherein the silylation layer is formed on the diffusion barrier layer which is formed on the semiconductor wafer, by a plasma process using silicon hydride or by a reactive sputtering method using SiH.sub.4. When the metal layer is formed on the silylation layer, the wettability between the diffusion barrier layer and the metal is enhanced and large grains are formed, thereby increasing the step coverage for the contact hole of the metal layer or for the via hole. Additionally, when heat treatment is performed after the metal layer is formed on the silylation layer, the reflow characteristic of the metal layer becomes good, to thereby facilitate the filling of the contact hole or the via hole easy. When the wiring layer is thus formed, the metal wiring having good reliability can be obtained and the subsequent process is rendered unnecessary.

Abstract translation: 一种半导体器件及其制造方法，其具有形成在半导体晶片上的扩散阻挡层，其表面区域设置有甲硅烷基化层，其中所述甲硅烷基层通过等离子体形成在形成在半导体晶片上的扩散阻挡层上 使用硅氢化物或通过使用SiH 4的反应溅射法进行。 当在甲硅烷基层上形成金属层时，扩散阻挡层和金属之间的润湿性增强，并且形成大的晶粒，从而增加金属层或通孔的接触孔的阶梯覆盖。 此外，当在甲硅烷基层上形成金属层之后进行热处理时，金属层的回流特性变好，从而易于使接触孔或通孔的填充。 当这样形成布线层时，可以获得具有良好可靠性的金属布线，并且不需要随后的处理。

公开(公告)号：US5851917A

公开(公告)日：1998-12-22

申请号：US625114

申请日：1996-04-01

Applicant: Sang-in Lee

Inventor： Sang-in Lee

IPC: H01L21/285 ,  H01L21/441 ,  H01L21/48 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/532 ,  H01L21/28

CPC classification number: H01L21/76838 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/485 ,  H01L23/53223 ,  H01L2924/0002 ,  Y10S257/915

Abstract: A wiring structure of semiconductor device and a method for manufacturing the same which fills up a contact hole of below one half micron. An insulating layer is formed on a semiconductor substrate, and a contact hole or a via hole is formed in the insulating layer. On the insulating layer, a first metal is deposited via a CVD method to form a CVD metal layer or a CVD metal plug filling up the contact hole. Then, the thus-obtained CVD metal layer or the CVD metal plug is heat-treated in a vacuum at a high temperature below the melting point of the first metal, thereby planarizing the surface thereof the CVD metal layer. A second metal is deposited via a sputtering method on the CVD metal layer or on the CVD metal plug to thereby form a sputtered metal layer. The contact hole is filled up with the first metal by the CVD method and then a reliable sputtered metal layer is deposited via a sputtering method. The wiring layer can be used for the semiconductor device of the next generation.

Abstract translation: 半导体器件的布线结构及其制造方法，其填充低于一半微米的接触孔。 绝缘层形成在半导体衬底上，并且在绝缘层中形成接触孔或通孔。 在绝缘层上，通过CVD法沉积第一金属，以形成填充接触孔的CVD金属层或CVD金属塞。 然后，将如此获得的CVD金属层或CVD金属插塞在低于第一金属的熔点的高温下在真空中进行热处理，从而平坦化其CVD金属层的表面。 通过溅射法在CVD金属层或CVD金属插塞上沉积第二种金属，从而形成溅射金属层。 通过CVD法将接触孔填充第一金属，然后通过溅射法沉积可靠的溅射金属层。 布线层可用于下一代的半导体器件。