公开(公告)号：US20110256980A1

公开(公告)日：2011-10-20

申请号：US13087836

申请日：2011-04-15

申请人： Tatsuya SAITO ,  Takashi SATOH ,  Yosuke OHMORI ,  Masayoshi TAKEDA

发明人： Tatsuya SAITO ,  Takashi SATOH ,  Yosuke OHMORI ,  Masayoshi TAKEDA

IPC分类号： B60W10/18 ,  B60W50/00 ,  B60W10/04

CPC分类号： B60W30/18072 ,  B60W10/06 ,  B60W10/184 ,  B60W30/18136 ,  B60W30/192 ,  B60W2510/0671 ,  B60W2540/12 ,  F02N11/084 ,  F02N2200/0807 ,  Y02T10/48 ,  Y10T477/81 ,  Y10T477/814

摘要： A vehicle control apparatus includes: an automatic-stop-and-restart-control-unit stopping/restarting an engine, a brake-fluid-pressure-control-unit controlling wheel-cylinder-pressure using a brake-system, which intensifies brake-manipulation-force by a brake-booster to cause master-cylinder-pressure in a master-cylinder while the engine operates, and which transfers the master-cylinder-pressure to wheel-cylinders to cause the wheel-cylinder-pressure, the brake-system including an actuator automatically increasing pressure in the wheel-cylinders irrespective of the brake-manipulation-force; a negative-pressure-detection-unit which detects the vacuum-pressure; a first-determination-unit which determines whether the vacuum-pressure is not more than a first threshold while the engine stops, a restarting-unit which allows the automatic-stop-and-restart-control-unit to restart the engine when the first-determination-unit determines that the vacuum-pressure is not more than the first threshold; a second-determination-unit which determines whether the vacuum-pressure is not more than a second threshold; and a braking-boost-unit which allows the brake-fluid-pressure-control-unit to automatically increase the pressure in the wheel-cylinders when the second-determination-unit determines that the vacuum-pressure is not more than the second threshold.

摘要翻译： 一种车辆控制装置，包括：自动停止再起动控制单元停止/重新起动发动机，制动液压控制单元使用制动系统控制车轮气压， 通过制动助力器的操纵力，在发动机运转时使主缸内的主缸压力，并将主缸压力传递到车轮缸，使轮缸压力，制动 - 包括致动器的系统，与制动器操纵力无关地自动增加车轮气缸中的压力; 检测真空压力的负压检测单元; 第一确定单元，其在发动机停止时确定真空压力是否不大于第一阈值;当第一确定单元在第一和第二阈值时允许自动停止和重新启动控制单元重新启动发动机 确定单元确定真空压力不大于第一阈值; 确定真空压力是否不大于第二阈值的第二确定单元; 以及制动 - 升压单元，其在第二确定单元确定真空压力不大于第二阈值时允许制动液压控制单元自动增加车轮气缸中的压力。

公开(公告)号：US08005130B2

公开(公告)日：2011-08-23

申请号：US11826300

申请日：2007-07-13

申请人： Hidehiro Toyoda ,  Tatsuya Saito ,  Hiroki Yamashita ,  Norio Chujo

发明人： Hidehiro Toyoda ,  Tatsuya Saito ,  Hiroki Yamashita ,  Norio Chujo

IPC分类号： H04B1/38

CPC分类号： H04L7/0337

摘要： A transmitting and receiving technique in which a load on data signal lines is reduced while maintaining a communication quality, thereby making it possible to improve the throughput of data channels. In a transceiver, a transmitter side has an encoder circuit that transmits a bit sequence obtained by encoding link information to a clock signal line, and a receiver side has a clock and data recovery circuit 17 that extracts a clock component from a signal received from the clock signal line, a decoder circuit 19 that decodes the extracted signal to reproduce the link information, and a bit deskew circuit 21 that adjusts a skew that is lower than one bit on the basis of a clock component.

摘要翻译： 一种在保持通信质量的同时减少数据信号线上的负载的发送和接收技术，从而可以提高数据信道的吞吐量。 在收发机中，发射机侧具有将通过对链路信息进行编码而获得的比特序列发送到时钟信号线的编码器电路，并且接收机侧具有时钟和数据恢复电路17，时钟和数据恢复电路17从从 时钟信号线，对所提取的信号进行解码以再现链接信息的解码器电路19以及基于时钟分量来调整低于1比特的歪斜的位歪斜电路21。

公开(公告)号：US07927985B2

公开(公告)日：2011-04-19

申请号：US12613622

申请日：2009-11-06

申请人： Shinichi Tanaka ,  Tatsuya Saito ,  Yusuke Yokobayashi

发明人： Shinichi Tanaka ,  Tatsuya Saito ,  Yusuke Yokobayashi

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L33/0095 ,  H01L21/0242 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/0079

摘要： A growth substrate is removed from a semiconductor film, and a surface of the semiconductor film exposed by removing the growth substrate is flattened. The semiconductor film along device division lines are partially etched by dry etching to form grooves in a lattice that form streets, not reaching the metal support in the semiconductor film. The surface of the semiconductor film at the bottom of the grooves is flattened. The semiconductor film along the device division lines at the bottom of the grooves are further etched by wet etching to expose the metal support at the bottom of the grooves to finish the streets.

摘要翻译： 从半导体膜去除生长衬底，通过去除生长衬底而暴露的半导体膜的表面变平。 沿着器件分割线的半导体膜通过干蚀刻被部分蚀刻，以形成形成街道的格子中的凹槽，而不到达半导体膜中的金属支撑。 凹槽底部的半导体膜的表面变平。 通过湿蚀刻进一步蚀刻沿着凹槽底部的器件分割线的半导体膜，以暴露凹槽底部的金属支撑以完成街道。

公开(公告)号：US20100228453A1

公开(公告)日：2010-09-09

申请号：US12713989

申请日：2010-02-26

申请人： Tatsuya Saito

发明人： Tatsuya Saito

IPC分类号： G06F19/00 ,  B60W10/10 ,  B60W30/18

CPC分类号： F02D17/04 ,  B60W10/02 ,  B60W10/06 ,  B60W30/192 ,  B60W2510/1015 ,  B60W2520/10 ,  B60W2710/022 ,  B60W2710/025 ,  F02D29/02 ,  Y02T10/48 ,  Y10T477/26 ,  Y10T477/638 ,  Y10T477/6403 ,  Y10T477/6422

摘要： A vehicle control system for an engine-powered vehicle equipped with an engine and an automatic transmission with a clutch. When a given engine stop requirement is met during running of the engine, the system stops the engine automatically. When a given engine restart requirement is met after stop of the engine, the system restarts the engine and enters a clutch control mode to bring the clutch in the automatic transmission into a slippable state in which the clutch is permitted to slip based on the speed of the vehicle, thereby absorbing the acceleration shock which usually occurs upon engagement of the clutch to transmit engine torque to wheels of the vehicle when the engine is restarted, and the speed of the vehicle is relatively low.

摘要翻译： 一种用于配备发动机和具有离合器的自动变速器的发动机动力车辆的车辆控制系统。 当在发动机运行期间满足给定的发动机停止要求时，系统将自动停止发动机。 当在发动机停止后满足给定的发动机重启要求时，系统重新启动发动机并进入离合器控制模式，以将离合器置于自动变速器中，使离合器允许滑动的滑动状态基于 从而吸收当发动机重新启动时通常在离合器接合时将发动机扭矩传递到车辆的车轮时发生的加速冲击，并且车辆的速度相对较低。

公开(公告)号：US07774667B2

公开(公告)日：2010-08-10

申请号：US12054366

申请日：2008-03-24

申请人： Tatsuya Saito ,  Kaname Yamasaki ,  Iwao Suzuki ,  Takeshi Bingo ,  Keiichi Horie

发明人： Tatsuya Saito ,  Kaname Yamasaki ,  Iwao Suzuki ,  Takeshi Bingo ,  Keiichi Horie

IPC分类号： G01R31/28

CPC分类号： G11C29/16 ,  G11C29/1201 ,  G11C2029/3602

摘要： The test design cost of a circuit capable of accessing an external memory is reduced. There is included a built-in self-test circuit for use in testing an external memory separately from a memory controller for performing memory control in response to an access request to the external memory capable of being coupled to a memory interface, and a TAP controller is used to control the built-in self-test circuit and referring to a test result. There is adopted a multiplexer for switchably selecting the memory controller or the built-in self-test circuit as a circuit for coupling to the memory interface in accordance with control information externally inputted through the TAP controller. The built-in self-test circuit programmably generates and outputs a pattern for a memory test in accordance with an instruction inputted through the TAP controller, and compares data read from the external memory with an expected value.

摘要翻译： 能够访问外部存储器的电路的测试设计成本降低。 包括内置自检电路，用于独立于存储器控制器测试外部存储器，用于响应于能够耦合到存储器接口的外部存储器的访问请求执行存储器控制，以及TAP控制器 用于控制内置自检电路并参考测试结果。 采用多路复用器，根据外部通过TAP控制器输入的控制信息，可选择存储控制器或内置自检电路作为耦合到存储器接口的电路。 内置的自检电路可编程地根据通过TAP控制器输入的指令产生和输出用于存储器测试的模式，并且将从外部存储器读取的数据与预期值进行比较。

公开(公告)号：US07714644B2

公开(公告)日：2010-05-11

申请号：US12166666

申请日：2008-07-02

申请人： Takashi Takemoto ,  Hiroki Yamashita ,  Tatsuya Saito

发明人： Takashi Takemoto ,  Hiroki Yamashita ,  Tatsuya Saito

IPC分类号： H03F1/02

CPC分类号： H03F3/45475 ,  H03F1/26 ,  H03F1/34 ,  H03F3/45085 ,  H03F3/45183 ,  H03F3/45968 ,  H03F2200/372 ,  H03F2200/375 ,  H03F2203/45534

摘要： An amplifier circuit block and a compensation circuit block are provided. The amplifier circuit block includes an analog adder for subtracting an output signal of the compensation circuit block from an input signal and an amplifier circuit operating in a wide band. The compensation circuit block includes an amplifier circuit with a low offset voltage and a low noise in a low frequency region, an analog adder block for subtracting an output signal of the amplifier circuit from an output signal of the amplifier circuit and generating a differential signal thereof, and a feedback circuit block for negatively feeding back the differential signal to the analog adder. The amplifier circuit block can reduce the offset voltage and the low-band noise by the negative feedback of the differential signal, and at the same time, the operation band of the entire amplifier circuit can be decided by the characteristic of the amplifier circuit.

摘要翻译： 提供放大器电路块和补偿电路块。 放大器电路块包括用于从输入信号中减去补偿电路块的输出信号的模拟加法器和在宽带中工作的放大器电路。 补偿电路块包括在低频区域具有低失调电压和低噪声的放大器电路，用于从放大器电路的输出信号中减去放大器电路的输出信号并产生其差分信号的模拟加法器块 以及用于将差分信号负反馈给模拟加法器的反馈电路块。 放大器电路块可以通过差分信号的负反馈来减小偏移电压和低带噪声，同时整个放大器电路的工作频带可以由放大器电路的特性决定。

公开(公告)号：US20100024239A1

公开(公告)日：2010-02-04

申请号：US12094937

申请日：2006-10-17

申请人： Tetsuyuki Kono ,  Tatsuya Saito ,  Tatsuo Ioku ,  Satoru Nishiwaki

发明人： Tetsuyuki Kono ,  Tatsuya Saito ,  Tatsuo Ioku ,  Satoru Nishiwaki

IPC分类号： F26B21/00 ,  D06F58/04

CPC分类号： D06F25/00 ,  D06F58/20 ,  D06F58/206 ,  D06F58/24

摘要： A drum-type washer/dryer having an evaporator (34) for performing dehumidification by cooling air drawn from the inner space of a drum (24) and also having condenser (35) for heating the air dehumidified by the evaporator (34), wherein the air heated by the condenser (35) is made to sequentially pass through a duct (40) and a blowhole (47) and blown as dry air to clothes in the drum (24). A backflow preventing portion (52) is provided in the duct (40), and when bubbles flow back into the duct (40) from the inner space of the drum (24) through the blowhole (47), the backflow preventing portion (52) functions as resistance for preventing the back flow of the bubbles.

摘要翻译： 一种具有蒸发器（34）的滚筒式洗衣机/干燥机，用于通过冷却从滚筒（24）的内部空间抽取的空气并且还具有用于加热由蒸发器（34）除湿的空气的冷凝器（35）来进行除湿， 使由冷凝器（35）加热的空气依次通过管道（40）和气孔（47），并且作为干燥空气吹送到滚筒（24）中的衣服。 在所述导管（40）中设置有防回流部（52），当从所述鼓（24）的内部空间经由所述气孔（47）流回到所述导管（40）内时，所述防回流部 ）作为防止气泡回流的阻力。

公开(公告)号：US20100013528A1

公开(公告)日：2010-01-21

申请号：US12504319

申请日：2009-07-16

申请人： Yutaka Uematsu ,  Tatsuya Saito ,  Yoji Nishio ,  Yukitoshi Hirose

发明人： Yutaka Uematsu ,  Tatsuya Saito ,  Yoji Nishio ,  Yukitoshi Hirose

IPC分类号： H03L5/00

CPC分类号： G11C11/406 ,  G11C11/40618 ,  G11C11/4074 ,  G11C2211/4067

摘要： A semiconductor device or an information processing system comprises a plurality of circuit units, and a control unit for controlling a start timing of large-current operations executed by the respective circuit units within a predetermined period, where the large-current operation involves a relatively large current which flows in a power supply system, as compared with other operations. The control unit controls the start timing of the large-current operation from one circuit unit to another such that the waveform of a current flowing from the power supply system is shaped into the waveform of a half cycle of a sinusoidal wave when the circuit units execute large-current operations within the predetermined period.

摘要翻译： 半导体器件或信息处理系统包括多个电路单元，以及控制单元，用于在预定时间段内控制由各个电路单元执行的大电流操作的开始定时，其中大电流操作涉及相对大的 与其他操作相比，在电源系统中流动的电流。 控制单元控制从一个电路单元到另一个电路单元的大电流操作的开始定时，使得当电路单元执行时，从电源系统流过的电流的波形被成形为正弦波的半周期的波形 在预定时段内的大电流操作。

公开(公告)号：US20090158087A1

公开(公告)日：2009-06-18

申请号：US12332915

申请日：2008-12-11

申请人： Hideshi Maeno ,  Wataru Uchida ,  Michinobu Nakao ,  Tatsuya Saito ,  Mitsuo Serizawa

发明人： Hideshi Maeno ,  Wataru Uchida ,  Michinobu Nakao ,  Tatsuya Saito ,  Mitsuo Serizawa

IPC分类号： G11C29/08 ,  G06F11/14 ,  G06F11/26

CPC分类号： G11C29/44 ,  G11C29/4401 ,  G11C29/802

摘要： A semiconductor integrated circuit which can perform repair of at least one memory circuit in RAM, etc. and can promote improvement in the degree of integration is provided. The encoding circuit 3 receives the failure bit data fail [0]-fail [7], encodes these eight-bit failure bit data fail [7:0], and outputs four-bit (the number of compressed bits) encoded data ef [3:0] sequentially. This encoded data ef [3:0] can indicate various kinds of failure information about RAM1. The capture circuit 4 latches the encoded data ef [3:0] which satisfies a predetermined latch condition, as latch data cf [3:0]. The capture circuit 4 can perform a serial shift operation of the latch data cf [3:0], and can output serially the latch data cf [3:0] as the serial data output So.

摘要翻译： 提供了可以对RAM等中的至少一个存储电路进行修复的半导体集成电路，并且可以促进集成度的提高。 编码电路3接收故障位数据失败[0] -fail [7]，对这8位故障位数据失败[7：0]进行编码，并输出4位（压缩位数）编码数据ef [ 3：0]。 该编码数据ef [3：0]可以指示关于RAM1的各种故障信息。 捕获电路4锁存满足预定锁存条件的编码数据ef [3：0]作为锁存数据cf [3：0]。 捕获电路4可以执行锁存数据cf [3：0]的串行移位操作，并且可以串行输出作为串行数据输出So的锁存数据cf [3：0]。

公开(公告)号：US20080290495A1

公开(公告)日：2008-11-27

申请号：US12068606

申请日：2008-02-08

申请人： Yutaka Uematsu ,  Tatsuya Saito ,  Hideki Osaka ,  Yoji Nishio ,  Shunichi Saito

发明人： Yutaka Uematsu ,  Tatsuya Saito ,  Hideki Osaka ,  Yoji Nishio ,  Shunichi Saito

IPC分类号： H01L23/528

CPC分类号： H05K1/0231 ,  H01L23/50 ,  H01L23/5385 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2924/12044 ,  H01L2924/3011 ,  H05K1/09 ,  H05K1/111 ,  H05K1/167 ,  H05K2201/0352 ,  H05K2201/0391 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09481 ,  H05K2201/09781 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

摘要： As a power feed route in a semiconductor chip, a power feed route which reduces antiresonance impedance in the frequency range of tens of MHz is to be realized thereby to suppress power noise in a semiconductor device. By inserting structures which raise the resistance in the medium frequency band into parts where the resistance is intrinsically high, such as power wiring in a semiconductor package and capacitor interconnecting electrode parts, the antiresonance impedance in the medium frequency band can be effectively reduced while keeping the impedance low at the low frequency.

摘要翻译： 作为半导体芯片中的馈电路径，可以实现降低数十MHz频率范围内的反谐振阻抗的馈电路径，从而抑制半导体器件的功率噪声。 通过插入将中频带中的电阻提升到电阻本身较高的部分的结构，例如半导体封装中的功率布线和电容器互连电极部件，可以有效地减少中频带中的反谐振阻抗，同时保持 阻抗低在低频。