公开(公告)号：US08022309B2

公开(公告)日：2011-09-20

申请号：US11946859

申请日：2007-11-29

申请人： Yu-Chang Pai ,  Shou-Kuo Hsu ,  Chien-Hung Liu

发明人： Yu-Chang Pai ,  Shou-Kuo Hsu ,  Chien-Hung Liu

IPC分类号： H05K1/00

CPC分类号： H05K1/0245 ,  H05K1/0224 ,  H05K1/0253 ,  H05K1/0393 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/0969 ,  Y10T29/49156

摘要： An exemplary FPCB includes a signal layer having a differential pair consisting of two transmission lines arranged therein, a ground layer, and a dielectric layer lying between the signal layer and the ground layer. Two sheets made of conductive materials are respectively arranged at opposite sides of the differential pair, and both connected to ground. The sheets are apart from and parallel to the transmission lines. The ground layer has a void defined therein, and the void is located under the two transmission lines.

摘要翻译： 示例性FPCB包括具有由布置在其中的两条传输线组成的差分对的信号层，接地层和位于信号层和接地层之间的电介质层。 由导电材料制成的两片分别布置在差动对的相对两侧，并且都连接到地面。 纸张与传输线分开并平行。 接地层具有限定在其中的空隙，并且空隙位于两条传输线之下。

公开(公告)号：US20110109863A1

公开(公告)日：2011-05-12

申请号：US12616420

申请日：2009-11-11

申请人： Chien-Hung Liu

发明人： Chien-Hung Liu

IPC分类号： G02F1/1345 ,  H01J9/50

CPC分类号： G02F1/136259 ,  G02F2001/136263

摘要： One aspect of the present disclosure relates to a common repair structure for repairing scanning and/or data line defects in a liquid crystal display panel. In one embodiment, the common repair structure includes a plurality of “H” shaped structures, where each “H” shaped structure is placed over a corresponding segment of two neighboring scanning lines located between and associated with two neighboring pixels along the second direction or a corresponding segment of two neighboring data lines located between and associated with two neighboring pixels along the first direction.

摘要翻译： 本公开的一个方面涉及用于修复液晶显示面板中的扫描和/或数据线缺陷的常见修复结构。 在一个实施例中，公共修复结构包括多个“H”形结构，其中每个“H”形结构被放置在沿着第二方向位于两个相邻像素之间并与之相关联的两个相邻扫描线的对应段上，或者 两个相邻数据线的对应段位于沿着第一方向的两个相邻像素之间并与之相关联。

公开(公告)号：US20110042804A1

公开(公告)日：2011-02-24

申请号：US12788091

申请日：2010-05-26

申请人： Chien-Hung Liu ,  Cheng-Te Chou

发明人： Chien-Hung Liu ,  Cheng-Te Chou

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L27/14618 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/93 ,  H01L24/94 ,  H01L25/0657 ,  H01L27/14683 ,  H01L2224/0231 ,  H01L2224/0237 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/051 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/05638 ,  H01L2224/05688 ,  H01L2224/13022 ,  H01L2224/29007 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32052 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/01014 ,  H01L2924/053 ,  H01L2924/01 ,  H01L2224/83 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

摘要： The invention provides a chip package and fabrication method thereof. In one embodiment, the chip package includes: a semiconductor substrate having opposite first and second surfaces, at least one bond pad region and at least one device region; a plurality of conductive pad structures disposed on the bond pad region at the first surface of the semiconductor substrate; a plurality of heavily doped regions isolated from one another, underlying and electrically connected to the conductive pad structures; and a plurality of conductive bumps underlying the heavily doped regions and electrically connected to the conductive pad structures through the heavily-doped regions.

摘要翻译： 本发明提供一种芯片封装及其制造方法。 在一个实施例中，芯片封装包括：具有相对的第一和第二表面，至少一个焊盘区域和至少一个器件区域的半导体衬底; 多个导电焊盘结构，设置在半导体衬底的第一表面处的焊盘区域上; 多个彼此隔离的重掺杂区域，其下面并电连接到导电焊盘结构; 以及在重掺杂区域下面的多个导电凸块，并通过重掺杂区域电连接到导电焊盘结构。

公开(公告)号：US07852478B1

公开(公告)日：2010-12-14

申请号：US12708481

申请日：2010-02-18

申请人： Wen-Yuh Jywe ,  Chien-Hung Liu ,  Tung-Hui Hsu ,  Chia-Ming Hsu

发明人： Wen-Yuh Jywe ,  Chien-Hung Liu ,  Tung-Hui Hsu ,  Chia-Ming Hsu

IPC分类号： G01B11/00

CPC分类号： G01B11/03 ,  B23Q17/24 ,  B23Q2230/002

摘要： A detecting assembly for multi-axis machine tools having a spindle and a turntable and has a detector, a lens device and a computer. The detector is connected to the spindle and has a mounting frame and two detecting segments. The mounting frame is connected to the spindle and has a connecting rod, a bottom board and multiple mounting boards. The detecting segments are mounted on the mounting boards and each has a light source and a sensor. The lens device is mounted on the turntable, extends into the detector and has a supporting shaft and a spherical lens. The spherical lens is mounted on an upper end of the supporting shaft to align light emitted from the light sources with corresponding sensors via the spherical lens. The computer is electrically connected to the detector to receive signals of the detecting segments of the detector and has a signal processor.

摘要翻译： 一种用于具有主轴和转台的多轴机床的检测组件，并具有检测器，透镜装置和计算机。 检测器连接到主轴，并具有安装框架和两个检测段。 安装框架连接到主轴，并具有连杆，底板和多个安装板。 检测段安装在安装板上，每个具有光源和传感器。 透镜装置安装在转台上，延伸到检测器中，并具有支撑轴和球面透镜。 球面透镜安装在支撑轴的上端，以通过球面透镜将来自光源的光与对应的传感器对准。 计算机电连接到检测器以接收检测器的检测段的信号，并具有信号处理器。

公开(公告)号：US20100219495A1

公开(公告)日：2010-09-02

申请号：US11657733

申请日：2007-01-25

申请人： Chien-Hung Liu

发明人： Chien-Hung Liu

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L27/14618 ,  H01L2224/13

摘要： A photosensitizing chip package construction and manufacturing method thereof is comprised of photosensitizing chips constructed on one side of a wafer using a bonding layer; a color attachment array being disposed over those photosensitizing chips; a glass substrate provided with weir and covered up over the color attachment array; a proper gap being defined between the glass substrate and the color attachment array to promote permeability of stream of light by direct receiving stream of light from those photosensitizing chips constructed over the wafer.

摘要翻译： 光敏芯片封装结构及其制造方法由使用结合层的晶片一侧构成的光敏芯片构成; 在这些光敏芯片上设置着色附件阵列; 设置有堰并覆盖在附着阵列上的玻璃基板; 在玻璃基板和颜色附着阵列之间限定适当的间隙，以通过直接接收来自在晶片上构成的光敏芯片的光直接接收光来促进光流的透过性。

公开(公告)号：US07781680B2

公开(公告)日：2010-08-24

申请号：US11951290

申请日：2007-12-05

申请人： Yu-Chang Pai ,  Shou-Kuo Hsu ,  Chien-Hung Liu

发明人： Yu-Chang Pai ,  Shou-Kuo Hsu ,  Chien-Hung Liu

IPC分类号： H05K1/00

CPC分类号： H05K1/0245 ,  H05K1/0393 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/09336 ,  H05K2201/09672

摘要： An exemplary FPCB includes a differential pair consisting of a first transmission line and a second transmission line, a signal layer with the first transmission line arranged therein, a ground layer having a void which includes the area beneath the first transmission line, and a dielectric layer lying between the signal layer and the ground layer. The second transmission line is arranged in the ground layer offset from the first transmission line in the horizontal direction. The FPCB can transmit high speed signals.

摘要翻译： 示例性FPCB包括由第一传输线和第二传输线组成的差分对，其中布置有第一传输线的信号层，具有包括第一传输线下面的区域的空隙的接地层，以及介电层 位于信号层和接地层之间。 第二传输线布置在沿水平方向偏离第一传输线的接地层中。 FPCB可以传输高速信号。

公开(公告)号：US20100060906A1

公开(公告)日：2010-03-11

申请号：US12206026

申请日：2008-09-08

申请人： Wen-Yuh Jywe ,  Chien-Hung Liu ,  Yi-Tsung Li ,  Tung-Hsien Hsieh ,  Tung-Hui Hsu ,  Hung-Shu Wang

发明人： Wen-Yuh Jywe ,  Chien-Hung Liu ,  Yi-Tsung Li ,  Tung-Hsien Hsieh ,  Tung-Hui Hsu ,  Hung-Shu Wang

IPC分类号： G01B11/00

CPC分类号： G01B11/272 ,  B23Q17/24 ,  B23Q2230/002

摘要： Means for measuring a working machine's structural deviation from five reference axes includes a main sensing body bonded with a main axis of the working machine (or controlled to revolve), and a lighting unit set around the main sensing body to circle about the main sensing body with a fixed radius (or the lighting unit radiates a light on the main sensing body from that radial distance and circles along with the main sensing body) such that as soon as the main sensing body has detected an optical signal, it is converted to an error signal informing of the working machine's structural deviation in two or three dimensional displacement.

摘要翻译： 用于测量工作机械与五个参考轴的结构偏差的装置包括与工作机的主轴（或控制旋转）结合的主感测体，以及围绕主感测体围绕主感测体环绕的照明单元 具有固定半径（或者照明单元从该径向距离辐射主感测体上的光并与主感测体一起旋转），使得一旦主感测体检测到光信号，就将其转换为 误差信号通知工作机械在二维或三维位移中的结构偏差。

公开(公告)号：US20090212353A1

公开(公告)日：2009-08-27

申请号：US12434828

申请日：2009-05-04

申请人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

发明人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

IPC分类号： H01L29/792

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/7881 ,  H01L29/792

摘要： A non-volatile memory includes a substrate having two openings, a stacked gate structure disposed on the substrate between the two openings, a liner disposed on a bottom of each of the two openings and parts of a sidewall of each of the two openings, a second conductive layer disposed on the liner at the bottom of each of the two openings, and a third conductive layer on the second conductive layer and the liner. The stacked gate structure includes a first dielectric layer, a charge storage layer, a second dielectric layer, and a first conductive layer. The liner has a top surface lower than that of the substrate. The second conductive layer has a top surface co-planar with that of the liner. The third conductive layer has a top surface at least co-planar with that of the substrate and lower than that of the first dielectric layer.

摘要翻译： 非易失性存储器包括具有两个开口的衬底，设置在两个开口之间的衬底上的堆叠栅极结构，设置在两个开口中的每一个的底部和两个开口中的每一个的侧壁的一部分的衬垫， 设置在两个开口中的每一个的底部的衬垫上的第二导电层，以及在第二导电层和衬垫上的第三导电层。 层叠栅极结构包括第一介电层，电荷存储层，第二介电层和第一导电层。 衬垫具有比衬底更低的顶表面。 第二导电层具有与衬垫的顶表面共面的顶表面。 第三导电层具有至少与基底的共面的顶表面，并且低于第一介电层的顶表面。

公开(公告)号：US07572691B2

公开(公告)日：2009-08-11

申请号：US11435458

申请日：2006-05-16

申请人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

发明人： Chin-Hsien Chen ,  Ying-Tso Chen ,  Chien-Hung Liu ,  Shou-Wei Huang

IPC分类号： H01L21/336 ,  H01L21/8234

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/7881 ,  H01L29/792

摘要： A method of fabricating a non-volatile memory is provided. First, two openings are formed on a substrate. A stacked gate structure comprising a first dielectric layer, a charge storage layer, a second dielectric layer and a first conductive layer is formed on the substrate between the two openings. A liner is formed on a bottom and a portion of a sidewall of the tow openings, wherein a top surface of the liner is lower than that of the substrate. A second conductive layer is formed on the liner at the bottom of the two openings, wherein a top surface of the second conductive layer is co-planar with that of the liner. A third conductive layer is formed on the second conductive layer and the liner, wherein a top surface of the third conductive layer is co-planar with that of the substrate and lower than that of the first dielectric layer.

摘要翻译： 提供了一种制造非易失性存储器的方法。 首先，在基板上形成两个开口。 在两个开口之间的基板上形成包括第一电介质层，电荷存储层，第二电介质层和第一导电层的堆叠栅极结构。 衬套形成在丝束开口的侧壁的底部和一部分上，其中衬垫的顶表面低于衬底的顶表面。 第二导电层形成在两个开口的底部的衬垫上，其中第二导电层的顶表面与衬垫的顶表面共面。 第三导电层形成在第二导电层和衬垫上，其中第三导电层的顶表面与衬底的顶表面平行，并且低于第一介电层的顶表面。

公开(公告)号：US07542303B2

公开(公告)日：2009-06-02

申请号：US11957419

申请日：2007-12-15

申请人： Chien-Hung Liu ,  Shou-Kuo Hsu ,  Yu-Chang Pai

发明人： Chien-Hung Liu ,  Shou-Kuo Hsu ,  Yu-Chang Pai

IPC分类号： H05K7/10 ,  H05K7/12

CPC分类号： H05K1/0245 ,  H05K1/0219 ,  H05K2201/09336 ,  H05K2201/09672

摘要： A printed circuit board (PCB) includes first and second signal layers sandwiching a dielectric layer therebetween, and a differential pair having two differential traces respectively disposed within the first and second signal layers. Two ground parts are respectively arranged at opposite sides of each of the two differential traces.

摘要翻译： 印刷电路板（PCB）包括夹在其间的电介质层的第一和第二信号层，以及分别设置在第一和第二信号层内的差分对。 两个接地部分分别布置在两个差分迹线中的每一个的相对侧。