公开(公告)号：US20070120179A1

公开(公告)日：2007-05-31

申请号：US11505033

申请日：2006-08-16

申请人： Hong-Bae Park ,  Yu-Gyun Shin

发明人： Hong-Bae Park ,  Yu-Gyun Shin

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L29/792 ,  H01L29/513 ,  H01L29/66833

摘要： A SONOS type non-volatile memory device includes a substrate having source/drain regions doped with impurities and a channel region between the source/drain regions. A tunnel insulation layer including silicon oxide is formed on the channel region of the substrate. A charge-trapping insulation layer including silicon nitride is formed on the tunnel insulation layer. A blocking insulation layer is formed on the charge-trapping insulation layer. The blocking insulation layer has a laminate layered structure in which a plurality of layers, at least one of which includes a metal oxide layer, are sequentially stacked. An electrode is formed on the blocking insulation layer.

摘要翻译： SONOS型非易失性存储器件包括具有掺杂有杂质的源极/漏极区域和源极/漏极区域之间的沟道区域的衬底。 在衬底的沟道区上形成包括氧化硅的隧道绝缘层。 在隧道绝缘层上形成包括氮化硅的电荷捕获绝缘层。 在电荷俘获绝缘层上形成阻挡绝缘层。 隔离绝缘层具有层叠层叠结构，其中顺序层叠多个层，其中至少一层包括金属氧化物层。 在隔离绝缘层上形成电极。

公开(公告)号：US20070048913A1

公开(公告)日：2007-03-01

申请号：US11510622

申请日：2006-08-28

申请人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee

发明人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee

IPC分类号： H01L21/84

CPC分类号： H01L21/76879 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02675 ,  H01L21/28525 ,  H01L21/76898 ,  H01L21/8221 ,  H01L21/84 ,  H01L23/481 ,  H01L23/535 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a method of manufacturing a stacked semiconductor device, a seed layer including impurity regions may be prepared. A first insulation interlayer pattern having a first opening may be formed on the seed layer. A first SEG process may be carried out to form a first plug partially filling the first opening. A second SEG process may be performed to form a second plug filling the first opening. A third SEG process may be carried out to form a first channel layer on the first insulation interlayer pattern. A second insulation interlayer may be formed on the first channel layer. The second insulation interlayer, the first channel layer and the second plug arranged on the first plug may be removed to expose the first plug. The first plug may be removed to form a serial opening. The serial opening may be filled with a metal wiring.

摘要翻译： 在制造叠层半导体器件的方法中，可以制备包括杂质区的晶种层。 可以在种子层上形成具有第一开口的第一绝缘层间图案。 可以执行第一SEG过程以形成部分填充第一开口的第一插塞。 可以执行第二SEG过程以形成填充第一开口的第二塞子。 可以执行第三SEG处理以在第一绝缘夹层图案上形成第一沟道层。 可以在第一沟道层上形成第二绝缘中间层。 布置在第一插头上的第二绝缘中间层，第一沟道层和第二插塞可以被去除以暴露第一插塞。 可以移除第一个插头以形成串行开口。 串行开口可以用金属布线填充。

公开(公告)号：US20070044706A1

公开(公告)日：2007-03-01

申请号：US11509735

申请日：2006-08-25

申请人： Sung-Kwan Kang ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Yong-Hoon Son

发明人： Sung-Kwan Kang ,  Yu-Gyun Shin ,  Jong-Wook Lee ,  Yong-Hoon Son

IPC分类号： C30B1/00 ,  C30B28/02 ,  C30B3/00 ,  C30B5/00

CPC分类号： C30B23/02 ,  C30B23/025 ,  C30B25/18 ,  C30B29/06 ,  C30B29/08 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02658 ,  H01L21/28525

摘要： In a method of forming a single crystalline structure and a method of manufacturing a semiconductor device by using the method of forming the single crystalline structure, a single crystalline seed having elements combining with oxygen to form a network former capable of being easily connected to a network of oxide glass is formed. The single crystalline seed is epitaxially grown to form a single crystalline structure.

摘要翻译： 在通过使用形成单晶结构的方法形成单晶结构的方法和制造半导体器件的方法中，具有与氧结合的元件以形成能够容易地连接到网络的网络形成器的单晶种子 形成氧化物玻璃。 将单晶种子外延生长以形成单晶结构。

公开(公告)号：US20070026655A1

公开(公告)日：2007-02-01

申请号：US11489985

申请日：2006-07-20

申请人： Chul-Sung Kim ,  Yu-Gyun Shin ,  Bon-Young Koo ,  Ji-Hyun Kim ,  Young-Jin Noh

发明人： Chul-Sung Kim ,  Yu-Gyun Shin ,  Bon-Young Koo ,  Ji-Hyun Kim ,  Young-Jin Noh

IPC分类号： H01L21/473

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： In a method of manufacturing a semiconductor device for use in such applications as a flash memory device, a field insulating pattern defines an opening that exposes an active region of a semiconductor substrate. The field insulating pattern includes a first portion protruding from the substrate and a second portion buried in the substrate. An oxide layer is formed on the active region by an oxidation process using a reactive plasma including an oxygen radical and a conductive layer is then formed on the oxide layer to sufficiently fill up the opening. The oxide layer is formed by an oxidation reaction of a surface portion of the active region with the oxygen radical having a relatively low activation energy, resulting in an improved thickness uniformity of the oxide layer. As a result, various performance characteristics of the semiconductor device when used in flash memory and similar applications are improved.

摘要翻译： 在制造用于诸如闪速存储器件的应用中的半导体器件的方法中，场绝缘图案限定了露出半导体衬底的有源区的开口。 场绝缘图案包括从基板突出的第一部分和埋在基板中的第二部分。 通过使用包含氧自由基的反应性等离子体的氧化工艺在有源区上形成氧化物层，然后在氧化物层上形成导电层以充分填充开口。 通过活性区域的表面部分与具有相对较低的活化能的氧自由基的氧化反应形成氧化物层，从而改善氧化物层的厚度均匀性。 结果，改善了当用于闪速存储器和类似应用时半导体器件的各种性能特性。

公开(公告)号：US20060249760A1

公开(公告)日：2006-11-09

申请号：US11379206

申请日：2006-04-18

申请人： Gyoung-Ho Buh ,  Yu-Gyun Shin ,  Tai-Su Park ,  Jin-Wook LEE ,  Guk-Hyon Yon

发明人： Gyoung-Ho Buh ,  Yu-Gyun Shin ,  Tai-Su Park ,  Jin-Wook LEE ,  Guk-Hyon Yon

IPC分类号： H01L29/772 ,  H01L21/336

CPC分类号： H01L29/1045 ,  H01L29/66659 ,  H01L29/78

摘要： There are provided a high-voltage transistor and a method of forming the same. A channel region of the high-voltage transistor includes a first region and a second region. The first region has high impurity concentration that is higher than that of the second region. In addition, the first region may be in contact with the isolation layer. Thus, it is possible to enhance leakage current characteristics of the high-voltage transistor.

摘要翻译： 提供了高压晶体管及其形成方法。 高压晶体管的沟道区域包括第一区域和第二区域。 第一区域的杂质浓度高于第二区域。 此外，第一区域可以与隔离层接触。 因此，可以提高高压晶体管的漏电流特性。

公开(公告)号：US20060226470A1

公开(公告)日：2006-10-12

申请号：US11400243

申请日：2006-04-10

申请人： Hag-Ju Cho ,  Taek-Soo Jeon ,  Hye-Lan Lee ,  Sang-Bom Kang ,  Yu-Gyun Shin

发明人： Hag-Ju Cho ,  Taek-Soo Jeon ,  Hye-Lan Lee ,  Sang-Bom Kang ,  Yu-Gyun Shin

IPC分类号： H01L29/788 ,  H01L29/76 ,  H01L21/8238 ,  H01L21/336

CPC分类号： H01L29/513 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28097 ,  H01L21/823835 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4958 ,  H01L29/4975 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

摘要： A semiconductor device comprising a semiconductor substrate having a first impurity region and a second impurity region, a first gate pattern formed on the first impurity region, and a second gate pattern formed on the second impurity region is disclosed. The first gate pattern comprises a first gate insulation layer pattern, a metal layer pattern having a first thickness, and a first polysilicon layer pattern. The second gate pattern comprises a second gate insulation layer pattern, a metal silicide layer pattern having a second thickness smaller than the first thickness, and a second polysilicon layer pattern. The metal silicide layer pattern is formed from a material substantially the same as the material from which the metal layer pattern is formed. A method for manufacturing the semiconductor device is also disclosed.

公开(公告)号：US20060154453A1

公开(公告)日：2006-07-13

申请号：US11329158

申请日：2006-01-11

申请人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee

发明人： Yong-Hoon Son ,  Yu-Gyun Shin ,  Jong-Wook Lee

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/36

CPC分类号： C30B25/04 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639

摘要： A method of forming a thin layer including providing a first single-crystalline silicon layer partially exposed through an opening in an insulation pattern and forming an epitaxial layer on the first single-crystalline silicon layer and forming an amorphous silicon layer on the insulation pattern, the amorphous silicon layer having a first portion adjacent the epitaxial layer and a second portion spaced apart from the first portion, wherein the amorphous silicon layer is formed on the insulation pattern at substantially the same rate at the first portion and at a second portion. The amorphous silicon layer may be formed to a uniform thickness without a thinning defect.

公开(公告)号：US20060035405A1

公开(公告)日：2006-02-16

申请号：US11191423

申请日：2005-07-28

申请人： Hong-Bae Park ,  Yu-Gyun Shin ,  Sang-Bom Kang

发明人： Hong-Bae Park ,  Yu-Gyun Shin ,  Sang-Bom Kang

IPC分类号： H01L21/16

CPC分类号： H01L21/02194 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/31604 ,  H01L21/31645 ,  H01L29/513 ,  H01L29/517

摘要： The present invention can provide methods of manufacturing a thin film including hafnium titanium oxide. The methods can include introducing a first reactant including a hafnium precursor onto a substrate; chemisorbing a first portion of the first reactant to the substrate, and physisorbing a second portion of the first reactant to the substrate and the chemisorbed first portion of the first reactant; providing a first oxidant onto the substrate; forming a first thin film including hafnium oxide on the substrate; introducing a second reactant including a titanium precursor onto the first thin film; chemisorbing a first portion of the second reactant to the first thin film, and physisorbing a second portion of the second reactant to the first thin film and the chemisorbed first portion of the second reactant; providing a second oxidant onto the first thin film; and forming a second thin film including titanium oxide on the first thin film. The present invention can further provide methods of manufacturing a gate structure and a capacitor.

摘要翻译： 本发明可以提供制造包括铪钛氧化物的薄膜的方法。 所述方法可以包括将包含铪前体的第一反应物引入到基底上; 将所述第一反应物的第一部分化学吸附至所述基底，以及将所述第一反应物的第二部分物理吸附至所述基底和所述第一反应物的化学吸附的第一部分; 在衬底上提供第一氧化剂; 在基板上形成包括氧化铪的第一薄膜; 将包含钛前体的第二反应物引入到所述第一薄膜上; 将所述第二反应物的第一部分化学吸附到所述第一薄膜，以及将所述第二反应物的第二部分物理吸附到所述第一薄膜和所述第二反应物的化学吸附的第一部分; 在第一薄膜上提供第二氧化剂; 以及在所述第一薄膜上形成包括氧化钛的第二薄膜。 本发明还可以提供制造栅极结构和电容器的方法。

公开(公告)号：US20060013946A1

公开(公告)日：2006-01-19

申请号：US11182893

申请日：2005-07-15

申请人： Hong-Bae Park ,  Sang-Bom Kang ,  Beom-Jun Jin ,  Yu-Gyun Shin

发明人： Hong-Bae Park ,  Sang-Bom Kang ,  Beom-Jun Jin ,  Yu-Gyun Shin

IPC分类号： C23C16/00 ,  B05D5/12

CPC分类号： H01L21/02148 ,  C23C16/401 ,  C23C16/45531 ,  C23C16/45553 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/31616 ,  H01L21/31645 ,  H01L29/517

摘要： A thin film structure is formed that includes hafnium silicon oxide using an atomic layer deposition process. A first reactant including tetrakis ethyl methyl amino hafnium (TEMAH) is introduced onto a substrate. A first portion of the first reactant is chemisorbed to the substrate, whereas a second portion of the first reactant is physorbed to the first portion of the first reactant. A first oxidant is provided onto the substrate. A first thin film including hafnium oxide is formed on the substrate by chemically reacting the first oxidant with the first portion of the first reactant. A second reactant including amino propyl tri ethoxy silane (APTES) is introduced onto the first thin film. A first portion of the second reactant is chemisorbed to the first thin film, whereas a second portion of the second reactant is physorbed to the first portion of the second reactant. A second oxidant is provided onto the first thin film. A second thin film including silicon oxide is formed on the first thin film by chemically reacting the second oxidant with the first portion of the second reactant.

摘要翻译： 使用原子层沉积工艺形成包括氧化铪的薄膜结构。 将包含四乙基甲基氨基铪（TEMAH）的第一反应物引入到基材上。 第一反应物的第一部分被化学吸附到基底上，而第一反应物的第二部分被物理吸附到第一反应物的第一部分。 第一氧化剂被提供到基底上。 通过使第一氧化剂与第一反应物的第一部分发生化学反应，在衬底上形成包括氧化铪的第一薄膜。 将包含氨基丙基三乙氧基硅烷（APTES）的第二反应物引入到第一薄膜上。 第二反应物的第一部分被化学吸附到第一薄膜，而第二反应物的第二部分被物理吸附到第二反应物的第一部分。 在第一薄膜上提供第二氧化剂。 通过使第二氧化剂与第二反应物的第一部分化学反应，在第一薄膜上形成包括氧化硅的第二薄膜。

公开(公告)号：US09287199B2

公开(公告)日：2016-03-15

申请号：US12972961

申请日：2010-12-20

申请人： Hye-Lan Lee ,  Hong-Bae Park ,  Sang-Jin Hyun ,  Yu-Gyun Shin ,  Sug-Hun Hong ,  Hoon-Joo Na ,  Hyung-Seok Hong

发明人： Hye-Lan Lee ,  Hong-Bae Park ,  Sang-Jin Hyun ,  Yu-Gyun Shin ,  Sug-Hun Hong ,  Hoon-Joo Na ,  Hyung-Seok Hong

IPC分类号： H01L23/522 ,  H01L23/485 ,  H01L21/8238 ,  H01L27/06 ,  H01L27/08 ,  H01L29/94

CPC分类号： H01L27/092 ,  H01L21/823842 ,  H01L21/82385 ,  H01L21/823871 ,  H01L23/485 ,  H01L27/0629 ,  H01L27/0805 ,  H01L27/0811 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/94 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a CMOS transistor, a semiconductor device having the transistor, and a semiconductor module having the device. The CMOS transistor may include first and second interconnection structures respectively disposed in first and second regions of a semiconductor substrate. The first and second regions of the semiconductor substrate may have different conductivity types. The first and second interconnection structures may be disposed on the semiconductor substrate. The first interconnection structure may have a different stacked structure from the second interconnection structure. The CMOS transistor may be disposed in the semiconductor device. The semiconductor device may be disposed in the semiconductor module.

摘要翻译： 提供了CMOS晶体管，具有晶体管的半导体器件和具有该器件的半导体模块。 CMOS晶体管可以包括分别设置在半导体衬底的第一和第二区域中的第一和第二互连结构。 半导体衬底的第一和第二区域可以具有不同的导电类型。 第一和第二互连结构可以设置在半导体衬底上。 第一互连结构可以具有与第二互连结构不同的堆叠结构。 CMOS晶体管可以设置在半导体器件中。 半导体器件可以设置在半导体模块中。