Abstract:
Provided are three-dimensional nonvolatile memory devices and methods of fabricating the same. The memory devices include semiconductor pillars penetrating interlayer insulating layers and conductive layers alternately stacked on a substrate and electrically connected to the substrate and floating gates selectively interposed between the semiconductor pillars and the conductive layers. The floating gates are formed in recesses in the conductive layers.
Abstract:
An electronic device is provided. The electronic device includes a wireless transmission circuit for transmitting power to a power reception device, and a first processor. When entering a power reduction mode, with respect to a first voltage and a first current being output from the wireless transmission circuit, the first processor includes, in case that the power reception device is in an align state, lower a voltage of the wireless transmission circuit to a second voltage lower than the first voltage and lower a current flowing in the electronic device to a second current lower than the first current, and, in case that the power reception device is in a misalign state, lower a voltage of the electronic device to a third voltage lower than the second voltage and lower a current flowing in the wireless communication circuit to a third current lower than the second current.
Abstract:
Disclosed is an operating method of an electronic device for manufacture of a semiconductor device. The method includes receiving, at the electronic device, a computer-aided design (CAD) image for a lithography process of the semiconductor device, and generating, at the electronic device, a first scanning electron microscope (SEM) image and a first segment (SEG) image from the CAD image by using a machine learning-based module, and the first SEG image includes information about a location of a defect.
Abstract:
Disclosed is a method for controlling an electronic device electrically couplable to an external electronic device through a connector and capable of transmitting/receiving wireless power, the method including: an operation of identifying electrical connection to the external electronic device; an operation of receiving power from the external electronic device through a short-range communication module; an operation of controlling a mode switch module based on the received power and transmitting a signal regarding a power transmission mode to the external electronic device through the connector; an operation of receiving direct-current power from the external electronic device through the connector after transmitting the signal regarding the power transmission mode; and an operation of generating an electromagnetic field for wireless power transmission through the wireless power transmission/reception module, based on the received direct-current power.
Abstract:
Provided is an inspection method including providing a pattern layout including measurement points, generating a first measurement map including first measurement regions that overlap the measurement points and do not overlap each other in a two-dimensional plan view, providing preliminary measurement regions on the measurement points, producing a polygon by grouping ones of the preliminary measurement regions that overlap each other in the two-dimensional plan view, providing a second measurement region on a center of the polygon, selecting the second measurement region when all of the measurement points in the polygon overlap the second measurement region in the two-dimensional plan view, generating a second measurement map including the selected second measurement region, generating a third measurement map by using the first and second measurement maps, and inspecting patterns on a semiconductor substrate by using the third measurement map. The third measurement map includes the selected second measurement region and ones of the first measurement regions that do not overlap the selected second measurement region in the two-dimensional plan view.
Abstract:
A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
Abstract:
A semiconductor memory device includes n physical banks, each of which is configured to be entirely or partially included in one of a first logic bank or a second logic bank and arranged in a row direction, wherein n is an integer that is greater than or equal to 3, and wherein a proportion of a sum of respective widths of the n physical banks in the row direction to a height of the n physical banks in a column direction is a real number multiple that is not a multiple of 2.
Abstract:
A semiconductor device includes a lower circuit structure including a lower conductive pattern on a substrate, a middle wiring structure including horizontal wiring on the lower circuit structure, and a middle circuit structure on the middle wiring structure and including a stacked structure of alternating wiring and insulation layers. A channel structure extends through the stacked structure and contacts the horizontal wiring. A contact plug contacting the first lower conductive pattern and the horizontal wiring is in the middle wiring structure. A lowermost end of the channel structure is farther from a top of the substrate than a bottom of the horizontal wiring. An uppermost end of the contact plug is farther from the top of the substrate than the bottom of the horizontal wiring. The uppermost end of the contact plug is closer to the top of the substrate than a lowermost end of the wiring layers.
Abstract:
A power transmission device is provided for transmitting power. The power transmission device includes a power transmitter including a plurality of coils, and a processor configured to wirelessly transmit power to a power reception device through at least one coil among the plurality of coils, identify a condition indicating a state in which a coil to transmit power related to charging of the power reception device is to be reconfigured, transmit a CSP to the power reception device, in response to identifying the condition, based on the predetermined condition, identify an SSP of at least one other coil adjacent to at least one coil, and wirelessly transmit power to the power reception device through a coil having a largest SSP among an SSP of the at least one coil and the identified SSP of the at least one other coil.
Abstract:
An electronic device including a coil, a power transmission circuit electrically connected with the coil, a detection circuit, and a control circuit. The control circuit of the electronic device configured to wirelessly output a first signal for identifying an access of a foreign object by first period intervals through the coil using the power transmission circuit, identify a change of the first signal using the detection circuit, wirelessly output the first signal by the first period intervals in response to a detection value of the changed first signal being less than or equal to a first threshold value, and wirelessly output the first signal by a second period intervals longer than the first period intervals in response to the detection value of the changed first signal exceeding the first threshold value.