公开(公告)号：US12058852B2

公开(公告)日：2024-08-06

申请号：US18327876

申请日：2023-06-01

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Hsiang-Wei Liu ,  Wei-Chen Chu ,  Chia-Tien Wu

IPC分类号： G11C17/16 ,  G11C17/18 ,  H01L23/525 ,  H10B20/20

CPC分类号： H10B20/20 ,  G11C17/16 ,  G11C17/18 ,  H01L23/5256

摘要： A semiconductor device and a method of operating the same are provided. The semiconductor device includes a transistor and a fuse structure electrically connected to the transistor. The fuse structure includes a first fuse element, a second fuse element, and a fuse medium. The second fuse element at least partially overlaps the first fuse element. The fuse medium connects the first fuse element and the second fuse element. The fuse medium includes an electrically conductive material.

公开(公告)号：US20240249784A1

公开(公告)日：2024-07-25

申请号：US18626971

申请日：2024-04-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Perng-Fei Yuh ,  Tung-Cheng Chang ,  Gu-Huan Li ,  Chia-En Huang ,  Chun-Ying Lee ,  Yih Wang

IPC分类号： G11C17/16 ,  G11C17/18 ,  H10B20/20

CPC分类号： G11C17/16 ,  G11C17/18 ,  H10B20/20

摘要： A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.

公开(公告)号：US20240213073A1

公开(公告)日：2024-06-27

申请号：US18424790

申请日：2024-01-27

申请人： Monolithic 3D Inc.

发明人： Zvi Or-Bach ,  Brian Cronquist ,  Deepak C. Sekar

IPC分类号： H01L21/683 ,  G11C8/16 ,  H01L21/74 ,  H01L21/762 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8238 ,  H01L21/84 ,  H01L23/00 ,  H01L23/367 ,  H01L23/48 ,  H01L23/525 ,  H01L25/00 ,  H01L25/065 ,  H01L27/02 ,  H01L27/06 ,  H01L27/092 ,  H01L27/10 ,  H01L27/105 ,  H01L27/118 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H10B10/00 ,  H10B12/00 ,  H10B20/00 ,  H10B20/20 ,  H10B41/20 ,  H10B41/40 ,  H10B41/41 ,  H10B43/20 ,  H10B43/40

CPC分类号： H01L21/6835 ,  G11C8/16 ,  H01L21/743 ,  H01L21/76254 ,  H01L21/76898 ,  H01L21/8221 ,  H01L21/823828 ,  H01L21/84 ,  H01L23/481 ,  H01L23/5252 ,  H01L27/0207 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/10 ,  H01L27/105 ,  H01L27/11807 ,  H01L27/11898 ,  H01L27/1203 ,  H01L29/4236 ,  H01L29/66272 ,  H01L29/66621 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/66901 ,  H01L29/78 ,  H01L29/7841 ,  H01L29/7843 ,  H01L29/7881 ,  H01L29/792 ,  H10B10/00 ,  H10B10/125 ,  H10B12/053 ,  H10B12/09 ,  H10B12/20 ,  H10B12/50 ,  H10B20/00 ,  H10B41/20 ,  H10B41/40 ,  H10B41/41 ,  H10B43/20 ,  H10B43/40 ,  H01L23/3677 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/1214 ,  H01L27/1266 ,  H01L2221/68368 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83894 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01066 ,  H01L2924/01068 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12033 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H10B12/05 ,  H10B20/20

摘要： A 3D semiconductor device, the device including: a first level including a first single crystal layer, the first level including first transistors, where each of the first transistors includes a single crystal channel; first metal layer; a second metal layer overlaying the first metal layer; and a second level including a second single crystal layer, the second level including second transistors and at least one third metal layer, where the second level overlays the first level, where at least one of the second transistors includes a transistor channel, where the second level includes a plurality of DRAM memory cells, where each of the plurality of DRAM memory cells includes at least one of the second transistors and one capacitor, where the second level is directly bonded to the first level, and where the bonded includes metal to metal bonds.

公开(公告)号：US12010833B2

公开(公告)日：2024-06-11

申请号：US18353351

申请日：2023-07-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Sheng Chang ,  Chia-En Huang ,  Shao-Yu Chou ,  Yih Wang

IPC分类号： H10B20/20 ,  G06F30/392 ,  G11C17/16 ,  G11C17/18 ,  H01L23/525 ,  H01L23/528 ,  H01L23/532

CPC分类号： H10B20/20 ,  G06F30/392 ,  G11C17/16 ,  G11C17/18 ,  H01L23/5252 ,  H01L23/528 ,  H01L23/53271

摘要： A memory device includes a first memory cell having a first polysilicon line associated with a first read word line and intersecting a first active region and a second active region, and a second polysilicon line and a first CPODE associated with a first program word line, the second polysilicon line intersecting the first active region and the first CPODE intersecting the second active region. The memory device also includes a second memory cell adjacent to the first memory cell, the second memory cell having a third polysilicon line associated with a second read word line and intersecting the first active region and the second active region, and a fourth polysilicon line and a second CPODE associated with a second program word line, the fourth polysilicon line intersecting the second active region and the second CPODE intersecting the first active region to form a cross-arrangement of CPODE.

公开(公告)号：US11985819B2

公开(公告)日：2024-05-14

申请号：US17853243

申请日：2022-06-29

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Meng-Sheng Chang ,  Chia-En Huang

IPC分类号： H10B20/20 ,  G11C17/16 ,  H01L23/525

CPC分类号： H10B20/20 ,  G11C17/165 ,  H01L23/5252 ,  G11C2213/79

摘要： A memory device includes an anti-fuse cell array having a plurality of anti-fuse cells, each of the plurality of anti-fuse cells having a first transistor and a second transistor connected to the first transistor. A first terminal of the first transistor is connected to a bit line and the bit line is a buried rail formed in a substrate of the first transistor and the second transistor.

公开(公告)号：US11985818B2

公开(公告)日：2024-05-14

申请号：US17310896

申请日：2021-03-24

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： ChihCheng Liu

IPC分类号： H10B20/20 ,  G11C29/00

CPC分类号： H10B20/20 ,  G11C29/702 ,  G11C29/812 ,  G11C2229/763

摘要： An anti-fuse device includes: a substrate; an anti-fuse gate, partially embedded in the substrate, a portion of the anti-fuse gate embedded in the substrate having one or more sharp corners; and an anti-fuse gate oxide layer, located between the anti-fuse gate and the substrate.

公开(公告)号：US20240098988A1

公开(公告)日：2024-03-21

申请号：US18521375

申请日：2023-11-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chien-Ying CHEN ,  Yao-Jen YANG

IPC分类号： H10B20/20 ,  G06F30/392

CPC分类号： H10B20/20 ,  G06F30/392

摘要： A method of generating an integrated circuit (IC) layout diagram includes overlapping an active region with a plurality of gate regions, thereby defining a program transistor and a read transistor of a one-time-programmable (OTP) bit, overlapping a through via region with a gate region of the plurality of gate regions or with the active region, and overlapping the through via region with a metal region of a back-side metal layer.

公开(公告)号：US20240090209A1

公开(公告)日：2024-03-14

申请号：US18514796

申请日：2023-11-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Sheng Chang ,  Chia-En Huang ,  Yi-Hsun Chiu ,  Yih Wang

IPC分类号： H10B20/20 ,  G11C17/16 ,  G11C17/18 ,  H01L23/525

CPC分类号： H10B20/20 ,  G11C17/16 ,  G11C17/18 ,  H01L23/5252

摘要： A memory device includes a programming transistor and a reading transistor of an anti-fuse memory cell. The programming transistor includes first semiconductor nanostructures vertically spaced apart from one another, each of the first semiconductor nanostructures having a first width along a first lateral direction. The reading transistor includes second semiconductor nanostructures vertically spaced apart from one another, each of the second semiconductor nanostructures having a second width different from the first width along the second direction. The memory device also includes a first and a second gate metals. The first gate metal wraps around each of the first semiconductor nanostructures with a first gate dielectric disposed therein. The second gate metal wraps around each of the second semiconductor nanostructures with a second gate dielectric disposed therein.

公开(公告)号：US11856760B2

公开(公告)日：2023-12-26

申请号：US17463172

申请日：2021-08-31

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chien-Ying Chen ,  Yao-Jen Yang

IPC分类号： H10B20/20 ,  G06F30/392

CPC分类号： H10B20/20 ,  G06F30/392

摘要： A one-time programmable (OTP) bit cell includes a substrate including a front side and a back side, an active area on the front side, a first read transistor including a first gate and a first portion of the active area intersected by the first gate, a program transistor including a second gate and a second portion of the active area intersected by the second gate, a first electrical connection to the first gate, a second electrical connection to the second gate, and a third electrical connection to the active area. At least one of the first, second, or third electrical connections includes a metal line positioned on the back side.

公开(公告)号：US11849574B2

公开(公告)日：2023-12-19

申请号：US17381090

申请日：2021-07-20

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Meng-Sheng Chang ,  Chia-En Huang ,  Yih Wang

IPC分类号： H10B20/20 ,  H01L23/525 ,  G11C17/16 ,  H01L23/528 ,  G11C17/18

CPC分类号： H10B20/20 ,  G11C17/16 ,  G11C17/18 ,  H01L23/528 ,  H01L23/5256

摘要： A method of forming a storage cell includes: forming a transistor on a semiconductor substrate; forming a plurality of fuses in at least one conductive layer on the semiconductor substrate to couple a connecting terminal of the transistor; forming a bit line to couple the plurality of fuses; and forming a word line to couple a control terminal of the transistor.